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    • 2. 发明授权
    • Power transmission belt
    • 动力传动皮带
    • US5531650A
    • 1996-07-02
    • US501023
    • 1995-08-11
    • Atsushi Azuma
    • Atsushi Azuma
    • F16G1/28F16G5/06F16G5/20F16G1/10
    • F16G5/06F16G1/28F16G5/20
    • What is disclosed is a power transmission belt including a laminate composed of an adhesive rubber layer in which core wires are buried and a compressed rubber layer, to the periphery of which being adhered canvas, characterized in that the above-mentioned canvas is impregnated with an aqueous latex composition comprising 2-chloro-1,3-butadiene-2,3-dichloro-1,3-butadiene copolymer latex. The power transmission belt of the present invention does not necessitate any organic solvents and is excellent in thermal resistance, and especially has great adhesion force between the rubber layers and the canvas.
    • PCT No.PCT / JP94 / 02115 Sec。 371日期:1995年8月11日 102(e)日期1995年8月11日PCT 1994年12月15日PCT PCT。 出版物WO95 / 16865 日期:1995年6月22日。公开了一种动力传递带,其包括由其中埋入芯线的粘合橡胶层和压缩橡胶层组成的层压体,其周边粘附在帆布上,其特征在于,上述 用包含2-氯-1,3-丁二烯-2,3-二氯-1,3-丁二烯共聚物胶乳的水性胶乳组合物浸渍所述帆布。 本发明的动力传递带不需要任何有机溶剂,并且耐热性优异,特别是在橡胶层和帆布之间具有很大的粘附力。
    • 6. 发明申请
    • SEMICONDUCTOR DEVICE
    • 半导体器件
    • US20090140344A1
    • 2009-06-04
    • US12189439
    • 2008-08-11
    • Atsushi Azuma
    • Atsushi Azuma
    • H01L29/66
    • H01L29/4983H01L27/11H01L27/1104
    • A semiconductor device including a SRAM cell may include a data holding unit including a driver transistor and a load transistor, and receiving and holding data; and a data transferring unit including a transfer gate transistor whose source and drain are connected between the data holding unit and one of a pair of bit lines, and whose gate is connected to a word line, the data transferring unit either transferring the data transferred from the one of the pair of bit lines to the data holding unit or receiving the data held in the data holding unit and transferring the data to the one of the pair of bit lines, wherein at least one of the driver transistor and the load transistor has higher capacitance between the gate and the source and between the gate and the drain than the transfer gate transistor.
    • 包括SRAM单元的半导体器件可以包括包括驱动晶体管和负载晶体管的数据保持单元,以及接收和保持数据; 以及数据传送单元,其包括传输栅极晶体管,其源极和漏极连接在数据保持单元和一对位线中的一个位线之间,并且其栅极连接到字线,数据传送单元传送从 数据保持单元的一对位线中的一个或接收保存在数据保持单元中的数据并将数据传送到该对位线中的一个,其中驱动晶体管和负载晶体管中的至少一个具有 栅极和源极之间以及栅极和漏极之间的电容比传输栅极晶体管更高。
    • 9. 发明授权
    • Semiconductor device
    • 半导体器件
    • US07880237B2
    • 2011-02-01
    • US12189439
    • 2008-08-11
    • Atsushi Azuma
    • Atsushi Azuma
    • H01L21/70
    • H01L29/4983H01L27/11H01L27/1104
    • A semiconductor device including a SRAM cell may include a data holding unit including a driver transistor and a load transistor, and receiving and holding data; and a data transferring unit including a transfer gate transistor whose source and drain are connected between the data holding unit and one of a pair of bit lines, and whose gate is connected to a word line, the data transferring unit either transferring the data transferred from the one of the pair of bit lines to the data holding unit or receiving the data held in the data holding unit and transferring the data to the one of the pair of bit lines, wherein at least one of the driver transistor and the load transistor has higher capacitance between the gate and the source and between the gate and the drain than the transfer gate transistor.
    • 包括SRAM单元的半导体器件可以包括包括驱动晶体管和负载晶体管的数据保持单元,以及接收和保持数据; 以及数据传送单元,其包括传输栅极晶体管,其源极和漏极连接在数据保持单元和一对位线中的一个位线之间,并且其栅极连接到字线,数据传送单元传送从 数据保持单元的一对位线中的一个或接收保存在数据保持单元中的数据并将数据传送到该对位线中的一个,其中驱动晶体管和负载晶体管中的至少一个具有 栅极和源极之间以及栅极和漏极之间的电容比传输栅极晶体管更高。