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1. 发明授权

US06515320B1 Semiconductor device and method of manufacturing the same including thicker insulating layer on lower part of electrode 失效
标题翻译：半导体器件及其制造方法包括在电极下部较厚的绝缘层
公开(公告)号：US06515320B1
公开(公告)日：2003-02-04
申请号：US09986362
申请日：2001-11-08
申请人： Atsushi Azuma , Satoshi Matsuda
发明人： Atsushi Azuma , Satoshi Matsuda
IPC分类号： H01L2976
CPC分类号： H01L29/6653 , H01L21/28079 , H01L21/28114 , H01L29/42376 , H01L29/495 , H01L29/66545 , H01L29/6656 , H01L2924/0002 , Y10S438/926 , H01L2924/00
摘要： A gate insulating film is provided on a channel region. A gate electrode includes a lower part and an upper part. The lower part has a lower surface and sides, and the upper part has a lower surface. The lower surface of the lower part contacts the gate insulating film. The upper part is longer than the lower part in a lengthwise direction of a gate electrode. The first insulating film is interposed between the lower surface of the upper part of the gate electrode and a semiconductor substrate. The first insulating film surrounds at least the sides of the lower part of the gate electrode, which face drain and source regions, and having parts interposed between the lower surface of the upper part of the gate electrode and the semiconductor substrate and made thicker than the other parts.
摘要翻译：栅极绝缘膜设置在沟道区域上。栅电极包括下部和上部。下部具有下表面和侧面，并且上部具有下表面。下部的下表面与栅极绝缘膜接触。上部比栅电极长度方向的下部长。第一绝缘膜插入在栅电极的上部的下表面和半导体衬底之间。第一绝缘膜至少包围栅电极的下部的面向漏极和源极区域的侧面，并且具有插入在栅电极的上部的下表面和半导体衬底之间的部分，并且被制成比其他部分。

2. 发明授权

US07288470B2 Semiconductor device comprising buried channel region and method for manufacturing the same 失效
标题翻译：包括掩埋沟道区的半导体器件及其制造方法
公开(公告)号：US07288470B2
公开(公告)日：2007-10-30
申请号：US11727735
申请日：2007-03-28
申请人： Satoshi Matsuda , Atsushi Azuma
发明人： Satoshi Matsuda , Atsushi Azuma
IPC分类号： H01L21/3205
CPC分类号： H01L29/66537 , H01L21/266 , H01L21/28079 , H01L21/28114 , H01L29/1083 , H01L29/42368 , H01L29/42376 , H01L29/495 , H01L29/66545 , H01L29/6656 , H01L29/7838
摘要： A semiconductor device includes a gate insulating film formed on a semiconductor substrate between first diffusion layers, a gate electrode including a first gate portion formed on the gate insulating film and a second gate portion formed on the first gate portion, a first width in a channel direction of the first gate portion being substantially equal to a width in that of the gate insulating film, and a second width in the channel direction of the second gate portion being larger than the first width, a gate side wall insulating film including a first side wall portion formed on a side surface of the first gate portion and the gate insulating film and a second side wall portion formed on a side surface of the second gate portion, and a second diffusion layer formed apart from the first diffusion layers below the gate insulating film.
摘要翻译：半导体器件包括形成在第一扩散层之间的半导体衬底上的栅极绝缘膜，包括形成在栅极绝缘膜上的第一栅极部分的栅电极和形成在第一栅极部分上的第二栅极部分，沟道中的第一宽度第一栅极部分的方向基本上等于栅极绝缘膜的宽度，并且第二栅极部分的沟道方向上的第二宽度大于第一宽度;栅极侧壁绝缘膜，包括第一侧形成在第一栅极部分和栅极绝缘膜的侧表面上的壁部分和形成在第二栅极部分的侧表面上的第二侧壁部分，以及与栅极绝缘下方的第一扩散层分开形成的第二扩散层电影。

3. 发明授权

US06649462B2 Semiconductor device and method of manufacturing the same including T-shaped gate 有权
标题翻译：半导体器件及其制造方法包括T形栅极
公开(公告)号：US06649462B2
公开(公告)日：2003-11-18
申请号：US10292579
申请日：2002-11-13
申请人： Atsushi Azuma , Satoshi Matsuda
发明人： Atsushi Azuma , Satoshi Matsuda
IPC分类号： H01L218238
CPC分类号： H01L29/6653 , H01L21/28079 , H01L21/28114 , H01L29/42376 , H01L29/495 , H01L29/66545 , H01L29/6656 , H01L2924/0002 , Y10S438/926 , H01L2924/00
摘要： A gate insulating film is provided on a channel region. A gate electrode includes a lower part and an upper part. The lower part has a lower surface and sides, and the upper part has a lower surface. The lower surface of the lower part contacts the gate insulating film. The upper part is longer than the lower part in a lengthwise direction of a gate electrode. The first insulating film is interposed between the lower surface of the upper part of the gate electrode and a semiconductor substrate. The first insulating film surrounds at least the sides of the lower part of the gate electrode, which face drain and source regions, and having parts interposed between the lower surface of the upper part of the gate electrode and the semiconductor substrate and made thicker than the other parts.
摘要翻译：栅极绝缘膜设置在沟道区域上。栅电极包括下部和上部。下部具有下表面和侧面，并且上部具有下表面。下部的下表面与栅极绝缘膜接触。上部比栅电极长度方向的下部长。第一绝缘膜插入在栅电极的上部的下表面和半导体衬底之间。第一绝缘膜至少包围栅电极的下部的面向漏极和源极区域的侧面，并且具有插入在栅电极的上部的下表面和半导体衬底之间的部分，并且被制成比其他部分。

4. 发明授权

US06642581B2 Semiconductor device comprising buried channel region 失效
标题翻译：半导体器件包括掩埋沟道区域
公开(公告)号：US06642581B2
公开(公告)日：2003-11-04
申请号：US10101950
申请日：2002-03-21
申请人： Satoshi Matsuda , Atsushi Azuma
发明人： Satoshi Matsuda , Atsushi Azuma
IPC分类号： H01L2976
CPC分类号： H01L29/66537 , H01L21/266 , H01L21/28079 , H01L21/28114 , H01L29/1083 , H01L29/42368 , H01L29/42376 , H01L29/495 , H01L29/66545 , H01L29/6656 , H01L29/7838
摘要： A semiconductor device includes a gate insulating film formed on a semiconductor substrate between first diffusion layers, a gate electrode including a first gate portion formed on the gate insulating film and a second gate portion formed on the first gate portion, a first width in a channel direction of the first gate portion being substantially equal to a width in that of the gate insulating film, and a second width in the channel direction of the second gate portion being larger than the first width, a gate side wall insulating film including a first side wall portion formed on a side surface of the first gate portion and the gate insulating film and a second side wall portion formed on a side surface of the second gate portion, and a second diffusion layer formed apart from the first diffusion layers below the gate insulating film.
摘要翻译：半导体器件包括形成在第一扩散层之间的半导体衬底上的栅极绝缘膜，包括形成在栅极绝缘膜上的第一栅极部分的栅电极和形成在第一栅极部分上的第二栅极部分，沟道中的第一宽度第一栅极部分的方向基本上等于栅极绝缘膜的宽度，并且第二栅极部分的沟道方向上的第二宽度大于第一宽度;栅极侧壁绝缘膜，包括第一侧形成在第一栅极部分和栅极绝缘膜的侧表面上的壁部分和形成在第二栅极部分的侧表面上的第二侧壁部分，以及与栅极绝缘下方的第一扩散层分开形成的第二扩散层电影。

5. 发明申请

US20070184623A1 Semiconductor device comprising buried channel region and method for manufacturing the same 失效
公开(公告)号：US20070184623A1
公开(公告)日：2007-08-09
申请号：US11727735
申请日：2007-03-28
申请人： Satoshi Matsuda , Atsushi Azuma
发明人： Satoshi Matsuda , Atsushi Azuma
IPC分类号： H01L21/336
CPC分类号： H01L29/66537 , H01L21/266 , H01L21/28079 , H01L21/28114 , H01L29/1083 , H01L29/42368 , H01L29/42376 , H01L29/495 , H01L29/66545 , H01L29/6656 , H01L29/7838
摘要： A semiconductor device includes a gate insulating film formed on a semiconductor substrate between first diffusion layers, a gate electrode including a first gate portion formed on the gate insulating film and a second gate portion formed on the first gate portion, a first width in a channel direction of the first gate portion being substantially equal to a width in that of the gate insulating film, and a second width in the channel direction of the second gate portion being larger than the first width, a gate side wall insulating film including a first side wall portion formed on a side surface of the first gate portion and the gate insulating film and a second side wall portion formed on a side surface of the second gate portion, and a second diffusion layer formed apart from the first diffusion layers below the gate insulating film.

6. 发明授权

US08318845B2 Golf ball 有权
标题翻译：高尔夫球
公开(公告)号：US08318845B2
公开(公告)日：2012-11-27
申请号：US12574930
申请日：2009-10-07
申请人： Satoshi Matsuda , Hiroyuki Nagasawa
发明人： Satoshi Matsuda , Hiroyuki Nagasawa
IPC分类号： A63B37/12 , A63B37/00 , C08L75/06
CPC分类号： A63B37/0003 , A63B37/0083
摘要： The invention provides a golf ball having a core and a cover of at least one layer that is formed over the core and is made of a resin composition. The ball has a weight change ratio, in a 72-hour accelerated moisture absorption test conducted at a temperature of 40° C. and a relative humidity of 90%, of less than 0.287%. By using in the golf ball a polyurethane having a good resistance to water vapor transmission, the weight change ratio and decrease in initial velocity with use over an extended period of time are held to a minimum, enabling the ball quality to be maintained.
摘要翻译：本发明提供了一种高尔夫球，其具有形成在芯上并由树脂组合物制成的至少一层的芯和覆盖层。在40℃的温度和90％的相对湿度小于0.287％的72小时加速吸湿试验中，球具有重量变化率。通过在高尔夫球中使用具有良好的耐水蒸气传播性能的聚氨酯，将重量变化率和在长时间内使用的初始速度的降低保持在最小，从而保持球质。

7. 发明申请

US20110070975A1 COLORED GOLF BALL 审中-公开
标题翻译：彩色高尔夫球
公开(公告)号：US20110070975A1
公开(公告)日：2011-03-24
申请号：US12956751
申请日：2010-11-30
申请人： Hiroyuki Nagasawa , Satoshi Matsuda
发明人： Hiroyuki Nagasawa , Satoshi Matsuda
IPC分类号： A63B37/12
CPC分类号： A63B37/12 , A63B37/0003 , A63B37/0024 , A63B37/0033 , A63B43/008
摘要： In a golf ball having a core, a cover of at least one layer encasing the core, and a layer of paint applied to a surface of an outermost layer of the cover, the outermost cover layer and/or the paint layer is colored with a fluorescent pigment, the core or at least one layer of an intermediate spherical body made up of the tore encased by one or more cover layer is colored similar to the color of the fluorescent pigment-colored layer, and the ball itself has a specific color difference ΔE with the color of the core or the intermediate spherical body. The colored golf ball is endowed with an excellent spin performance and durability, an appearance characterized by outstanding visibility, stylishness and elegance, and an excellent weather resistance.
摘要翻译：在具有芯的高尔夫球中，包含芯的至少一层的覆盖物和涂覆在盖的最外层的表面上的涂料层，最外面的覆盖层和/或涂料层被着色为荧光颜料，由一层或多层覆盖层构成的芯或由至少一层中间球体构成的层与彩色颜料着色层的颜色相似，并且球本身具有特定的色差＆Dgr; E与核心或中间球体的颜色。彩色高尔夫球具有优异的旋转性能和耐用性，外观特点是出色的视觉度，时尚性和优雅性，以及出色的耐候性。

8. 发明授权

US07694612B2 Control device for cut-off apparatus 有权
标题翻译：切断装置的控制装置
公开(公告)号：US07694612B2
公开(公告)日：2010-04-13
申请号：US12414783
申请日：2009-03-31
申请人： Hiroshi Ishibuchi , Satoshi Matsuda , Kuniaki Wakusawa , Katsuaki Takasaki
发明人： Hiroshi Ishibuchi , Satoshi Matsuda , Kuniaki Wakusawa , Katsuaki Takasaki
IPC分类号： B23Q15/00
CPC分类号： B26D1/626 , B26D5/00 , Y10T83/04 , Y10T83/141 , Y10T83/159 , Y10T83/162 , Y10T83/4682 , Y10T83/4827 , Y10T83/4836
摘要： Torque necessary for cutting band-like paper is properly distributed to both of the preceding motor and the following motor, thereby making it possible to accurately cut the band-like paper. The cut off method for a cut off apparatus including: a preceding knife cylinder on whose peripheral surface a preceding helical knife is provided; a following knife cylinder on whose peripheral surface a following helical knife, which cuts off band-like paper D in cooperation with the preceding knife, is provided; a preceding knife driving motor which rotationally drives the preceding knife cylinder; a following knife driving motor which rotationally drives the following knife cylinder; and a cut off control device which individually controls the preceding knife driving motor and the following knife driving motor, is characterized in that the method comprises: giving, when the band-like paper D is cut, the preceding knife and the following knife a specified amount of torque in the direction in which the preceding knife and the following knife are pressed against each other, by means of the preceding knife driving motor and the following knife driving motor.
摘要翻译：用于切割带状纸所需的扭矩适当地分配到前一个电动机和随后的电动机中，从而可以精确地切割带状纸。一种用于切断装置的切断方法，包括：前面的刀片滚筒，其外周表面设置有前一螺旋刀; 提供了一个随后的刀片圆筒，其外周表面上是与前一个刀片一起切断带状纸D的随后的螺旋刀; 前转刀驱动马达，其旋转地驱动前刀刀筒; 一个随动刀驱动马达，其旋转地驱动下一个刀筒; 以及单独控制前一个刀驱动电动机和随后的刀驱动电动机的切断控制装置，其特征在于，该方法包括：当带状纸D被切割时，给出前一刀和随后的刀指定的通过前面的刀驱动电机和随后的刀驱动电机使前刀和后刀彼此压靠的方向上的扭矩量。

9. 发明授权

US07332380B2 Pattern design method and program of a semiconductor device including dummy patterns 失效
标题翻译：包括虚拟图案的半导体器件的图案设计方法和程序
公开(公告)号：US07332380B2
公开(公告)日：2008-02-19
申请号：US11207180
申请日：2005-08-19
申请人： Satoshi Matsuda
发明人： Satoshi Matsuda
IPC分类号： H01L21/332
CPC分类号： H01L27/0207 , H01L21/31053 , H01L21/32139 , H01L2924/0002 , H01L2924/00
摘要： According to an aspect of the present invention, there is provided a pattern design method of a semiconductor device, including preparing design pattern data, separating a pattern region of a semiconductor device on the basis of the design pattern data into a dummy pattern region and a dummy pattern prohibition region, dividing the dummy pattern region into dummy pattern unit regions, setting a plurality of inspection areas in the dummy pattern region and the dummy pattern prohibition region, the inspection area closing round at least the two or more dummy pattern unit regions, a part of the one dummy pattern unit region overlapping a part of another dummy pattern unit region, calculating a tentative pattern-covering fraction of a dummy pattern, the dummy pattern being formed of the dummy pattern unit region in the inspection area, calculating a final pattern-covering fraction of the dummy pattern unit region, the final pattern-covering fraction being obtained by averaging the tentative pattern-covering fraction of the dummy pattern unit region in the inspection area, and generating the dummy pattern in the dummy pattern unit region on the basis of the final pattern-covering fraction calculated on the dummy pattern unit region.
摘要翻译：根据本发明的一个方面，提供了一种半导体器件的图案设计方法，包括准备设计图案数据，根据设计图案数据将半导体器件的图案区域分成虚拟图案区域和虚拟图案禁止区域，将虚拟图案区域划分为虚拟图案单元区域，在虚拟图案区域和伪图案禁止区域中设置多个检查区域，至少两个或更多个伪图案单元区域闭合的检查区域，一个虚拟图形单元区域的一部分与另一个虚设图形单元区域的一部分重叠，计算虚拟图案的暂时图案覆盖分数，该伪图案由检查区域中的伪图案单元区域形成，计算最终虚拟图案单元区域的图案覆盖分数，最终图案覆盖分数是通过对该图案平均化获得的在检查区域中的伪图案单元区域的图案覆盖分数，并且基于在虚设图案单位区域上计算出的最终图案覆盖分数来生成伪图案单位区域中的虚设图案。

10. 发明申请

US20060094190A1 Semiconductor device, pattern design method of a semiconductor device and program for a pattern design method 失效
标题翻译：半导体器件，半导体器件的图案设计方法和用于图案设计方法的程序
公开(公告)号：US20060094190A1
公开(公告)日：2006-05-04
申请号：US11207180
申请日：2005-08-19
申请人： Satoshi Matsuda
发明人： Satoshi Matsuda
IPC分类号： H01L21/336
CPC分类号： H01L27/0207 , H01L21/31053 , H01L21/32139 , H01L2924/0002 , H01L2924/00
摘要： According to an aspect of the present invention, there is provided a pattern design method of a semiconductor device, including preparing design pattern data, separating a pattern region of a semiconductor device on the basis of the design pattern data into a dummy pattern region and a dummy pattern prohibition region, dividing the dummy pattern region into dummy pattern unit regions, setting a plurality of inspection areas in the dummy pattern region and the dummy pattern prohibition region, the inspection area closing round at least the two or more dummy pattern unit regions, a part of the one dummy pattern unit region overlapping a part of another dummy pattern unit region, calculating a tentative pattern-covering fraction of a dummy pattern, the dummy pattern being formed of the dummy pattern unit region in the inspection area, calculating a final pattern-covering fraction of the dummy pattern unit region, the final pattern-covering fraction being obtained by averaging the tentative pattern-covering fraction of the dummy pattern unit region in the inspection area, and generating the dummy pattern in the dummy pattern unit region on the basis of the final pattern-covering fraction calculated on the dummy pattern unit region.
摘要翻译：根据本发明的一个方面，提供了一种半导体器件的图案设计方法，包括准备设计图案数据，根据设计图案数据将半导体器件的图案区域分成虚拟图案区域和虚拟图案禁止区域，将虚拟图案区域划分为伪图案单元区域，在虚拟图案区域和伪图案禁止区域中设置多个检查区域，至少两个或更多个伪图案单元区域闭合的检查区域，一个虚拟图形单元区域的一部分与另一个虚设图形单元区域的一部分重叠，计算虚拟图案的暂时图案覆盖分数，该伪图案由检查区域中的伪图案单元区域形成，计算最终虚拟图案单元区域的图案覆盖分数，最终图案覆盖分数是通过对该图案平均化获得的在检查区域中的伪图案单元区域的图案覆盖分数，并且基于在虚设图案单位区域上计算出的最终图案覆盖分数来生成伪图案单位区域中的虚设图案。

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