会员体验
专利管家(专利管理)
工作空间(专利管理)
风险监控(情报监控)
数据分析(专利分析)
侵权分析(诉讼无效)
联系我们
交流群
官方交流:
QQ群: 891211   
微信请扫码    >>>
现在联系顾问~
热词
    • 85. 发明申请
    • NONVOLATILE MEMORY ELEMENT AND METHOD OF MANUFACTURING THE NONVOLATILE MEMORY ELEMENT
    • 非易失性存储元件和制造非易失性存储元件的方法
    • US20120292589A1
    • 2012-11-22
    • US13575338
    • 2011-12-12
    • Shinichi YonedaTakumi Mikawa
    • Shinichi YonedaTakumi Mikawa
    • H01L45/00H01L21/66H01L21/8239
    • H01L45/146G11C13/0007G11C2213/72H01L45/1233
    • A nonvolatile memory element according to the present disclosure includes: a variable resistance element including a first electrode layer, a second electrode layer, and a variable resistance layer which is located between the first electrode layer and the second electrode layer and has a resistance value that reversibly changes based on an electrical signal applied between the first electrode layer and the second electrode layer; and a fixed resistance layer having a predetermined resistance value and stacked together with the variable resistance element. The variable resistance layer includes (i) a first transition metal oxide layer which is oxygen deficient and (ii) a second transition metal oxide layer which has a higher oxygen content atomic percentage than the first transition metal oxide layer. The predetermined resistance value ranges from 70Ω to 1000Ω inclusive.
    • 根据本公开的非易失性存储元件包括:可变电阻元件,包括位于第一电极层和第二电极层之间的第一电极层,第二电极层和可变电阻层,并且具有电阻值, 基于施加在第一电极层和第二电极层之间的电信号可逆地改变; 以及具有预定电阻值并与可变电阻元件一起堆叠的固定电阻层。 可变电阻层包括(i)缺氧的第一过渡金属氧化物层和(ii)具有比第一过渡金属氧化物层更高的氧含量原子百分比的第二过渡金属氧化物层。 预定电阻值范围为70&OHgr; 至1000&OHgr; 包括的。
    • 86. 发明授权
    • Nonvolatile memory apparatus and manufacturing method thereof
    • 非易失性存储装置及其制造方法
    • US08242479B2
    • 2012-08-14
    • US12742841
    • 2008-11-14
    • Yoshio KawashimaTakumi MikawaRyoko MiyanagaTakeshi Takagi
    • Yoshio KawashimaTakumi MikawaRyoko MiyanagaTakeshi Takagi
    • H01L29/02
    • H01L27/101G11C13/0002G11C2213/72H01L27/24
    • A nonvolatile memory device includes via holes (12) formed at cross sections where first wires (11) cross second wires (14), respectively, and current control elements (13) each including a current control layer (13b), a first electrode layer (13a) and a second electrode layer (13c) such that the current control layer (13b) is sandwiched between the first electrode layer (13a) and the second electrode layer (13c), in which resistance variable elements (15) are provided inside the via holes (12), respectively, the first electrode layer (13a) is disposed so as to cover the via hole (12), the current control layer (13b) is disposed so as to cover the first electrode layer (13a), the second electrode layer (13c) is disposed on the current control layer (13b), a wire layer (14a) of the second wire is disposed on the second electrode layer (13c), and the second wires (14) each includes the current control layer (13b), the second electrode layer (13c) and the wire layer (14a) of the second wire.
    • 非易失性存储器件包括分别形成在第一布线(11)与第二布线(14)交叉的横截面处的通孔(12),以及各自包括电流控制层(13b)的电流控制元件(13),第一电极层 (13a)和第二电极层(13c),使得电流控制层(13b)夹在第一电极层(13a)和第二电极层(13c)之间,其中电阻可变元件(15)设置在其内 通孔(12)分别设置成覆盖通孔(12),电流控制层(13b)被设置成覆盖第一电极层(13a), 第二电极层(13c)设置在电流控制层(13b)上,第二导线的导线层(14a)设置在第二电极层(13c)上,第二导线(14)各自包括电流 控制层(13b),第二电极层(13c)和第二wi的导线层(14a) 回覆。
    • 89. 发明申请
    • NONVOLATILE MEMORY ELEMENT AND MANUFACTURING METHOD THEREOF
    • 非易失性存储元件及其制造方法
    • US20110233511A1
    • 2011-09-29
    • US13132822
    • 2009-12-04
    • Yoshio KawashimaTakumi MikawaZhiqiang WeiAtsushi Himeno
    • Yoshio KawashimaTakumi MikawaZhiqiang WeiAtsushi Himeno
    • H01L47/00H01L21/02
    • H01L27/0688H01L27/101H01L27/2409H01L27/2418H01L27/2436H01L27/2472H01L45/08H01L45/1233H01L45/146H01L45/1608
    • A nonvolatile memory element (10) of the present invention comprises a substrate (11); a lower electrode layer (15) and a resistive layer (16) sequentially formed on the substrate (11); a resistance variable layer (31) formed on the resistive layer (16); a wire layer (20) formed above the lower electrode layer (15); an interlayer insulating layer (17) disposed between the substrate (11) and the wire layer (20) and covering at least the lower electrode layer (15) and the resistive layer (16), the interlayer insulating layer being provided with a contact hole (26) extending from the wire layer (20) to the resistance variable layer (31); and an upper electrode layer (19) formed inside the contact hole (26) such that the upper electrode layer is connected to the resistance variable layer (31) and to the wire layer (20); resistance values of the resistance variable layer (31) changing reversibly in response to electric pulses applied between the lower electrode layer (15) and the upper electrode layer (19).
    • 本发明的非易失性存储元件(10)包括衬底(11); 依次形成在所述基板(11)上的下电极层(15)和电阻层(16)。 形成在电阻层(16)上的电阻变化层(31); 在所述下电极层(15)的上方形成的导线层(20)。 设置在所述基板(11)和所述导线层(20)之间并且至少覆盖所述下电极层(15)和所述电阻层(16)的层间绝缘层(17),所述层间绝缘层设置有接触孔 (26)从所述导线层(20)延伸到所述电阻变化层(31); 以及形成在所述接触孔(26)内部的上电极层(19),使得所述上电极层连接到所述电阻变化层(31)和所述导线层(20); 电阻变化层(31)的电阻值响应于施加在下电极层(15)和上电极层(19)之间的电脉冲而可逆地变化。