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71. 发明授权

US07514282B2 Patterned silicon submicron tubes 失效
标题翻译：图案硅亚微米管
公开(公告)号：US07514282B2
公开(公告)日：2009-04-07
申请号：US11649634
申请日：2007-01-04
申请人： Tingkai Li , Jong-Jan Lee , Jer-Shen Maa , Sheng Teng Hsu
发明人： Tingkai Li , Jong-Jan Lee , Jer-Shen Maa , Sheng Teng Hsu
IPC分类号： H01L21/00
CPC分类号： H01L29/0665 , B82Y10/00 , H01L21/306 , H01L29/0669 , H01L29/0673 , Y10S977/743
摘要： An array of submicron silicon (Si) tubes is provided with a method for patterning submicron Si tubes. The method provides a Si substrate, and forms a silicon dioxide film overlying the Si substrate. An array of silicon dioxide rods is formed from the silicon dioxide film, and Si3N4 tubes are formed surrounding the silicon dioxide rods. The silicon dioxide rods are etched away. Then, exposed regions of the Si substrate are etched, forming Si tubes underlying the Si3N4 tubes. Finally, the Si3N4 tubes are removed.
摘要翻译：亚微米硅（Si）管的阵列具有用于构图亚微米Si管的方法。该方法提供Si衬底，并形成覆盖Si衬底的二氧化硅膜。由二氧化硅膜形成二氧化硅棒阵列，在二氧化硅棒周围形成Si 3 N 4管。二氧化硅棒被蚀刻掉。然后，蚀刻Si衬底的暴露区域，形成Si 3 N 4管下面的Si管。最后，去除Si3N4管。

72. 发明申请

US20080315255A1 Thermal Expansion Transition Buffer Layer for Gallium Nitride on Silicon 审中-公开
标题翻译：硅上氮化镓的热膨胀转变缓冲层
公开(公告)号：US20080315255A1
公开(公告)日：2008-12-25
申请号：US12199144
申请日：2008-08-27
申请人： Jer-Shen Maa , Tingkai Li , Douglas J. Tweet , Gregory M. Stecker , Sheng Teng Hsu
发明人： Jer-Shen Maa , Tingkai Li , Douglas J. Tweet , Gregory M. Stecker , Sheng Teng Hsu
IPC分类号： H01L29/267
CPC分类号： H01L29/267 , H01L21/02381 , H01L21/02433 , H01L21/0245 , H01L21/02458 , H01L21/02502 , H01L21/0251 , H01L21/0254 , H01L21/02656 , H01L29/045 , H01L29/2003
摘要： A method is provided for forming a matching thermal expansion interface between silicon (Si) and gallium nitride (GaN) films. The method provides a (111) Si substrate with a first thermal expansion coefficient (TEC), and forms a silicon-germanium (SiGe) film overlying the Si substrate. A buffer layer is deposited overlying the SiGe film. The buffer layer may be aluminum nitride (AlN) or aluminum-gallium nitride (AlGaN). A GaN film is deposited overlying the buffer layer having a second TEC, greater than the first TEC. The SiGe film has a third TEC, with a value in between the first and second TECs. In one aspect, a graded SiGe film may be formed having a Ge content ratio in a range of about 0% to 50%, where the Ge content increases with the graded SiGe film thickness.
摘要翻译：提供了一种在硅（Si）和氮化镓（GaN）膜之间形成匹配的热膨胀界面的方法。该方法提供具有第一热膨胀系数（TEC）的（111）Si衬底，并且形成覆盖Si衬底的硅 - 锗（SiGe）膜。沉积SiGe膜上的缓冲层。缓冲层可以是氮化铝（AlN）或铝 - 氮化镓（AlGaN）。沉积GaN缓冲层，其具有大于第一TEC的第二TEC。 SiGe电影拥有第三个TEC，其值在第一和第二TEC之间。一方面，可以形成具有Ge含量比在约0％至50％的范围内的等级SiGe膜，其中Ge含量随着梯度SiGe膜厚度而增加。

73. 发明授权

US07407858B2 Resistance random access memory devices and method of fabrication 有权
标题翻译：电阻随机存取存储器件及其制造方法
公开(公告)号：US07407858B2
公开(公告)日：2008-08-05
申请号：US11403020
申请日：2006-04-11
申请人： Tingkai Li , Sheng Teng Hsu , David R. Evans
发明人： Tingkai Li , Sheng Teng Hsu , David R. Evans
IPC分类号： H01L21/336 , H01L31/072
CPC分类号： H01L45/04 , H01L45/1233 , H01L45/147 , H01L45/1616 , H01L45/1641
摘要： A method of fabricating a RRAM includes preparing a substrate and forming a bottom electrode ori the substrate. A PCMO layer is deposited on the bottom electrode using MOCVD or liquid MOCVD, followed by a post-annealing process. The deposited PCMO thin film has a crystallized PCMO structure or a nano-size and amorphous PCMO structure. A top electrode is formed on the PCMO layer.
摘要翻译：制造RRAM的方法包括制备衬底并形成底部电极或衬底。使用MOCVD或液体MOCVD将PCMO层沉积在底部电极上，随后进行后退火处理。沉积的PCMO薄膜具有结晶的PCMO结构或纳米尺寸和无定形PCMO结构。顶部电极形成在PCMO层上。

74. 发明申请

US20080050872A1 Fabrication of a high speed RRAM having narrow pulse width programming capabilities 审中-公开
标题翻译：制造具有窄脉冲编程能力的高速RRAM
公开(公告)号：US20080050872A1
公开(公告)日：2008-02-28
申请号：US11510428
申请日：2006-08-24
申请人： Sheng Teng Hsu , Tingkai Li
发明人： Sheng Teng Hsu , Tingkai Li
IPC分类号： H01L21/8244 , H01L21/8234
CPC分类号： H01L27/101 , H01L45/04 , H01L45/1253 , H01L45/147
摘要： A method of selecting a cathode material and a resistance material for use in a RRAM includes determining the work function of a group of potential resistance materials; determining the work function of a group of potential cathode materials; and selecting a suitable material for the resistance material from the group of potential resistance materials and selecting a suitable material for the cathode material from the group of potential cathode material, wherein the work function of the cathode material is at least 0.2 eV less than the work function of the resistance material.
摘要翻译：选择用于RRAM的阴极材料和电阻材料的方法包括确定一组电阻材料的功函数; 确定一组潜在阴极材料的功函数; 并从潜在的电阻材料组中选择合适的电阻材料材料，并从潜在的阴极材料组中选择合适的阴极材料材料，其中阴极材料的功函数比工件小至少0.2eV 电阻材料的功能。

75. 发明申请

US20070278574A1 Compound semiconductor-on-silicon wafer with a thermally soft insulator 审中-公开
标题翻译：具有热软绝缘体的复合半导体硅片
公开(公告)号：US20070278574A1
公开(公告)日：2007-12-06
申请号：US11443144
申请日：2006-05-30
申请人： Sheng Teng Hsu , Tingkai Li , Jong-Jan Lee
发明人： Sheng Teng Hsu , Tingkai Li , Jong-Jan Lee
IPC分类号： H01L27/12 , H01L21/84
CPC分类号： H01L21/02381 , H01L21/0245 , H01L21/02488 , H01L21/02505 , H01L21/02529 , H01L21/02538 , H01L21/7624
摘要： A method is provided for forming a compound semiconductor-on-silicon (Si) wafer with a thermally soft insulator. The method forms a Si substrate, with a thermally soft insulator layer overlying the Si substrate. A silicon oxide layer is formed immediately overlying the thermally soft insulator layer, a top Si layer overlies the silicon oxide, and a lattice mismatch buffer layer overlies the top Si layer. A compound semiconductor layer is formed overlying the lattice mismatch buffer layer. The thermally soft insulator has a liquid phase temperature lower than the liquid phase temperatures of Si and the compound semiconductor. For example, the thermally soft insulator may have a flow temperature in the range of about 500° C. to 900° C., where the flow temperature is greater than the solid phase temperature and less than the liquid phase temperature.
摘要翻译：提供了一种用热软性绝缘体形成硅化合物半导体（Si）晶片的方法。该方法形成Si衬底，具有覆盖Si衬底的热软绝缘层。形成刚好覆盖在热软绝缘体层上的氧化硅层，顶部Si层覆盖在氧化硅上，并且晶格失配缓冲层覆盖在顶部Si层上。形成覆盖晶格失配缓冲层的化合物半导体层。该热软绝缘体的液相温度低于Si和化合物半导体的液相温度。例如，热软绝缘体可以具有在约500℃至900℃的范围内的流动温度，其中流动温度大于固相温度并且小于液相温度。

76. 发明授权

US07303971B2 MSM binary switch memory device 有权
标题翻译： MSM二进制开关存储器件
公开(公告)号：US07303971B2
公开(公告)日：2007-12-04
申请号：US11184660
申请日：2005-07-18
申请人： Sheng Teng Hsu , Tingkai Li
发明人： Sheng Teng Hsu , Tingkai Li
IPC分类号： H01L21/20
CPC分类号： H01L27/101 , G11C13/0007 , G11C2213/31 , H01L27/2409 , H01L27/2463 , H01L29/66143 , H01L29/872 , H01L45/04 , H01L45/1233 , H01L45/147
摘要： A metal/semiconductor/metal (MSM) binary switch memory device and fabrication process are provided. The device includes a memory resistor bottom electrode, a memory resistor material over the memory resistor bottom electrode, and a memory resistor top electrode over the memory resistor material. An MSM bottom electrode overlies the memory resistor top electrode, a semiconductor layer overlies the MSM bottom electrode, and an MSM top electrode overlies the semiconductor layer. The MSM bottom electrode can be a material such as Pt, Ir, Au, Ag, TiN, or Ti. The MSM top electrode can be a material such as Pt, Ir, Au, TiN, Ti, or Al. The semiconductor layer can be amorphous Si, ZnO2, or InO2.
摘要翻译：提供金属/半导体/金属（MSM）二进制开关存储器件和制造工艺。该器件包括存储器电阻器底部电极，存储器电阻器底部电极上方的存储器电阻器材料，以及存储器电阻器材料上的存储器电阻器顶部电极。 MSM底部电极覆盖存储电阻器顶部电极，半导体层覆盖在MSM底部电极上，并且MSM顶部电极覆盖半导体层。 MSM底部电极可以是诸如Pt，Ir，Au，Ag，TiN或Ti的材料。 MSM顶部电极可以是诸如Pt，Ir，Au，TiN，Ti或Al的材料。半导体层可以是非晶Si，ZnO 2或InO 2。

77. 发明授权

US07297642B2 Sputter-deposited rare earth element-doped silicon oxide film with silicon nanocrystals for electroluminescence applications 失效
标题翻译：溅射沉积的稀土元素掺杂氧化硅膜与硅纳米晶体用于电致发光应用
公开(公告)号：US07297642B2
公开(公告)日：2007-11-20
申请号：US11334015
申请日：2006-01-18
申请人： Wei Gao , Tingkai Li , Robert A. Barrowcliff , Yoshi Ono , Sheng Teng Hsu
发明人： Wei Gao , Tingkai Li , Robert A. Barrowcliff , Yoshi Ono , Sheng Teng Hsu
IPC分类号： H01L21/31
CPC分类号： H05B33/145 , H01L21/3115 , H01L31/03046 , Y02E10/544
摘要： A method is provided for forming a rare earth (RE) element-doped silicon (Si) oxide film with nanocrystalline (nc) Si particles. The method comprises: providing a first target of Si, embedded with a first rare earth element; providing a second target of Si; co-sputtering the first and second targets; forming a Si-rich Si oxide (SRSO) film on a substrate, doped with the first rare earth element; and, annealing the rare earth element-doped SRSO film. The first target is doped with a rare earth element such as erbium (Er), ytterbium (Yb), cerium (Ce), praseodymium (Pr), or terbium (Tb). The sputtering power is in the range of about 75 to 300 watts (W). Different sputtering powers are applied to the two targets. Also, deposition can be controlled by varying the effective areas of the two targets. For example, one of the targets can be partially covered.
摘要翻译：提供了一种用于形成具有纳米晶体（nc）Si颗粒的稀土（RE）元素掺杂硅（Si）氧化物膜的方法。该方法包括：提供嵌入有第一稀土元素的Si的第一靶; 提供Si的第二个目标; 共溅射第一和第二个目标; 在掺杂有第一稀土元素的衬底上形成富Si氧化硅（SRSO）膜; 并对稀土元素掺杂的SRSO膜退火。第一靶用铒（Er），镱（Yb），铈（Ce），镨（Pr）或铽（Tb）等稀土元素掺杂。溅射功率在约75至300瓦（W）的范围内。不同的溅射功率被应用于两个目标。此外，可以通过改变两个目标的有效面积来控制沉积。例如，其中一个目标可以被部分覆盖。

78. 发明申请

US20070238239A1 Rare earth element-doped oxide precursor with silicon nanocrystals 失效
标题翻译：具有硅纳米晶体的稀土元素掺杂氧化物前体
公开(公告)号：US20070238239A1
公开(公告)日：2007-10-11
申请号：US11224549
申请日：2005-09-12
申请人： Wei-Wei Zhuang , Yoshi Ono , Sheng Teng-Hsu , Tingkai Li
发明人： Wei-Wei Zhuang , Yoshi Ono , Sheng Teng-Hsu , Tingkai Li
IPC分类号： H01L21/8238
CPC分类号： H01L21/02156 , H01L21/02282 , H01L21/316
摘要： A method is provided for forming a rare earth element-doped silicon oxide (SiO2) precursor with nanocrystalline (nc) Si particles. In one aspect the method comprises: mixing Si particles into a first organic solvent, forming a first solution with a first boiling point; filtering the first solution to remove large Si particles; mixing a second organic solvent having a second boiling point, higher than the first boiling point, to the filtered first solution; and, fractionally distilling, forming a second solution of nc Si particles. The Si particles are formed by immersing a Si wafer into a third solution including hydrofluoric (HF) acid and alcohol, applying an electric bias, and forming a porous Si layer overlying the Si wafer. Then, the Si particles are mixed into the organic solvent by depositing the Si wafer into the first organic solvent, and ultrasonically removing the porous Si layer from the Si wafer.
摘要翻译：提供了用纳米晶体（nc）Si颗粒形成稀土元素掺杂的氧化硅（SiO 2）前体的方法。一方面，该方法包括：将Si颗粒混合到第一有机溶剂中，形成具有第一沸点的第一溶液; 过滤第一溶液以除去大的Si颗粒; 将具有高于第一沸点的第二沸点的第二有机溶剂与过滤的第一溶液混合; 并分馏，形成nc Si颗粒的第二溶液。通过将Si晶片浸入包括氢氟酸（HF）酸和醇的第三溶液中，施加电偏压并形成覆盖Si晶片的多孔Si层，形成Si颗粒。然后，通过将Si晶片沉积到第一有机溶剂中，将Si颗粒混入有机溶剂中，并从Si晶片超声波除去多孔Si层。

79. 发明授权

US07256426B2 Rare earth element-doped silicon/silicon dioxide lattice structure 失效
标题翻译：稀土元素掺杂硅/二氧化硅晶格结构
公开(公告)号：US07256426B2
公开(公告)日：2007-08-14
申请号：US11039463
申请日：2005-01-19
申请人： Tingkai Li , Wei Gao , Yoshi Ono , Sheng Teng Hsu
发明人： Tingkai Li , Wei Gao , Yoshi Ono , Sheng Teng Hsu
IPC分类号： H01L27/15 , H01L21/00
CPC分类号： C23C14/16 , C03C17/34 , C23C14/10 , C23C28/322 , C23C28/323 , C23C28/345 , C23C28/3455 , C23C28/42 , H01L21/02164 , H01L21/02266 , H01L21/0237 , H01L21/02532 , H01L21/02573 , H01L21/0259 , H01L21/02631 , H01L21/02667 , H01L21/31608 , H01L33/26
摘要： Provided are an electroluminescence (EL) device and corresponding method for forming a rare earth element-doped silicon (Si)/Si dioxide (SiO2) lattice structure. The method comprises: providing a substrate; DC sputtering a layer of amorphous Si overlying the substrate; DC sputtering a rare earth element; in response, doping the Si layer with the rare earth element; DC sputtering a layer of SiO2 overlying the rare earth-doped Si; forming a lattice structure; annealing; and, in response to the annealing, forming nanocrystals in the rare-earth doped Si having a grain size in the range of 1 to 5 nanometers (nm). In one aspect, the rare earth element and Si are co-DC sputtered. Typically, the steps of DC sputtering Si, DC sputtering the rare earth element, and DC sputtering the SiO2 are repeated 5 to 60 cycles, so that the lattice structure includes the plurality (5-60) of alternating SiO2 and rare earth element-doped Si layers.
摘要翻译：提供了一种用于形成稀土元素掺杂硅（Si）/二氧化硅（SiO 2）晶格结构的电致发光（EL）器件和相应的方法。该方法包括：提供衬底; DC溅射覆盖衬底的非晶硅层; 直流溅射稀土元素; 作为响应，用稀土元素掺杂Si层; DC溅射一层SiO 2，覆盖稀土掺杂的Si; 形成晶格结构; 退火; 并且响应于退火，在具有1至5纳米（nm）范围内的晶粒尺寸的稀土掺杂Si中形成纳米晶体。一方面，稀土元素和Si共溅射。通常，DC溅射Si，DC溅射稀土元素和DC溅射SiO 2的步骤重复5至60个循环，使得晶格结构包括多个（5-60）交替的SiO 2和稀土元素掺杂 Si层。

80. 发明授权

US07235407B2 System and method for forming a bipolar switching PCMO film 有权
标题翻译：用于形成双极开关PCMO膜的系统和方法
公开(公告)号：US07235407B2
公开(公告)日：2007-06-26
申请号：US10855942
申请日：2004-05-27
申请人： Tingkai Li , Lawrence J. Charneski , Wei-Wei Zhuang , David R. Evans , Sheng Teng Hsu
发明人： Tingkai Li , Lawrence J. Charneski , Wei-Wei Zhuang , David R. Evans , Sheng Teng Hsu
IPC分类号： H01L21/00
CPC分类号： H01L45/04 , H01L45/1233 , H01L45/147 , H01L45/1616
摘要： A multi-layer PrxCa1-xMnO3 (PCMO) thin film capacitor and associated deposition method are provided for forming a bipolar switching thin film. The method comprises: forming a bottom electrode; depositing a nanocrystalline PCMO layer; depositing a polycrystalline PCMO layer; forming a multi-layer PCMO film with bipolar switching properties; and, forming top electrode overlying the PCMO film. If the polycrystalline layers are deposited overlying the nanocrystalline layers, a high resistance can be written with narrow pulse width, negative voltage pulses. The PCMO film can be reset to a low resistance using a narrow pulse width, positive amplitude pulse. Likewise, if the nanocrystalline layers are deposited overlying the polycrystalline layers, a high resistance can be written with narrow pulse width, positive voltage pulses, and reset to a low resistance using a narrow pulse width, negative amplitude pulse.
摘要翻译：提供了多层Pr 1 x 1 x x MnO 3（PCMO）薄膜电容器和相关的沉积方法，用于形成双极开关薄膜。该方法包括：形成底部电极; 沉积纳米晶体PCMO层; 沉积多晶的PCMO层; 形成具有双极开关特性的多层PCMO膜; 并且形成覆盖PCMO膜的顶部电极。如果多晶层沉积在纳米晶层之上，则可以用窄脉冲宽度，负电压脉冲写入高电阻。 PCMO膜可以使用窄脉冲宽度，正幅度脉冲复位为低电阻。同样，如果纳米晶层沉积在多晶层上，则可以用窄脉冲宽度，正电压脉冲写入高电阻，并使用窄脉冲宽度，负幅度脉冲将其复位为低电阻。

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