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    • 74. 发明授权
    • Method of fabricating trench isolated cross-point memory array
    • 制造沟槽隔离交叉点存储器阵列的方法
    • US06972211B2
    • 2005-12-06
    • US10971263
    • 2004-10-21
    • Sheng Teng HsuWei PanWei-Wei Zhuang
    • Sheng Teng HsuWei PanWei-Wei Zhuang
    • G11C11/15G11C11/56G11C13/00H01L27/24H10L21/00H10L21/20H10L21/3205H10L21/8222
    • G11C11/15G11C11/5685G11C13/0007G11C13/004G11C2213/31G11C2213/72G11C2213/77H01L27/24
    • Resistive cross-point memory devices are provided, along with methods of manufacture and use. The memory devices are comprised by an active layer of resistive memory material interposed between upper electrodes and lower electrodes. A bit region located within the resistive memory material at the cross-point of an upper electrode and a lower electrode has a resistivity that can change through a range of values in response to application of one, or more, voltage pulses. Voltage pulses may be used to increase the resistivity of the bit region, decrease the resistivity of the bit region, or determine the resistivity of the bit region. A diode is formed between at the interface between the resistive memory material and the lower electrodes, which may be formed as doped regions, isolated from each other by shallow trench isolation. The resistive cross-point memory device is formed by doping lines, which are separated from each other by shallow trench isolation, within a substrate one polarity, and then doping regions of the lines the opposite polarity to form diodes. Bottom electrodes are then formed over the diodes with a layer of resistive memory material overlying the bottom electrodes. Top electrodes may then be added at an angled to form a cross-point array defined by the lines and the top electrodes.
    • 提供了电阻式交叉点存储器件,以及制造和使用方法。 存储器件由介于上电极和下电极之间的电阻存储器材料的有源层组成。 在上电极和下电极的交叉点处位于电阻性存储器材料内的位区域具有响应于施加一个或更多个电压脉冲而能够在一定范围内变化的电阻率。 可以使用电压脉冲来增加比特区域的电阻率,降低比特区域的电阻率,或者确定比特区域的电阻率。 在电阻性存储器材料和下部电极之间的界面处形成二极管,其可以形成为通过浅沟槽隔离彼此隔离的掺杂区域。 电阻交叉点存储器件通过在衬底内通过浅沟槽隔离彼此分离的线路形成一个极性,然后将相反极性的线的掺杂区域形成二极管来形成。 然后在二极管上形成一层电阻记忆材料覆盖底部电极的底部电极。 然后可以以倾斜的角度添加顶部电极以形成由线和顶部电极限定的交叉点阵列。
    • 75. 发明授权
    • Trench isolated cross-point memory array
    • 沟槽隔离交叉点存储器阵列
    • US06940113B2
    • 2005-09-06
    • US10971203
    • 2004-10-21
    • Sheng Teng HsuWei PanWei-Wei Zhuang
    • Sheng Teng HsuWei PanWei-Wei Zhuang
    • G11C11/15G11C11/56G11C13/00H01L27/24H01L29/76H01L29/94H01L31/062H01L31/113
    • G11C11/15G11C11/5685G11C13/0007G11C13/004G11C2213/31G11C2213/72G11C2213/77H01L27/24
    • Resistive cross-point memory devices are provided, along with methods of manufacture and use. The memory devices are comprised by an active layer of resistive memory material interposed between upper electrodes and lower electrodes. A bit region located within the resistive memory material at the cross-point of an upper electrode and a lower electrode has a resistivity that can change through a range of values in response to application of one, or more, voltage pulses. Voltage pulses may be used to increase the resistivity of the bit region, decrease the resistivity of the bit region, or determine the resistivity of the bit region. A diode is formed between at the interface between the resistive memory material and the lower electrodes, which may be formed as doped regions, isolated from each other by shallow trench isolation. The resistive cross-point memory device is formed by doping lines, which are separated from each other by shallow trench isolation, within a substrate one polarity, and then doping regions of the lines the opposite polarity to form diodes. Bottom electrodes are then formed over the diodes with a layer of resistive memory material overlying the bottom electrodes. Top electrodes may then be added at an angled to form a cross-point array defined by the lines and the top electrodes.
    • 提供了电阻式交叉点存储器件,以及制造和使用方法。 存储器件由介于上电极和下电极之间的电阻存储器材料的有源层组成。 在上电极和下电极的交叉点处位于电阻性存储器材料内的位区域具有响应于施加一个或更多个电压脉冲而能够在一定范围内变化的电阻率。 可以使用电压脉冲来增加比特区域的电阻率,降低比特区域的电阻率,或者确定比特区域的电阻率。 在电阻性存储器材料和下部电极之间的界面处形成二极管,其可以形成为通过浅沟槽隔离彼此隔离的掺杂区域。 电阻交叉点存储器件通过在衬底内通过浅沟槽隔离彼此分离的线路形成一个极性,然后将相反极性的线的掺杂区域形成二极管来形成。 然后在二极管上形成一层电阻记忆材料覆盖底部电极的底部电极。 然后可以以倾斜的角度添加顶部电极以形成由线和顶部电极限定的交叉点阵列。
    • 78. 发明授权
    • Copper metal precursor
    • 铜金属前体
    • US06764537B2
    • 2004-07-20
    • US10453829
    • 2003-06-02
    • Wei-Wei ZhuangLawrence J. CharneskiDavid R. EvansSheng Teng Hsu
    • Wei-Wei ZhuangLawrence J. CharneskiDavid R. EvansSheng Teng Hsu
    • C23C1618
    • H01L21/28556C23C16/18
    • A method for chemical vapor deposition of copper metal thin film on a substrate includes heating a substrate onto which the copper metal thin film is to be deposited in a chemical vapor deposition chamber; vaporizing a precursor containing the copper metal, wherein the precursor is a compound of (&agr;-methylstyrene)Cu(I)(hfac), where hfac is hexafluoroacetylacetonate, and (hfac)Cu(I)L, where L is an alkene; introducing the vaporized precursor into the chemical vapor deposition chamber adjacent the heated substrate; and condensing the vaporized precursor onto the substrate thereby depositing copper metal onto the substrate. A copper metal precursor for use in the chemical vapor deposition of a copper metal thin film is a compound of (&agr;-methylstyrene)Cu(I)(hfac), where hfac is hexafluoroacetylacetonate, and (hfac)Cu(I)L, where L is an alkene taken from the group of alkenes consisting of 1-pentene, 1-hexene and trimethylvinylsilane.
    • 铜基金属薄膜在基板上进行化学气相沉积的方法包括在化学气相沉积室中加热要沉积铜金属薄膜的基板; 蒸发含有铜金属的前体,其中前体是(α-甲基苯乙烯)Cu(I)(hfac)的化合物,其中hfac是六氟乙酰丙酮化物,和(hfac)Cu(I)L,其中L是烯烃; 将蒸发的前体引入与加热的基底相邻的化学气相沉积室; 并将蒸发的前体冷凝到基底上,从而将铜金属沉积到基底上。 用于铜金属薄膜的化学气相沉积的铜金属前体是(α-甲基苯乙烯)Cu(I)(hfac)的化合物,其中hfac是六氟乙酰丙酮化物,和(hfac)Cu(I)L,其中 L是从由1-戊烯,1-己烯和三甲基乙烯基硅烷组成的烯烃族中获得的烯烃。