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61. 发明授权

US08001305B2 System and dynamic random access memory device having a receiver 有权
标题翻译：具有接收器的系统和动态随机存取存储器件
公开(公告)号：US08001305B2
公开(公告)日：2011-08-16
申请号：US12479679
申请日：2009-06-05
申请人： Mark A. Horowitz , Richard M. Barth , Craig E. Hampel , Alfredo Moncayo , Kevin S. Donnelly , Jared L. Zerbe
发明人： Mark A. Horowitz , Richard M. Barth , Craig E. Hampel , Alfredo Moncayo , Kevin S. Donnelly , Jared L. Zerbe
IPC分类号： G06F13/00
CPC分类号： G06F13/4291 , G06F3/061 , G06F3/0611 , G06F3/0619 , G06F3/0658 , G06F3/0661 , G06F3/0679 , G06F3/0688 , G06F12/0246 , G06F12/1081 , G06F13/102 , G06F13/1689 , G06F13/364 , G06F13/4072 , G06F13/4086 , G06F13/4234 , G06F13/4243 , G06F2206/1014 , G06F2212/7201 , G11C5/04 , G11C5/063 , G11C7/1048 , G11C7/1072 , G11C7/22 , G11C7/222 , G11C16/32 , G11C19/00 , H03K19/00384 , H03K19/018585
摘要： A dynamic random access memory device (DRAM) receiver circuit includes an input to receive a data signal, and also includes decision circuitry to make a decision about the received data signal based on a present sampled data signal and a coefficient value corresponding to at least one of a previously sampled data signals.
摘要翻译：动态随机存取存储器件（DRAM）接收器电路包括用于接收数据信号的输入端，并且还包括判定电路，用于基于当前采样的数据信号和对应于至少一个的先前采样的数据信号。

62. 发明申请

US20110140741A1 INTEGRATING RECEIVER WITH PRECHARGE CIRCUITRY 有权
标题翻译：用前置电路集成接收器
公开(公告)号：US20110140741A1
公开(公告)日：2011-06-16
申请号：US12897661
申请日：2010-10-04
申请人： Jared L. Zerbe , Bruno W. Garlepp , Pak S. Chau , Kevin S. Donnelly , Mark A. Horowitz , Stefanos Sidiropoulos , Billy W. Garrett, JR. , Carl W. Werner
发明人： Jared L. Zerbe , Bruno W. Garlepp , Pak S. Chau , Kevin S. Donnelly , Mark A. Horowitz , Stefanos Sidiropoulos , Billy W. Garrett, JR. , Carl W. Werner
IPC分类号： G01R19/00
CPC分类号： H04L25/4917 , G06F13/1678 , G06F13/4068 , G11C7/10 , G11C7/1051 , G11C7/1057 , G11C7/106 , G11C7/1072 , G11C7/1078 , G11C7/1084 , G11C7/1087 , G11C7/22 , G11C8/10 , G11C11/56 , G11C27/02 , G11C2207/108 , H04L7/0331 , H04L7/0332 , H04L25/0272 , H04L25/0282 , H04L25/0296 , H04L25/0298 , H04L25/03006 , H04L25/03057 , H04L25/08 , H04L25/4902
摘要： A multiphase receiver to compensate for intersymbol interference in the sampling of an input signal includes a first integrating receiver to integrate and sample data of the input signal on a first phase of a clock and a second integrating receiver to integrate and sample data of the input signal on a second phase of the clock. The multiphase receiver also includes an equalization circuit to adjust integration by the first integrating receiver dependent on a result of integration of data previously received by an integrating receiver distinct from the first integrating receiver, and to adjust integration by the second integrating receiver dependent on a result of integration of data previously received by an integrating receiver distinct from the second integrating receiver.
摘要翻译：用于补偿输入信号采样中的符号间干扰的多相接收机包括：第一积分接收器，用于在时钟的第一相位上对输入信号的数据进行积分和采样;以及第二积分接收器，对输入信号的数据进行积分和采样在时钟的第二阶段。多相接收机还包括均衡电路，用于根据先前由不同于第一积分接收器的积分接收器接收到的数据的积分结果来调整由第一积分接收器的积分，并根据结果调整第二积分接收器的积分对由先前由不同于第二积分接收器的积分接收器接收的数据的积分。

63. 发明申请

US20090327789A1 Memory System with Calibrated Data Communication 有权
标题翻译：具有校准数据通信的存储系统
公开(公告)号：US20090327789A1
公开(公告)日：2009-12-31
申请号：US12430836
申请日：2009-04-27
申请人： Jared LeVan Zerbe , Kevin S. Donnelly , Stefanos Sidiropoulos , Donald C. Stark , Mark A. Horowitz , Leung Yu , Roxanne Vu , Jun Kim , Bruno W. Garlepp , Tsyr-Chyang Ho , Benedict Chung-Kwong Lau
发明人： Jared LeVan Zerbe , Kevin S. Donnelly , Stefanos Sidiropoulos , Donald C. Stark , Mark A. Horowitz , Leung Yu , Roxanne Vu , Jun Kim , Bruno W. Garlepp , Tsyr-Chyang Ho , Benedict Chung-Kwong Lau
IPC分类号： G06F11/00 , G06F1/12
CPC分类号： G06F13/364 , G06F1/10 , G06F3/061 , G06F3/0659 , G06F3/0679 , G06F12/0246 , G06F13/1689 , G06F13/1694 , G06F13/404 , G06F13/4243 , G06F13/4282 , G06F2212/7201 , G06F2212/7207 , G11C7/1045 , H04L7/0008 , H04L7/033
摘要： A system includes a first integrated circuit device and a second integrated circuit device. The first device transmits a data sequence to the second integrated circuit device, and the second device samples the data sequence to produce receiver data. The second device then transmits the receiver data back to the first device. Within the first integrated circuit device, a comparison between the data sequence and the receiver data is performed, and based on the comparison, the first device generates information representative of a calibrated timing offset. The first device uses the information representative of the calibrated timing offset to adjust timing associated with transferring write data from the first integrated circuit to the second integrated circuit.
摘要翻译：一种系统包括第一集成电路装置和第二集成电路装置。第一设备将数据序列发送到第二集成电路设备，并且第二设备对数据序列进行采样以产生接收机数据。然后，第二设备将接收机数据发送回第一设备。在第一集成电路装置内，执行数据序列与接收机数据之间的比较，并且基于比较，第一装置产生表示经校准的定时偏移的信息。第一设备使用代表校准的定时偏移的信息来调整与从第一集成电路向第二集成电路传送写入数据相关联的定时。

64. 发明授权

US07546390B2 Integrated circuit device and signaling method with topographic dependent equalization coefficient 有权
标题翻译：集成电路装置和信号法，具有地形依赖均衡系数
公开(公告)号：US07546390B2
公开(公告)日：2009-06-09
申请号：US11929980
申请日：2007-10-30
申请人： Mark A. Horowitz , Richard M. Barth , Craig E. Hampel , Alfredo Moncayo , Kevin S. Donnelly , Jared L. Zerbe
发明人： Mark A. Horowitz , Richard M. Barth , Craig E. Hampel , Alfredo Moncayo , Kevin S. Donnelly , Jared L. Zerbe
IPC分类号： G06F13/00 , G06F12/00
CPC分类号： G06F13/4291 , G06F3/061 , G06F3/0611 , G06F3/0619 , G06F3/0658 , G06F3/0661 , G06F3/0679 , G06F3/0688 , G06F12/0246 , G06F12/1081 , G06F13/102 , G06F13/1689 , G06F13/364 , G06F13/4072 , G06F13/4086 , G06F13/4234 , G06F13/4243 , G06F2206/1014 , G06F2212/7201 , G11C5/04 , G11C5/063 , G11C7/1048 , G11C7/1072 , G11C7/22 , G11C7/222 , G11C16/32 , G11C19/00 , H03K19/00384 , H03K19/018585
摘要： An integrated circuit device includes a transmitter circuit having an output driver to output data, and a register to store a value representative of an equalization co-efficient setting of the output driver. The value may be determined based on information stored in a supplemental memory device. The value is representative of an equalization co-efficient setting that compensates for signals present on an external signal line. The signals present on the external signal line comprise one selected from residual signals and cross coupled signals.
摘要翻译：集成电路装置包括具有用于输出数据的输出驱动器的发送器电路和用于存储代表输出驱动器的均衡系数设置的值的寄存器。该值可以基于存储在补充存储器件中的信息来确定。该值表示补偿外部信号线上存在的信号的均衡系数设置。存在于外部信号线上的信号包括从残留信号和交叉耦合信号中选择的信号。

65. 发明授权

US07051130B1 Integrated circuit device that stores a value representative of a drive strength setting 有权
标题翻译：集成电路设备，其存储表示驱动强度设置的值
公开(公告)号：US07051130B1
公开(公告)日：2006-05-23
申请号：US10882879
申请日：2004-06-30
申请人： Mark A. Horowitz , Richard M. Barth , Craig E. Hampel , Alfredo Moncayo , Kevin S. Donnelly , Jared L. Zerbe
发明人： Mark A. Horowitz , Richard M. Barth , Craig E. Hampel , Alfredo Moncayo , Kevin S. Donnelly , Jared L. Zerbe
IPC分类号： G06F13/00
CPC分类号： G06F13/4086
摘要： In an integrated circuit memory device, a transmitter circuit includes an output driver that outputs data synchronously with respect to an external clock. A register stores a value representative of a drive strength setting of the output driver. The value is determined based on information stored in a supplemental memory device.
摘要翻译：在集成电路存储器件中，发射器电路包括输出驱动器，其相对于外部时钟同步地输出数据。寄存器存储代表输出驱动器的驱动强度设置的值。该值基于存储在补充存储器件中的信息来确定。

66. 发明授权

US07032058B2 Apparatus and method for topography dependent signaling 有权
标题翻译：用于地形依赖信号的装置和方法
公开(公告)号：US07032058B2
公开(公告)日：2006-04-18
申请号：US11073403
申请日：2005-03-04
申请人： Mark A. Horowitz , Richard M. Barth , Craig E. Hampel , Alfredo Moncayo , Kevin S. Donnelly , Jared L. Zerbe
发明人： Mark A. Horowitz , Richard M. Barth , Craig E. Hampel , Alfredo Moncayo , Kevin S. Donnelly , Jared L. Zerbe
IPC分类号： G06F13/00
CPC分类号： G06F13/4291 , G06F3/061 , G06F3/0611 , G06F3/0619 , G06F3/0658 , G06F3/0661 , G06F3/0679 , G06F3/0688 , G06F12/0246 , G06F12/1081 , G06F13/102 , G06F13/1689 , G06F13/364 , G06F13/4072 , G06F13/4086 , G06F13/4234 , G06F13/4243 , G06F2206/1014 , G06F2212/7201 , G11C5/04 , G11C5/063 , G11C7/1048 , G11C7/1072 , G11C7/22 , G11C7/222 , G11C16/32 , G11C19/00 , H03K19/00384 , H03K19/018585
摘要： Bus communications are optimized by adjusting signal characteristics in accordance with one or more topography dependent parameters. In a bus transmitter, a transmit signal characteristic is adjusted in accordance with a topography dependent parameter. A port in the bus transmitter receives the topography dependent parameter for later use by the parameter adjustment circuitry. The parameter adjustment circuitry adjusts a parameter control signal in accordance with the topography dependent parameter, which is coupled to the output driver. Prior to driving an output signal onto a bus, the output driver adjusts the transmit signal characteristic in accordance with the parameter control signal. Similarly, in a bus receiver, a receive signal characteristic is adjusted in response to a topography dependent parameter.
摘要翻译：通过根据一个或多个地形相关参数调整信号特性来优化总线通信。在总线发送器中，根据地形相关参数来调整发送信号特性。总线发射器中的端口接收地形相关参数，供以后由参数调整电路使用。参数调整电路根据与输出驱动器耦合的地形相关参数来调整参数控制信号。在将输出信号驱动到总线之前，输出驱动器根据参数控制信号调整发送信号特性。类似地，在总线接收器中，响应于地形相关参数来调整接收信号特性。

67. 发明授权

US06396887B1 Apparatus and method for generating a distributed clock signal using gear ratio techniques 有权
标题翻译：使用齿轮比技术生成分布式时钟信号的装置和方法
公开(公告)号：US06396887B1
公开(公告)日：2002-05-28
申请号：US09169589
申请日：1998-10-09
申请人： Frederick A. Ware , Kevin S. Donnelly , Ely K. Tsern , Srinivas Nimmagadda
发明人： Frederick A. Ware , Kevin S. Donnelly , Ely K. Tsern , Srinivas Nimmagadda
IPC分类号： H04L700
CPC分类号： G06F13/4243 , G06F1/12 , G06F5/06 , G06F7/68
摘要： The present invention provides a method and apparatus for synchronizing signal transfers between two clock domains, where the clock domains have a gear ratio relationship. A gear ratio means that the clocks are related by a ratio, such that each clock has a different integer number of clock cycles in a common period. Also, in addition to a gear ratio relationship, the clocks may have a synchronized edge at the end of the common period. For each clock, the cycles in the common period are “colored”, i.e., identified by a number (1st, 2nd, etc.). By using the coloring technique, the appropriate clock edge to perform a data or control signal transfer can be identified. The edges are preferably chosen to minimize the latency of the transfer.
摘要翻译：本发明提供一种在时钟域具有传动比关系的两个时钟域之间同步信号传输的方法和装置。齿轮比意味着时钟通过比例相关联，使得每个时钟在公共周期中具有不同的整数个时钟周期。此外，除了齿轮比关系之外，时钟可以在公共周期结束时具有同步边缘。对于每个时钟，公共周期中的周期是“着色的”，即由数字（第1，第2等）标识。通过使用着色技术，可以识别执行数据或控制信号传送的适当时钟边缘。优选地选择边缘以最小化转移的等待时间。

68. 发明授权

US06369626B1 Low pass filter for a delay locked loop circuit 失效
标题翻译：用于延迟锁定环路的低通滤波器
公开(公告)号：US06369626B1
公开(公告)日：2002-04-09
申请号：US08966721
申请日：1997-11-10
申请人： Kevin S. Donnelly , Andy Chan , Thomas H. Lee , Wayne Richardson , Jared L. Zerbe , Chaofeng Huang , Clemenz L. Portmann , Grace Tsang
发明人： Kevin S. Donnelly , Andy Chan , Thomas H. Lee , Wayne Richardson , Jared L. Zerbe , Chaofeng Huang , Clemenz L. Portmann , Grace Tsang
IPC分类号： H03L300
CPC分类号： H03K5/1565 , H03L7/0896 , H03L7/093
摘要： A low pass filter having a first mode of operation and a second mode of operation. The low pass filter includes a charging circuit, a capacitor circuit, and low power circuitry coupled to the capacitor circuit and the charging circuit. The capacitor circuit stores a first differential voltage when the low pass filter is operating in the first mode of operation. The capacitor circuit stores a second differential voltage when the low pass filter is operating in the second mode of operation. The second differential voltage is substantially equal to the first differential voltage. The charging circuit may include a charging current source coupled to a current steering circuit. The low pass filter may further include a load circuit coupled to the current steering circuit and the low power circuitry. The low pass filter may be used in a delay locked loop circuit or a phase locked loop circuit.
摘要翻译：具有第一操作模式和第二操作模式的低通滤波器。低通滤波器包括充电电路，电容器电路和耦合到电容器电路和充电电路的低功率电路。当低通滤波器在第一操作模式下操作时，电容器电路存储第一差分电压。当低通滤波器在第二操作模式下工作时，电容器电路存储第二差分电压。第二差分电压基本上等于第一差分电压。充电电路可以包括耦合到电流转向电路的充电电流源。低通滤波器还可以包括耦合到电流转向电路和低功率电路的负载电路。低通滤波器可用于延迟锁定环电路或锁相环电路中。

69. 发明授权

US06340900B1 Phase detector with minimized phase detection error 失效
公开(公告)号：US06340900B1
公开(公告)日：2002-01-22
申请号：US08582045
申请日：1996-01-02
申请人： Kevin S. Donnelly , Thomas H. Lee , Tsyr-Chyang Ho
发明人： Kevin S. Donnelly , Thomas H. Lee , Tsyr-Chyang Ho
IPC分类号： H03K526
CPC分类号： G01R25/00 , H03L7/085
摘要： A phase detector is described that includes a load circuit that presents both a high differential impedance and a low common mode impedance. The load circuit is coupled to (1) a power supply and (2) a first node and a second node. The first and second nodes form an output of the phase detector. A capacitive circuit has (1) a first capacitor coupled to the first node and ground and (2) a second capacitor coupled to the second node and ground. A first circuit is coupled to the first and second nodes for detecting a phase difference between a first signal and a second signal. A second circuit is coupled to the first and second nodes for detecting the phase difference between the first and second signals and for minimizing phase detection error of the first circuit such that the phase difference between the first and second signals can be detected with minimized phase detection error. Each of the first and second circuits receives the first and second signals and a reference signal. The second circuit is cross-coupled to the first circuit such that an error current generated by the second circuit cancels that generated by the first circuit such that the phase detector detects the phase difference between the first and second signals with minimized phase detection error.

70. 发明授权

US06321282B1 Apparatus and method for topography dependent signaling 有权
标题翻译：用于地形依赖信号的装置和方法
公开(公告)号：US06321282B1
公开(公告)日：2001-11-20
申请号：US09420949
申请日：1999-10-19
申请人： Mark A. Horowitz , Richard M. Barth , Craig E. Hampel , Alfredo Moncayo , Kevin S. Donnelly , Jared L. Zerbe
发明人： Mark A. Horowitz , Richard M. Barth , Craig E. Hampel , Alfredo Moncayo , Kevin S. Donnelly , Jared L. Zerbe
IPC分类号： G06F1300
CPC分类号： G06F13/4291 , G06F3/061 , G06F3/0611 , G06F3/0619 , G06F3/0658 , G06F3/0661 , G06F3/0679 , G06F3/0688 , G06F12/0246 , G06F12/1081 , G06F13/102 , G06F13/1689 , G06F13/364 , G06F13/4072 , G06F13/4086 , G06F13/4234 , G06F13/4243 , G06F2206/1014 , G06F2212/7201 , G11C5/04 , G11C5/063 , G11C7/1048 , G11C7/1072 , G11C7/22 , G11C7/222 , G11C16/32 , G11C19/00 , H03K19/00384 , H03K19/018585
摘要： Bus communications are optimized by adjusting signal characteristics in accordance with one or more topography dependent parameters. In a bus transmitter, a transmit signal characteristic is adjusted in accordance with a topography dependent parameter. A port in the bus transmitter receives the topography dependent parameter for later use by the parameter adjustment circuitry. The parameter adjustment circuitry adjusts a parameter control signal in accordance with the topography dependent parameter, which is coupled to the output driver. Prior to driving an output signal onto a bus, the output driver adjusts the transmit signal characteristic in accordance with the parameter control signal. In a bus receiver, a receive signal characteristic is adjusted in response to a topography dependent parameter. A port associated with the bus receiver receives the topography dependent parameter and stores it in a register. Parameter adjustment circuitry adjusts a control signal in accordance with the stored topography dependent parameter. An input buffer receives an input signal from a bus coupling the receiver to a transmitter of the input signal. The input buffer generates a first signal from the input signal by adjusting a the parameter of the input signal in accordance with the control signal.
摘要翻译：通过根据一个或多个地形相关参数调整信号特性来优化总线通信。在总线发送器中，根据地形相关参数来调整发送信号特性。总线发射器中的端口接收地形相关参数，供以后由参数调整电路使用。参数调整电路根据与输出驱动器耦合的地形相关参数来调整参数控制信号。在将输出信号驱动到总线之前，输出驱动器根据参数控制信号调整发送信号特性。在总线接收机中，响应于地形相关参数来调整接收信号特性。与总线接收器相关联的端口接收地形相关参数并将其存储在寄存器中。参数调整电路根据所存储的地形相关参数调整控制信号。输入缓冲器接收来自将接收器耦合到输入信号的发射器的总线的输入信号。输入缓冲器根据控制信号通过调节输入信号的参数从输入信号产生第一信号。

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