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1. 发明授权

US06194917B1 XOR differential phase detector with transconductance circuit as output charge pump 有权
标题翻译：具有跨导电路的XOR差分相位检测器作为输出电荷泵
公开(公告)号：US06194917B1
公开(公告)日：2001-02-27
申请号：US09234608
申请日：1999-01-21
申请人： Dan Zhichao Deng
发明人： Dan Zhichao Deng
IPC分类号： H03K526
CPC分类号： H03L7/0812 , H03K19/215 , H03L7/085
摘要： An apparatus for and method of reducing transistor body effect when detecting and correcting a phase error between clock signals using delay-locked and phase-locked loop circuits. The clock signals are provided to an equal number of circuit elements in cross-coupled XOR circuits. The circuit includes a transconductance circuit having at least two PMOS transistors with their substrates directly connected to their sources.
摘要翻译：使用延迟锁定和锁相环电路检测和校正时钟信号之间的相位误差的装置和减小晶体管体效应的方法。时钟信号被提供给交叉耦合的异或电路中相等数量的电路元件。该电路包括具有至少两个PMOS晶体管的跨导电路，其基板直接连接到它们的源极。

2. 发明授权

US06340900B1 Phase detector with minimized phase detection error 失效
公开(公告)号：US06340900B1
公开(公告)日：2002-01-22
申请号：US08582045
申请日：1996-01-02
申请人： Kevin S. Donnelly , Thomas H. Lee , Tsyr-Chyang Ho
发明人： Kevin S. Donnelly , Thomas H. Lee , Tsyr-Chyang Ho
IPC分类号： H03K526
CPC分类号： G01R25/00 , H03L7/085
摘要： A phase detector is described that includes a load circuit that presents both a high differential impedance and a low common mode impedance. The load circuit is coupled to (1) a power supply and (2) a first node and a second node. The first and second nodes form an output of the phase detector. A capacitive circuit has (1) a first capacitor coupled to the first node and ground and (2) a second capacitor coupled to the second node and ground. A first circuit is coupled to the first and second nodes for detecting a phase difference between a first signal and a second signal. A second circuit is coupled to the first and second nodes for detecting the phase difference between the first and second signals and for minimizing phase detection error of the first circuit such that the phase difference between the first and second signals can be detected with minimized phase detection error. Each of the first and second circuits receives the first and second signals and a reference signal. The second circuit is cross-coupled to the first circuit such that an error current generated by the second circuit cancels that generated by the first circuit such that the phase detector detects the phase difference between the first and second signals with minimized phase detection error.

3. 发明授权

US06642746B2 Phase detector with minimized phase detection error 失效
公开(公告)号：US06642746B2
公开(公告)日：2003-11-04
申请号：US10247878
申请日：2002-09-20
申请人： Kevin S. Donnelly , Thomas H. Lee , Tsyr-Chyang Ho
发明人： Kevin S. Donnelly , Thomas H. Lee , Tsyr-Chyang Ho
IPC分类号： H03K526
CPC分类号： H03D13/008
摘要： A phase detector is described that includes a load circuit that presents both a high differential impedance and a low common mode impedance. The load circuit is coupled to (1) a power supply and (2) a first node and a second node. The first and second nodes form an output of the phase detector. A capacitive circuit has (1) a first capacitor coupled to the first node and ground and (2) a second capacitor coupled to the second node and ground. A first circuit is coupled to the first and second nodes for detecting a phase difference between a first signal and a second signal. A second circuit is coupled to the first and second nodes for detecting the phase difference between the first and second signals and for minimizing phase detection error of the first circuit such that the phase difference between the first and second signals can be detected with minimized phase detection error. Each of the first and second circuits receives the first and second signals and a reference signal. The second circuit is cross-coupled to the first circuit such that an error current generated by the second circuit cancels that generated by the first circuit such that the phase detector detects the phase difference between the first and second signals with minimized phase detection error.

4. 发明授权

US06480035B1 Phase detector with minimized phase detection error 有权
标题翻译：相位检测器，具有最小的相位检测误差
公开(公告)号：US06480035B1
公开(公告)日：2002-11-12
申请号：US09707491
申请日：2000-11-06
申请人： Kevin S. Donnelly , Thomas H. Lee , Tsyr-Chyang Ho
发明人： Kevin S. Donnelly , Thomas H. Lee , Tsyr-Chyang Ho
IPC分类号： H03K526
CPC分类号： G01R25/00 , H03L7/085
摘要： A phase detector is described that includes a load circuit that presents both a high differential impedance and a low common mode impedance. The load circuit is coupled to (1) a power supply and (2) a first node and a second node. The first and second nodes form an output of the phase detector. A capacitive circuit has (1) a first capacitor coupled to the first node and ground and (2) a second capacitor coupled to the second node and ground. A first circuit is coupled to the first and second nodes for detecting a phase difference between a first signal and a second signal. A second circuit is coupled to the first and second nodes for detecting the phase difference between the first and second signals and for minimizing phase detection error of the first circuit such that the phase difference between the first and second signals can be detected with minimized phase detection error. Each of the first and second circuits receives the first and second signals and a reference signal. The second circuit is cross-coupled to the first circuit such that an error current generated by the second circuit cancels that generated by the first circuit such that the phase detector detects the phase difference between the first and second signals with minimized phase detection error.
摘要翻译：描述了一种相位检测器，其包括呈现高差分阻抗和低共模阻抗的负载电路。负载电路耦合到（1）电源和（2）第一节点和第二节点。第一和第二节点形成相位检测器的输出。电容电路具有（1）耦合到第一节点和地的第一电容器和（2）耦合到第二节点和地的第二电容器。第一电路耦合到第一和第二节点，用于检测第一信号和第二信号之间的相位差。第二电路耦合到第一和第二节点，用于检测第一和第二信号之间的相位差，并且用于使第一电路的相位检测误差最小化，使得能够以最小相位检测来检测第一和第二信号之间的相位差错误。第一和第二电路中的每一个接收第一和第二信号和参考信号。第二电路交叉耦合到第一电路，使得由第二电路产生的误差电流消除由第一电路产生的误差电流，使得相位检测器以最小的相位检测误差检测第一和第二信号之间的相位差。

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