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51. 发明授权

US08648985B2 Liquid crystal display device 有权
标题翻译：液晶显示装置
公开(公告)号：US08648985B2
公开(公告)日：2014-02-11
申请号：US12612620
申请日：2009-11-04
申请人： Yong-Hwan Kim , Jang-Soo Kim , Hong-Suk Yoo , Seung-Soo Baek , Hwa-Yeul Oh , Jae-Ho Choi , Jong-In Kim , Sang-Hee Jang
发明人： Yong-Hwan Kim , Jang-Soo Kim , Hong-Suk Yoo , Seung-Soo Baek , Hwa-Yeul Oh , Jae-Ho Choi , Jong-In Kim , Sang-Hee Jang
IPC分类号： G02F1/1343 , G02F1/1368
CPC分类号： G02F1/136209
摘要： The present invention relates to a liquid crystal display. The liquid crystal display has a lower panel including a first pixel area having a first pixel electrode and a first light leakage preventing member, a final pixel area having a second pixel electrode and a second light leakage preventing member, and middle pixel areas disposed between the first pixel area and the final pixel area, each of the middle pixel areas including a first middle pixel electrode and a second middle pixel electrode. Accordingly, light leakage may be effectively prevented at the first pixel area and the final pixel area that are disposed on the edge.
摘要翻译：本发明涉及一种液晶显示器。液晶显示器具有包括具有第一像素电极和第一防漏光部件的第一像素区域，具有第二像素电极和第二防漏光部件的最终像素区域的下面板，以及设置在第二像素区域之间的中间像素区域第一像素区域和最终像素区域，每个中间像素区域包括第一中间像素电极和第二中间像素电极。因此，可以有效地防止在设置在边缘上的第一像素区域和最终像素区域处的光泄漏。

52. 发明授权

US08564748B2 Liquid crystal display and manufacturing method thereof 有权
标题翻译：液晶显示及其制造方法
公开(公告)号：US08564748B2
公开(公告)日：2013-10-22
申请号：US12611492
申请日：2009-11-03
申请人： Kyung-Sook Jeon , Jang-Soo Kim , Hong-Suk Yoo , Yong-Hwan Kim , Hwa-Yeul Oh , Jong-In Kim , Sang-Hee Jang
发明人： Kyung-Sook Jeon , Jang-Soo Kim , Hong-Suk Yoo , Yong-Hwan Kim , Hwa-Yeul Oh , Jong-In Kim , Sang-Hee Jang
IPC分类号： G02F1/1333
CPC分类号： G02F1/133514 , G02F1/133516 , G02F1/13394 , G02F2001/133388
摘要： Exemplary embodiments of the present invention disclose a liquid crystal display (LCD) and a method of manufacturing the same. The LCD may have a display area and a peripheral area. An organic layer of the peripheral area may be patterned using a half-tone mask, and a protrusion member may be formed in the peripheral area. Accordingly, the thin film transistor array panel and the corresponding substrate may be prevented from being temporary adhered in the peripheral area such that the density of the liquid crystal molecules filled in the peripheral area may be uniformly maintained and the display quality of the liquid crystal display may be improved.
摘要翻译：本发明的示例性实施例公开了液晶显示器（LCD）及其制造方法。 LCD可以具有显示区域和外围区域。可以使用半色调掩模对周边区域的有机层进行图案化，并且可以在周边区域中形成突起构件。因此，可以防止薄膜晶体管阵列面板和对应的基板临时粘附在周边区域中，使得可以均匀地保持填充在周边区域中的液晶分子的密度，并且液晶显示器的显示质量可以改进。

53. 发明申请

US20120098800A1 GATE DRIVER AND LIQUID CRYSTAL DISPLAY INCLUDING SAME 审中-公开
标题翻译：闸门驱动器和液晶显示器，包括它们
公开(公告)号：US20120098800A1
公开(公告)日：2012-04-26
申请号：US13070394
申请日：2011-03-23
申请人： Kwi-Hyun KIM , Jang-Soo Kim , Hyeong-Jun Jin , Soo-Chul Kim , Kyoung-Hae Min
发明人： Kwi-Hyun KIM , Jang-Soo Kim , Hyeong-Jun Jin , Soo-Chul Kim , Kyoung-Hae Min
IPC分类号： G09G3/36 , G09G5/00
CPC分类号： G09G3/3677 , G09G2300/0408 , G09G2300/0417 , G09G2300/0426 , G09G2310/0286 , G09G2330/04 , G11C19/28
摘要： Provided are a gate-lines driver circuit and a liquid crystal display (LCD) device including the same. The gate-lines driver may be in danger of being subjected to static electricity and it includes: a wiring unit which receives signals from an external source and a circuit unit which outputs driving signals in response to a plurality of control signals received from the wiring unit. The circuit unit includes a plurality of shift registers, each having shift register wirings, wherein the wiring unit includes first through n-th vertical signal lines arranged sequentially in order of distance from the shift registers, with the first vertical signal line being located farthest from the shift registers. The first vertical signal line is connected to each of the shift registers by a first horizontal connection line, and the first horizontal connection line includes a first contact portion which is formed over and contacting with the first signal line and a second contact portion which is located between the n-th vertical signal line and a boundary of the shift registers and is connected to each of the shift registers by a shift register wiring. The first horizontal connection line is structured to reduce a danger that the shift registers will be burned out by a surge of static electricity current received through the wiring unit.
摘要翻译：提供了一种栅线驱动电路和包括该电路的液晶显示器（LCD）装置。栅线驱动器可能具有受静电的危险，它包括：接收来自外部源的信号的接线单元和响应于从接线单元接收的多个控制信号而输出驱动信号的电路单元。电路单元包括多个移位寄存器，每个移位寄存器均具有移位寄存器布线，其中布线单元包括按照与移位寄存器的距离顺序依次布置的第一至第n垂直信号线，第一垂直信号线位于移位寄存器。第一垂直信号线通过第一水平连接线连接到每个移位寄存器，并且第一水平连接线包括形成在第一信号线上并与第一信号线接触的第一接触部分和位于在第n垂直信号线和移位寄存器的边界之间，并通过移位寄存器布线连接到每个移位寄存器。第一条水平连接线的结构是为了减少移位寄存器将被通过接线单元接收到的静电电流浪涌而被烧掉的危险。

54. 发明授权

US07977677B2 Thin-film transistor substrate, method of manufacturing the same and display apparatus having the same 有权
标题翻译：薄膜晶体管基板及其制造方法以及具有该薄膜晶体管基板的显示装置
公开(公告)号：US07977677B2
公开(公告)日：2011-07-12
申请号：US11840161
申请日：2007-08-16
申请人： Hye-Young Ryu , Jang-Soo Kim , Su-Hyoung Kang
发明人： Hye-Young Ryu , Jang-Soo Kim , Su-Hyoung Kang
IPC分类号： H01L29/04
CPC分类号： G02F1/136227 , G02F2001/136222 , H01L27/3258
摘要： In a thin-film transistor (TFT) substrate, a gate insulating layer is disposed on a gate electrode electrically connected to a gate line. A semiconductor layer is disposed on the gate insulating layer. A source electrode is electrically connected to a data line that intersects the gate line. A drain electrode faces the source electrode and defines a channel area of a semiconductor layer. An organic layer is disposed on the data line and has a first opening exposing the channel area. An inorganic insulating layer is disposed on the organic layer. A pixel electrode is disposed on the inorganic insulating layer and electrically connected to the drain electrode. The inorganic insulating layer covers the first opening, and thickness of the inorganic insulating layer is substantially uniform.
摘要翻译：在薄膜晶体管（TFT）基板中，栅极绝缘层设置在与栅极线电连接的栅电极上。半导体层设置在栅极绝缘层上。源极电极与与栅极线相交的数据线电连接。漏电极面对源电极并限定半导体层的沟道面积。有机层设置在数据线上，并且具有暴露通道区域的第一开口。无机绝缘层设置在有机层上。像素电极设置在无机绝缘层上并与漏电极电连接。无机绝缘层覆盖第一开口，无机绝缘层的厚度基本均匀。

55. 发明授权

US07888675B2 Thin film transistor array panel and fabrication 有权
标题翻译：薄膜晶体管阵列和制造
公开(公告)号：US07888675B2
公开(公告)日：2011-02-15
申请号：US12099718
申请日：2008-04-08
申请人： Sang-Gab Kim , Woo-Geun Lee , Shi-Yul Kim , Jin-Ho Ju , Jang-Soo Kim , Sang-Woo Whangbo , Min-Seok Oh , Hye-Young Ryu , Hong-Kee Chin
发明人： Sang-Gab Kim , Woo-Geun Lee , Shi-Yul Kim , Jin-Ho Ju , Jang-Soo Kim , Sang-Woo Whangbo , Min-Seok Oh , Hye-Young Ryu , Hong-Kee Chin
IPC分类号： H01L21/00
CPC分类号： H01L27/124 , G02F2001/13629 , H01L29/458
摘要： The present invention provides a manufacturing method of a thin film transistor array panel, which includes forming a gate line on a substrate; forming a gate insulating layer, a semiconductor layer, and an ohmic contact on the gate line; forming a first conducting film including Mo, a second conducting film including Al, and a third conducting film including Mo on the ohmic contact; forming a first photoresist pattern on the third conducting film; etching the first, second, and third conducting films, the ohmic contact, and the semiconductor layer using the first photoresist pattern as a mask; removing the first photoresist pattern by a predetermined thickness to form a second photoresist pattern; etching the first, second, and third conducting films using the second photoresist pattern as a mask to expose a portion of the ohmic contact; and etching the exposed ohmic contact using a Cl-containing gas and a F-containing gas.
摘要翻译：本发明提供一种薄膜晶体管阵列面板的制造方法，其包括在基板上形成栅极线; 在栅极线上形成栅极绝缘层，半导体层和欧姆接触; 形成包括Mo的第一导电膜，包括Al的第二导电膜和在欧姆接触上包含Mo的第三导电膜; 在所述第三导电膜上形成第一光致抗蚀剂图案; 使用第一光致抗蚀剂图案作为掩模蚀刻第一，第二和第三导电膜，欧姆接触和半导体层; 将第一光致抗蚀剂图案去除预定厚度以形成第二光致抗蚀剂图案; 使用第二光致抗蚀剂图案作为掩模蚀刻第一，第二和第三导电膜以暴露欧姆接触的一部分; 并使用含Cl气体和含F气体蚀刻暴露的欧姆接触。

56. 发明申请

US20090309099A1 DISPLAY DEVICE AND METHOD OF MANUFACTURING THE SAME 有权
标题翻译：显示装置及其制造方法
公开(公告)号：US20090309099A1
公开(公告)日：2009-12-17
申请号：US12268725
申请日：2008-11-11
申请人： Jong-In Kim , Jang-Soo Kim , Young-Wook Lee
发明人： Jong-In Kim , Jang-Soo Kim , Young-Wook Lee
IPC分类号： H01L27/08 , H01L21/77
CPC分类号： H01L27/12 , G02F1/136213 , G02F1/136227 , G02F1/136286 , G02F1/1368 , H01L27/124 , H01L27/1248 , H01L27/1288
摘要： The present invention relates to a display device and a manufacturing method thereof. The display device includes a substrate, a first conductor disposed on the substrate, a first insulating layer disposed on the first conductor, a second insulating layer disposed on the first insulating layer, a semiconductor disposed on the second insulating layer, and a second conductor disposed on the semiconductor. A thickness of the first insulating layer is greater than a thickness of the first conductor, and the first insulating layer includes a first opening exposing the first conductor.
摘要翻译：显示装置及其制造方法技术领域本发明涉及显示装置及其制造方法。显示装置包括基板，设置在基板上的第一导体，设置在第一导体上的第一绝缘层，设置在第一绝缘层上的第二绝缘层，设置在第二绝缘层上的半导体和设置在第二绝缘层上的第二导体在半导体上。第一绝缘层的厚度大于第一导体的厚度，第一绝缘层包括暴露第一导体的第一开口。

57. 发明授权

US07599015B2 Thin film transistor array panel and a method for manufacturing the same 有权
标题翻译：薄膜晶体管阵列面板及其制造方法
公开(公告)号：US07599015B2
公开(公告)日：2009-10-06
申请号：US11487837
申请日：2006-07-17
申请人： Young-Wook Lee , Jang-Soo Kim
发明人： Young-Wook Lee , Jang-Soo Kim
IPC分类号： G02F1/136
CPC分类号： H01L27/124 , G02F1/136209 , G02F1/136286 , G02F1/1365 , G02F1/1368 , G02F2001/134372 , G02F2001/136222 , G02F2001/13629 , H01L27/1248
摘要： A thin film transistor array panel includes a substrate; a plurality of gate lines that are formed on the substrate; a plurality of data lines that intersect the gate lines; a plurality of thin film transistors that are connected to the gate lines and the data lines; a plurality of color filters that are formed on upper parts of the gate lines, the data lines, and the thin film transistors; a common electrode that is formed on the color filters and that includes a transparent conductor; a passivation layer that is formed on an upper part of the common electrode; and a plurality of pixel electrodes that are formed on an upper part of the passivation layer and that are connected to a drain electrode of each of the thin film transistors.
摘要翻译：薄膜晶体管阵列面板包括基板; 形成在所述基板上的多条栅极线; 与栅极线相交的多条数据线; 连接到栅极线和数据线的多个薄膜晶体管; 形成在栅极线，数据线和薄膜晶体管的上部的多个滤色器; 形成在滤色器上并且包括透明导体的公共电极; 钝化层，其形成在所述公共电极的上部; 以及形成在钝化层的上部并且连接到每个薄膜晶体管的漏电极的多个像素电极。

58. 发明申请

US20090121228A1 ARRAY SUBSTRATE AND METHOD OF MANUFACTURING THE SAME 有权
标题翻译：阵列基板及其制造方法
公开(公告)号：US20090121228A1
公开(公告)日：2009-05-14
申请号：US12269748
申请日：2008-11-12
申请人： Jang-Soo Kim , Hong-Long Ning , Bong-Kyun Kim , Hong-Sick Park , Shi-Yul Kim , Chang-Oh Jeong , Sang-Gab Kim , Jae-Hyoung Youn , Woo-Geun Lee , Yang-Ho Bae , Pil-Sang Yun , Jong-Hyun Choung , Sun-Young Hong , Ki-Won Kim , Byeong-Jin Lee , Yopung-Wook Lee , Jong-In Kim , Byeong-Beom Kim , Nam-Seok Suh
发明人： Jang-Soo Kim , Hong-Long Ning , Bong-Kyun Kim , Hong-Sick Park , Shi-Yul Kim , Chang-Oh Jeong , Sang-Gab Kim , Jae-Hyoung Youn , Woo-Geun Lee , Yang-Ho Bae , Pil-Sang Yun , Jong-Hyun Choung , Sun-Young Hong , Ki-Won Kim , Byeong-Jin Lee , Yopung-Wook Lee , Jong-In Kim , Byeong-Beom Kim , Nam-Seok Suh
IPC分类号： H01L29/04 , H01L21/336
CPC分类号： G02F1/13458 , G02F1/136286 , G02F2001/136295 , H01L27/1218 , H01L27/124 , H01L27/1288
摘要： A gate line includes a first seed layer formed on a base substrate and a first metal layer formed on the first seed layer. A first insulation layer is formed on the base substrate. A second insulation layer is formed on the base substrate. Here, a line trench is formed through the second insulation layer in a direction crossing the gate line. A data line includes a second seed layer formed below the line trench and a second metal layer formed in the line trench. A pixel electrode is formed in a pixel area of the base substrate. Therefore, a trench of a predetermined depth is formed using an insulation layer and a metal layer is formed through a plating method, so that a metal line having a sufficient thickness may be formed.
摘要翻译：栅极线包括形成在基底基板上的第一籽晶层和形成在第一籽晶层上的第一金属层。在基底基板上形成第一绝缘层。在基底基板上形成第二绝缘层。这里，在与栅极线交叉的方向上通过第二绝缘层形成线沟槽。数据线包括形成在线沟槽下方的第二晶种层和形成在线沟槽中的第二金属层。像素电极形成在基底基板的像素区域中。因此，使用绝缘层形成预定深度的沟槽，并且通过电镀方法形成金属层，从而可以形成具有足够厚度的金属线。

59. 发明授权

US07371621B2 Thin film transistor array panel and fabrication 有权
标题翻译：薄膜晶体管阵列和制造
公开(公告)号：US07371621B2
公开(公告)日：2008-05-13
申请号：US11486330
申请日：2006-07-12
申请人： Sang-Gab Kim , Woo-Geun Lee , Shi-Yul Kim , Jin-Ho Ju , Jang-Soo Kim , Sang-Woo Whangbo , Min-Seok Oh , Hye-Young Ryu , Hong-Kee Chin
发明人： Sang-Gab Kim , Woo-Geun Lee , Shi-Yul Kim , Jin-Ho Ju , Jang-Soo Kim , Sang-Woo Whangbo , Min-Seok Oh , Hye-Young Ryu , Hong-Kee Chin
IPC分类号： H01L21/00
CPC分类号： H01L27/124 , G02F2001/13629 , H01L29/458
摘要： The present invention provides a manufacturing method of a thin film transistor array panel, which includes forming a gate line on a substrate; forming a gate insulating layer, a semiconductor layer, and an ohmic contact on the gate line; forming a first conducting film including Mo, a second conducting film including Al, and a third conducting film including Mo on the ohmic contact; forming a first photoresist pattern on the third conducting film; etching the first, second, and third conducting films, the ohmic contact, and the semiconductor layer using the first photoresist pattern as a mask; removing the first photoresist pattern by a predetermined thickness to form a second photoresist pattern; etching the first, second, and third conducting films using the second photoresist pattern as a mask to expose a portion of the ohmic contact; and etching the exposed ohmic contact using a Cl-containing gas and a F-containing gas.
摘要翻译：本发明提供一种薄膜晶体管阵列面板的制造方法，其包括在基板上形成栅极线; 在栅极线上形成栅极绝缘层，半导体层和欧姆接触; 形成包括Mo的第一导电膜，包括Al的第二导电膜和在欧姆接触上包含Mo的第三导电膜; 在所述第三导电膜上形成第一光致抗蚀剂图案; 使用第一光致抗蚀剂图案作为掩模蚀刻第一，第二和第三导电膜，欧姆接触和半导体层; 将第一光致抗蚀剂图案去除预定厚度以形成第二光致抗蚀剂图案; 使用第二光致抗蚀剂图案作为掩模蚀刻第一，第二和第三导电膜以暴露欧姆接触的一部分; 并使用含Cl气体和含F气体蚀刻暴露的欧姆接触。

60. 发明申请

US20080042135A1 THIN-FILM TRANSISTOR SUBSTRATE, METHOD OF MANUFACTURING THE SAME AND DISPLAY APPARATUS HAVING THE SAME 有权
标题翻译：薄膜晶体管基板，其制造方法和具有该薄膜晶体管基板的显示装置
公开(公告)号：US20080042135A1
公开(公告)日：2008-02-21
申请号：US11840161
申请日：2007-08-16
申请人： Hye-Young RYU , Jang-Soo Kim , Su-Hyoung Kang
发明人： Hye-Young RYU , Jang-Soo Kim , Su-Hyoung Kang
IPC分类号： H01L27/12 , H01L21/84
CPC分类号： G02F1/136227 , G02F2001/136222 , H01L27/3258
摘要： In a thin-film transistor (TFT) substrate, a gate insulating layer is disposed on a gate electrode electrically connected to a gate line. A semiconductor layer is disposed on the gate insulating layer. A source electrode is electrically connected to a data line that intersects the gate line. A drain electrode faces the source electrode and defines a channel area of a semiconductor layer. An organic layer is disposed on the data line and has a first opening exposing the channel area. An inorganic insulating layer is disposed on the organic layer. A pixel electrode is disposed on the inorganic insulating layer and electrically connected to the drain electrode. The inorganic insulating layer covers the first opening, and thickness of the inorganic insulating layer is substantially uniform.
摘要翻译：在薄膜晶体管（TFT）基板中，栅极绝缘层设置在与栅极线电连接的栅电极上。半导体层设置在栅极绝缘层上。源极电极与与栅极线相交的数据线电连接。漏电极面对源电极并限定半导体层的沟道面积。有机层设置在数据线上，并且具有暴露通道区域的第一开口。无机绝缘层设置在有机层上。像素电极设置在无机绝缘层上并与漏电极电连接。无机绝缘层覆盖第一开口，无机绝缘层的厚度基本均匀。

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