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1. 发明授权

US08723179B2 Thin film transistor panel having an etch stopper on semiconductor 有权
标题翻译：薄膜晶体管板在半导体上具有蚀刻停止层
公开(公告)号：US08723179B2
公开(公告)日：2014-05-13
申请号：US12957743
申请日：2010-12-01
申请人： Pil-Sang Yun , Ki-Won Kim , Hye-Young Ryu , Woo-Geun Lee , Seung-Ha Choi , Jae-Hyoung Youn , Kyoung-Jae Chung , Young-Wook Lee , Je-Hun Lee , Kap-Soo Yoon , Do-Hyun Kim , Dong-Ju Yang , Young-Joo Choi
发明人： Pil-Sang Yun , Ki-Won Kim , Hye-Young Ryu , Woo-Geun Lee , Seung-Ha Choi , Jae-Hyoung Youn , Kyoung-Jae Chung , Young-Wook Lee , Je-Hun Lee , Kap-Soo Yoon , Do-Hyun Kim , Dong-Ju Yang , Young-Joo Choi
IPC分类号： H01L29/04 , H01L31/036 , H01L31/0376 , H01L31/20
CPC分类号： H01L29/41733 , H01L21/44 , H01L21/441 , H01L21/465 , H01L21/475 , H01L21/47573 , H01L21/47635 , H01L27/1214 , H01L27/1225 , H01L27/127 , H01L27/1288 , H01L29/66969 , H01L29/78606 , H01L29/7869 , H01L29/78696
摘要： A thin film transistor panel includes an insulating substrate, a gate insulating layer disposed on the insulating substrate, an oxide semiconductor layer disposed on the gate insulating layer, an etch stopper disposed on the oxide semiconductor layer, and a source electrode and a drain electrode disposed on the etch stopper.
摘要翻译：薄膜晶体管面板包括绝缘基板，设置在绝缘基板上的栅极绝缘层，设置在栅极绝缘层上的氧化物半导体层，设置在氧化物半导体层上的蚀刻停止器，以及设置在源极电极和漏极上的在蚀刻停止器上。

2. 发明授权

US08304299B2 Thin film transistor substrate and manufacturing method thereof 有权
标题翻译：薄膜晶体管基板及其制造方法
公开(公告)号：US08304299B2
公开(公告)日：2012-11-06
申请号：US12821668
申请日：2010-06-23
申请人： Sung-Ryul Kim , Jean-Ho Song , Jae-Hyoung Youn , O-Sung Seo , Byeong-Beom Kim , Je-Hyeong Park , Jong-In Kim , Jae-Jin Song
发明人： Sung-Ryul Kim , Jean-Ho Song , Jae-Hyoung Youn , O-Sung Seo , Byeong-Beom Kim , Je-Hyeong Park , Jong-In Kim , Jae-Jin Song
IPC分类号： H01L21/00
CPC分类号： H01L29/78603 , H01L27/124 , H01L27/1288 , H01L29/458 , H01L29/66765
摘要： A thin film transistor array panel according to an exemplary embodiment of the present invention comprises a substrate, a gate line formed on the substrate, a gate insulating layer formed on the gate line, a semiconductor layer formed on the gate insulating layer, and a data line formed on the semiconductor layer, wherein the data line comprises a lower data layer, an upper data layer, a data oxide layer, and a buffer layer, wherein the upper data layer and the buffer layer comprise a same material.
摘要翻译：根据本发明的示例性实施例的薄膜晶体管阵列面板包括基板，形成在基板上的栅极线，形成在栅极线上的栅极绝缘层，形成在栅极绝缘层上的半导体层，以及数据其中所述数据线包括下数据层，上数据层，数据氧化层和缓冲层，其中所述上数据层和所述缓冲层包括相同的材料。

3. 发明授权

US08174020B2 Thin film transistor array panel and method for manufacturing the same 有权
标题翻译：薄膜晶体管阵列面板及其制造方法
公开(公告)号：US08174020B2
公开(公告)日：2012-05-08
申请号：US12556277
申请日：2009-09-09
申请人： Young-Wook Lee , Hong-Suk Yoo , Jean-Ho Song , Jae-Hyoung Youn , Woo-Geun Lee , Ki-Won Kim , Jong-In Kim
发明人： Young-Wook Lee , Hong-Suk Yoo , Jean-Ho Song , Jae-Hyoung Youn , Woo-Geun Lee , Ki-Won Kim , Jong-In Kim
IPC分类号： H01L27/14
CPC分类号： H01L29/66742 , H01L27/1225 , H01L27/124 , H01L27/1248
摘要： A thin film transistor substrate according to an embodiment of the present invention includes: an insulation substrate; a gate line formed on the insulation substrate; a first interlayer insulating layer formed on the gate line; a data line and a gate electrode formed on the first interlayer insulating layer; a gate insulating layer formed on the data line and gate electrode; a semiconductor formed on the gate insulating layer and overlapping the gate electrode; a second interlayer insulating layer formed on the semiconductor; a first connection formed on the second interlayer insulating layer and electrically connecting the gate line and the gate electrode to each other; a drain electrode connected to the semiconductor; a pixel electrode connected to the drain electrode; and a second connection connecting the data line and the semiconductor to each other.
摘要翻译：根据本发明实施例的薄膜晶体管基板包括：绝缘基板; 形成在所述绝缘基板上的栅极线; 形成在栅极线上的第一层间绝缘层; 形成在所述第一层间绝缘层上的数据线和栅电极; 形成在数据线和栅电极上的栅极绝缘层; 形成在栅极绝缘层上并与栅电极重叠的半导体; 形成在所述半导体上的第二层间绝缘层; 形成在所述第二层间绝缘层上并将所述栅极线和所述栅电极彼此电连接的第一连接; 连接到半导体的漏电极; 连接到所述漏电极的像素电极; 以及将数据线和半导体彼此连接的第二连接。

4. 发明授权

US08144280B2 Liquid crystal display 有权
标题翻译：液晶显示器
公开(公告)号：US08144280B2
公开(公告)日：2012-03-27
申请号：US12152619
申请日：2008-05-14
申请人： Woo-Geun Lee , Shi-Yul Kim , Jae-Hyoung Youn , Young-Wook Lee
发明人： Woo-Geun Lee , Shi-Yul Kim , Jae-Hyoung Youn , Young-Wook Lee
IPC分类号： G02F1/136 , G02F1/1343
CPC分类号： G02F1/136286 , G02F1/136209 , G02F2001/13606 , G02F2001/136218 , G02F2001/136222 , G02F2201/40
摘要： A liquid crystal display to prevent light leakage with an improvement of aperture ratio and a reduction of load of a data line is provided. The liquid crystal display includes a gate line and a storage electrode line formed on a insulating substrate and apart from each other, a first data line and a second data line intersecting the gate line, a first pixel electrode defined by the gate line and the first data line, and a second pixel electrode defined by the gate line and the second data line and neighboring the first pixel electrode. Also, a blocking electrode between the first pixel electrode and the second pixel electrode is included, wherein at least portion of the first data line is disposed under the first pixel electrode, and at least portion of the blocking electrode is disposed under the second pixel electrode and apart from the first data line.
摘要翻译：提供了一种液晶显示器，用于防止光泄漏，同时提高了开口率和减少了数据线的负载。液晶显示器包括形成在绝缘基板上并且彼此分开的栅极线和存储电极线，与栅极线相交的第一数据线和第二数据线，由栅极线和第一栅极线限定的第一像素电极数据线和由栅极线和第二数据线限定并与第一像素电极相邻的第二像素电极。此外，包括第一像素电极和第二像素电极之间的阻挡电极，其中第一数据线的至少一部分设置在第一像素电极下方，并且阻挡电极的至少一部分设置在第二像素电极下方并且除了第一条数据线之外。

5. 发明申请

US20110133193A1 THIN FILM TRANSISTOR SUBSTRATE AND THE METHOD THEREOF 有权
标题翻译：薄膜晶体管基板及其方法
公开(公告)号：US20110133193A1
公开(公告)日：2011-06-09
申请号：US12844356
申请日：2010-07-27
申请人： Jean-Ho SONG , Shin-Il Choi , Sun-Young Hong , Shi-Yul Kim , Ki-Yeup Lee , Jae-Hyoung Youn , Sung-Ryul Kim , O-Sung Seo , Yang-Ho Bae , Jong-Hyun Choung , Dong-Ju Yang , Bong-Kyun Kim , Hwa-Yeul Oh , Pil-Soon Hong , Byeong-Beom Kim , Je-Hyeong Park , Yu-Gwang Jeong , Jong-In Kim , Nam-Seok Suh
发明人： Jean-Ho SONG , Shin-Il Choi , Sun-Young Hong , Shi-Yul Kim , Ki-Yeup Lee , Jae-Hyoung Youn , Sung-Ryul Kim , O-Sung Seo , Yang-Ho Bae , Jong-Hyun Choung , Dong-Ju Yang , Bong-Kyun Kim , Hwa-Yeul Oh , Pil-Soon Hong , Byeong-Beom Kim , Je-Hyeong Park , Yu-Gwang Jeong , Jong-In Kim , Nam-Seok Suh
IPC分类号： H01L27/12 , H01L29/786 , H01L21/336
CPC分类号： H01L27/124 , H01L27/12 , H01L27/1214 , H01L27/1288 , H01L29/42368 , H01L29/458 , H01L29/78669
摘要： A thin film transistor array panel includes a gate line, a gate insulating layer that covers the gate line, a semiconductor layer that is disposed on the gate insulating layer, a data line and drain electrode that are disposed on the semiconductor layer, a passivation layer that covers the data line and drain electrode and has a contact hole that exposes a portion of the drain electrode, and a pixel electrode that is electrically connected to the drain electrode through the contact hole. The data line and drain electrode each have a double layer that includes a lower layer of titanium and an upper layer of copper, and the lower layer is wider than the upper layer, and the lower layer has a region that is exposed. The gate insulating layer may have a step shape.
摘要翻译：薄膜晶体管阵列面板包括栅极线，覆盖栅极线的栅极绝缘层，设置在栅极绝缘层上的半导体层，设置在半导体层上的数据线和漏极，钝化层覆盖数据线和漏电极，并且具有露出漏电极的一部分的接触孔，以及通过接触孔与漏电极电连接的像素电极。数据线和漏极各自具有包括钛的下层和铜的上层的双层，下层比上层宽，下层具有暴露的区域。栅极绝缘层可以具有台阶形状。

6. 发明申请

US20110108839A1 Thin Film Transistor Substrate and Manufacturing Method Thereof 有权
标题翻译：薄膜晶体管基板及其制造方法
公开(公告)号：US20110108839A1
公开(公告)日：2011-05-12
申请号：US12821668
申请日：2010-06-23
申请人： Sung-Ryul Kim , Jean-Ho Song , Jae-Hyoung Youn , O-Sung Seo , Byeong-Beom Kim , Je-Hyeong Park , Jong-In Kim , Jae-Jin Song
发明人： Sung-Ryul Kim , Jean-Ho Song , Jae-Hyoung Youn , O-Sung Seo , Byeong-Beom Kim , Je-Hyeong Park , Jong-In Kim , Jae-Jin Song
IPC分类号： H01L27/088 , H01L21/8234 , H01L21/336
CPC分类号： H01L29/78603 , H01L27/124 , H01L27/1288 , H01L29/458 , H01L29/66765
摘要： A thin film transistor array panel according to an exemplary embodiment of the present invention comprises a substrate, a gate line formed on the substrate, a gate insulating layer formed on the gate line, a semiconductor layer formed on the gate insulating layer, and a data line formed on the semiconductor layer, wherein the data line comprises a lower data layer, an upper data layer, a data oxide layer, and a buffer layer, wherein the upper data layer and the buffer layer comprise a same material.
摘要翻译：根据本发明的示例性实施例的薄膜晶体管阵列面板包括基板，形成在基板上的栅极线，形成在栅极线上的栅极绝缘层，形成在栅极绝缘层上的半导体层，以及数据其中所述数据线包括下数据层，上数据层，数据氧化层和缓冲层，其中所述上数据层和所述缓冲层包括相同的材料。

7. 发明申请

US20100032664A1 THIN FILM TRANSISTOR SUBSTRATE AND A FABRICATING METHOD THEREOF 有权
标题翻译：薄膜晶体管基板及其制造方法
公开(公告)号：US20100032664A1
公开(公告)日：2010-02-11
申请号：US12502653
申请日：2009-07-14
申请人： Young-Wook LEE , Hong-Suk YOO , Jean-Ho SONG , Jae-Hyoung YOUN , Jong-In KIM
发明人： Young-Wook LEE , Hong-Suk YOO , Jean-Ho SONG , Jae-Hyoung YOUN , Jong-In KIM
IPC分类号： H01L29/786 , H01L21/336
CPC分类号： H01L29/7869 , H01L27/1225
摘要： An oxide semiconductor thin film transistor substrate includes a gate line and a gate electrode disposed on an insulating substrate, an oxide semiconductor pattern disposed adjacent to the gate electrode, a data line electrically insulated from the gate line, the data line and the gate line defining a display region, a first opening exposing a surface of the data line, a second opening exposing a surface of the oxide semiconductor pattern, and a drain electrode disposed on the first opening and a drain electrode pad, the drain electrode extending from the first opening to the second opening and electrically connecting the drain electrode pad and the oxide semiconductor pattern.
摘要翻译：氧化物半导体薄膜晶体管基板包括栅极线和设置在绝缘基板上的栅电极，邻近栅电极设置的氧化物半导体图案，与栅极线电绝缘的数据线，数据线和限定线显示区域，暴露数据线的表面的第一开口，暴露氧化物半导体图案的表面的第二开口和设置在第一开口上的漏电极和漏电极焊盘，漏电极从第一开口延伸到第二开口并电连接漏电极焊盘和氧化物半导体图案。

8. 发明申请

US20090184326A1 DISPLAY SUBSTRATE, METHOD FOR MANUFACTURING THE DISPLAY SUBSTRATE AND DISPLAY APPARATUS HAVING THE DISPLAY SUBSTRATE 有权
标题翻译：显示基板，用于制造显示基板的方法和具有显示基板的显示装置
公开(公告)号：US20090184326A1
公开(公告)日：2009-07-23
申请号：US12332117
申请日：2008-12-10
申请人： Woo-Geun Lee , Jae-Hyoung Youn , Ki-Won Kim , Jong-In Kim
发明人： Woo-Geun Lee , Jae-Hyoung Youn , Ki-Won Kim , Jong-In Kim
IPC分类号： H01L33/00
CPC分类号： H01L27/124 , G02F1/136286
摘要： A display substrate includes a base substrate, a gate line, a gate insulation layer, a data line, a thin-film transistor (TFT) and a pixel electrode. The gate line is extended in a first direction on the base substrate. The gate insulation layer is formed on the base substrate to cover the gate line. The data line is extended in a second direction and intersects the gate line at an intersecting portion. At the intersecting portion, the data line is separated from the gate line by an air gap. In another embodiment, the data line also includes at least one etching hole extending to the air gap. The TFT is electrically connected to the data and the gate lines. The pixel electrode is electrically connected to the TFT.
摘要翻译：显示基板包括基底基板，栅极线，栅极绝缘层，数据线，薄膜晶体管（TFT）和像素电极。栅极线在基底基板上沿第一方向延伸。栅极绝缘层形成在基底基板上以覆盖栅极线。数据线在第二方向上延伸并且在相交部分与栅极线相交。在交叉部分，数据线通过气隙与栅极线分离。在另一个实施例中，数据线还包括延伸到气隙的至少一个蚀刻孔。 TFT与数据和栅极线电连接。像素电极电连接到TFT。

9. 发明申请

US20090121228A1 ARRAY SUBSTRATE AND METHOD OF MANUFACTURING THE SAME 有权
标题翻译：阵列基板及其制造方法
公开(公告)号：US20090121228A1
公开(公告)日：2009-05-14
申请号：US12269748
申请日：2008-11-12
申请人： Jang-Soo Kim , Hong-Long Ning , Bong-Kyun Kim , Hong-Sick Park , Shi-Yul Kim , Chang-Oh Jeong , Sang-Gab Kim , Jae-Hyoung Youn , Woo-Geun Lee , Yang-Ho Bae , Pil-Sang Yun , Jong-Hyun Choung , Sun-Young Hong , Ki-Won Kim , Byeong-Jin Lee , Yopung-Wook Lee , Jong-In Kim , Byeong-Beom Kim , Nam-Seok Suh
发明人： Jang-Soo Kim , Hong-Long Ning , Bong-Kyun Kim , Hong-Sick Park , Shi-Yul Kim , Chang-Oh Jeong , Sang-Gab Kim , Jae-Hyoung Youn , Woo-Geun Lee , Yang-Ho Bae , Pil-Sang Yun , Jong-Hyun Choung , Sun-Young Hong , Ki-Won Kim , Byeong-Jin Lee , Yopung-Wook Lee , Jong-In Kim , Byeong-Beom Kim , Nam-Seok Suh
IPC分类号： H01L29/04 , H01L21/336
CPC分类号： G02F1/13458 , G02F1/136286 , G02F2001/136295 , H01L27/1218 , H01L27/124 , H01L27/1288
摘要： A gate line includes a first seed layer formed on a base substrate and a first metal layer formed on the first seed layer. A first insulation layer is formed on the base substrate. A second insulation layer is formed on the base substrate. Here, a line trench is formed through the second insulation layer in a direction crossing the gate line. A data line includes a second seed layer formed below the line trench and a second metal layer formed in the line trench. A pixel electrode is formed in a pixel area of the base substrate. Therefore, a trench of a predetermined depth is formed using an insulation layer and a metal layer is formed through a plating method, so that a metal line having a sufficient thickness may be formed.
摘要翻译：栅极线包括形成在基底基板上的第一籽晶层和形成在第一籽晶层上的第一金属层。在基底基板上形成第一绝缘层。在基底基板上形成第二绝缘层。这里，在与栅极线交叉的方向上通过第二绝缘层形成线沟槽。数据线包括形成在线沟槽下方的第二晶种层和形成在线沟槽中的第二金属层。像素电极形成在基底基板的像素区域中。因此，使用绝缘层形成预定深度的沟槽，并且通过电镀方法形成金属层，从而可以形成具有足够厚度的金属线。

10. 发明授权

US09046727B2 Thin film transistor array panel and manufacturing method of the same 有权
标题翻译：薄膜晶体管阵列及其制造方法相同
公开(公告)号：US09046727B2
公开(公告)日：2015-06-02
申请号：US12414932
申请日：2009-03-31
申请人： Kwang-Ho Lee , Jang-Soo Kim , Hong-Suk Yoo , Sang-Soo Kim , Shi-Yul Kim , Jae-Hyoung Youn
发明人： Kwang-Ho Lee , Jang-Soo Kim , Hong-Suk Yoo , Sang-Soo Kim , Shi-Yul Kim , Jae-Hyoung Youn
IPC分类号： H01L33/00 , H01L21/28 , G02F1/1362 , G02F1/1339 , H01L27/12
CPC分类号： H01L27/124 , G02F1/13394 , G02F1/136209 , G02F1/136227 , G02F2001/136222 , H01L27/1248 , H01L27/1262
摘要： A thin film transistor (“TFT”) array panel includes; an insulation substrate, a TFT disposed on the insulation substrate and including a drain electrode, a passivation layer covering the TFT and including a contact portion disposed therein corresponding to the drain electrode, a partition comprising an organic material disposed on the passivation layer, and including a transverse portion, a longitudinal portion, and a contact portion disposed on the drain electrode, a color filter disposed on the passivation layer and disposed in a region defined by the partition, an organic capping layer disposed on the partition and the color filter, and a pixel electrode disposed on the organic capping layer, and connected to the drain electrode through the contact portion of the passivation layer and the contact portion of the partition, wherein a contact hole is formed in the organic capping layer corresponding to the contact portion of the passivation layer.
摘要翻译：薄膜晶体管（“TFT”）阵列面板包括：绝缘基板，设置在所述绝缘基板上并包括漏电极的TFT，覆盖所述TFT的钝化层，并且包括设置在其中的所述漏电极对应的接触部分，所述隔板包括设置在所述钝化层上的有机材料，并且包括横向部分，纵向部分和设置在漏电极上的接触部分，设置在钝化层上并设置在由隔板限定的区域中的滤色器，设置在隔板上的有机覆盖层和滤色器，以及设置在所述有机覆盖层上的像素电极，并且通过所述钝化层的接触部分和所述隔离物的接触部分连接到所述漏电极，其中在所述有机覆盖层中形成接触孔，所述接触孔对应于所述钝化层的接触部分钝化层。

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