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51. 发明授权

US08295500B2 Method and apparatus for controlling directional sound sources based on listening area 有权
标题翻译：基于收听区域控制定向声源的方法和装置
公开(公告)号：US08295500B2
公开(公告)日：2012-10-23
申请号：US12547288
申请日：2009-08-25
申请人： Min Cheol Shin , Sung Q Lee , Hye Jin Kim , Kang Ho Park , Jong Dae Kim , Se Myung Wang , Dae Sung Kim
发明人： Min Cheol Shin , Sung Q Lee , Hye Jin Kim , Kang Ho Park , Jong Dae Kim , Se Myung Wang , Dae Sung Kim
IPC分类号： H04R29/00
CPC分类号： H04R1/403 , H04R3/12 , H04R2203/12
摘要： Sound can be listened to only in a listening area by maximizing a sound energy difference between a listening area and a non-listening area while maximizing sound radiation efficiency of each sound source. Accordingly, realistic sound can be provided to listeners without causing auditory disturbance to third parties, and maximal sound effects can be obtained with only minimal control.
摘要翻译：通过最大化每个声源的声音辐射效率，在收听区域和非聆听区域之间的声音能量差异，才可以在聆听区域收听声音。因此，可以向聆听者提供逼真的声音，而不会对第三方造成听觉干扰，并且只有最小的控制才能获得最大的声音效果。

52. 发明申请

US20120224437A1 NON-VOLATILE MEMORY DEVICE USING VARIABLE RESISTANCE ELEMENT WITH AN IMPROVED WRITE PERFORMANCE 有权
标题翻译：使用具有改进的写性能的可变电阻元件的非易失性存储器件
公开(公告)号：US20120224437A1
公开(公告)日：2012-09-06
申请号：US13470617
申请日：2012-05-14
申请人： Hye-Jin Kim , Kwang-Jin Lee , Du-Eung Kim , Hung-Jun An
发明人： Hye-Jin Kim , Kwang-Jin Lee , Du-Eung Kim , Hung-Jun An
IPC分类号： G11C5/14
CPC分类号： G11C5/14 , G11C7/1078 , G11C7/1096 , G11C8/10 , G11C11/22 , G11C13/00 , G11C13/0004 , G11C13/0007 , G11C13/0023 , G11C13/0038 , G11C13/0069 , G11C2013/0088 , G11C2013/009 , G11C2213/72
摘要： A non-volatile memory device using a variable resistive element is provided. The non-volatile memory device includes a memory cell array having a plurality of non-volatile memory cells, a first voltage generator configured to generate a first voltage, a voltage pad configured to receive an external voltage that has a level higher than the first voltage, a write driver configured to be supplied with the external voltage and configured to write data to the plurality of non-volatile memory cells selected from the memory cell array; a sense amplifier configured to be supplied with the external voltage and configured to read data from the plurality of non-volatile memory cells selected from the memory cell array, and a row decoder and a column decoder configured to select the plurality of non-volatile memory cells included in the memory cell array, the row decoder being supplied with the first voltage and the column decoder being supplied with the external voltage.
摘要翻译：提供了使用可变电阻元件的非易失性存储器件。非易失性存储器件包括具有多个非易失性存储器单元的存储单元阵列，被配置为产生第一电压的第一电压发生器，被配置为接收具有高于第一电压的电平的外部电压的电压焊盘写入驱动器，被配置为被提供有所述外部电压并被配置为向从所述存储单元阵列中选择的所述多个非易失性存储器单元写入数据; 感测放大器，被配置为被提供有外部电压并且被配置为从从存储单元阵列中选择的多个非易失性存储器单元读取数据;行解码器和列解码器，被配置为选择多个非易失性存储器包括在存储单元阵列中的单元，行解码器被提供有第一电压，并且列解码器被提供有外部电压。

53. 发明授权

US08243169B2 Apparatus and method for improved digital image playback 有权
标题翻译：改进数字图像播放的装置和方法
公开(公告)号：US08243169B2
公开(公告)日：2012-08-14
申请号：US12488735
申请日：2009-06-22
申请人： Jun-ho Choi , Hye-jin Kim
发明人： Jun-ho Choi , Hye-jin Kim
IPC分类号： H04N5/76 , H04N5/222
CPC分类号： H04N9/8042 , G11B27/105 , G11B27/34 , H04N21/4223 , H04N21/4325 , H04N21/482 , H04N21/8153
摘要： Disclosed are an apparatus and method for improving digital image playback by switching among a plurality of displayed playback images according to a control signal generated from a user input. The apparatus includes a playback image generating unit (in an embodiment, a digital signal processor), which generates a playback image by using image data included in an image file. A display unit displays the playback image generated by the playback image processor. A detecting unit determines the duration of the control signal generated from the user input, and the playback image generating unit adjusts a specified speed of switching among a plurality of playback images according to the input of the control signal and the specified speed of switching playback images is adjusted according to the detected duration.
摘要翻译：公开了一种通过根据从用户输入产生的控制信号在多个显示的重放图像之间切换来改善数字图像重放的装置和方法。该装置包括通过使用包括在图像文件中的图像数据来生成播放图像的重放图像生成单元（在一个实施例中，数字信号处理器）。显示单元显示由回放图像处理器生成的回放图像。检测单元确定从用户输入产生的控制信号的持续时间，并且重放图像生成单元根据控制信号的输入和指定的切换重放图像的速度来调整多个重放图像之间的指定的切换速度根据检测到的持续时间进行调整。

54. 发明申请

US20120168960A1 MULTI CHIP PACKAGE 有权
标题翻译：多芯片包装
公开(公告)号：US20120168960A1
公开(公告)日：2012-07-05
申请号：US13340436
申请日：2011-12-29
申请人： Hye Jin KIM , Going Sik KIM , Chang Sup RYU
发明人： Hye Jin KIM , Going Sik KIM , Chang Sup RYU
IPC分类号： H01L23/48
CPC分类号： H01L24/48 , H01L23/13 , H01L23/3128 , H01L23/49827 , H01L24/45 , H01L25/0657 , H01L2224/0401 , H01L2224/04042 , H01L2224/06135 , H01L2224/06136 , H01L2224/16225 , H01L2224/32014 , H01L2224/32145 , H01L2224/32225 , H01L2224/451 , H01L2224/4809 , H01L2224/48091 , H01L2224/48227 , H01L2224/48235 , H01L2224/4824 , H01L2224/73203 , H01L2224/73215 , H01L2224/73265 , H01L2224/83101 , H01L2225/0651 , H01L2225/06558 , H01L2924/00014 , H01L2924/01028 , H01L2924/01029 , H01L2924/01033 , H01L2924/01047 , H01L2924/01082 , H01L2924/014 , H01L2924/15311 , H01L2924/181 , H01L2924/00 , H01L2924/00012 , H01L2224/85399 , H01L2224/05599
摘要： The preferred embodiment of the present invention can prevent signal distortions such as stress, or the like, occurring at the time of power delivery due to the difference in the lengths of the metal wires for electrically connecting each of the plurality of semiconductor chips formed on the dual die package substrate.
摘要翻译：本发明的优选实施例可以防止由于用于电连接形成在多个半导体芯片上的多个半导体芯片中的每一个的金属线的长度差而在发电时发生的诸如应力等的信号失真双模封装基板。

55. 发明授权

US08204311B2 Method and apparatus for shoulder-line detection and gesture spotting detection 有权
标题翻译：用于肩线检测和手势点检测的方法和装置
公开(公告)号：US08204311B2
公开(公告)日：2012-06-19
申请号：US11673696
申请日：2007-02-12
申请人： Hye Jin Kim , Ho Sub Yoon , Do Hyung Kim , Jae Yeon Lee
发明人： Hye Jin Kim , Ho Sub Yoon , Do Hyung Kim , Jae Yeon Lee
IPC分类号： G06K9/48
CPC分类号： G06K9/00335
摘要： A gesture spotting detection method and apparatus employ a shoulder-line algorithm. The shoulder-line detecting method recognizes a GSD calling gesture that occurs in a shoulder-line, head or higher part in a remote distance or a short distance, although a user does not have a fixed posture. In the method, an image of people is received, and skin information of a person in the image is detected to detect a face area. Then, the cloth color information of the person is modeled from the inputted image to detect a cloth area. An external space is defined from the image based on the body space area, and an edge is extracted from the image based on the body space and the external space. Then, shoulder-line information is acquired based on an energy function obtained based on the body space, the external space, and the edge.
摘要翻译：手势点检测方法和装置采用肩线算法。肩线检测方法识别在远程或短距离的肩线，头部或更高部位发生的GSD呼叫手势，尽管用户不具有固定的姿势。在该方法中，接收人的图像，并且检测图像中的人的皮肤信息以检测面部区域。然后，根据输入的图像对人的布颜色信息进行建模，以检测布面积。基于身体空间区域从图像中定义外部空间，并且基于身体空间和外部空间从图像提取边缘。然后，基于基于体空间，外部空间和边缘获得的能量函数来获取肩线信息。

56. 发明授权

US08194492B2 Variable resistance memory device and system 有权
标题翻译：可变电阻存储器件和系统
公开(公告)号：US08194492B2
公开(公告)日：2012-06-05
申请号：US12693005
申请日：2010-01-25
申请人： Qi Wang , Kwang-Jin Lee , Woo-Yeong Cho , Taek-Sung Kim , Kwang-Ho Kim , Hyun-Ho Choi , Yong-Jun Lee , Hye-Jin Kim
发明人： Qi Wang , Kwang-Jin Lee , Woo-Yeong Cho , Taek-Sung Kim , Kwang-Ho Kim , Hyun-Ho Choi , Yong-Jun Lee , Hye-Jin Kim
IPC分类号： G11C8/00
CPC分类号： G11C8/12 , G11C11/005 , G11C11/56 , G11C11/5678 , G11C13/0004 , G11C13/0023 , G11C13/0028 , G11C13/0069 , G11C16/0483 , G11C2013/0078 , G11C2213/71
摘要： Disclosed is a semiconductor memory device including a memory cell array having a plurality of variable resistance memory cells divided into first and second areas. An I/O circuit is configured to access the memory cell array under the control of control logic so as to access the first or second area in response to an external command. The I/O circuit accesses the first area using a memory cell unit and the second area using a page unit.
摘要翻译：公开了一种半导体存储器件，包括具有分成第一和第二区域的多个可变电阻存储器单元的存储单元阵列。 I / O电路被配置为在控制逻辑的控制下访问存储单元阵列，以响应于外部命令访问第一或第二区域。 I / O电路使用存储单元单元访问第一区域，并且使用页面单元访问第二区域。

57. 发明授权

US08116127B2 Phase change memory devices and systems, and related programming methods 有权
标题翻译：相变存储器件和系统以及相关编程方法
公开(公告)号：US08116127B2
公开(公告)日：2012-02-14
申请号：US12559792
申请日：2009-09-15
申请人： Woo-Yeong Cho , Kwang-Jin Lee , Hye-Jin Kim
发明人： Woo-Yeong Cho , Kwang-Jin Lee , Hye-Jin Kim
IPC分类号： G11C11/00
CPC分类号： G11C8/10 , G11C13/0004 , G11C13/0064 , G11C13/0069 , G11C2013/0076 , G11C2013/0078
摘要： A method of writing data in a phase change memory includes receiving write data to be written to a selected phase change memory cell in the plurality of phase change memory cells, sensing data stored in the selected phase change memory cell, determining whether or not the sensed data is equal to the write data, and if the sensed data is not equal to the write data, iteratively applying a write current to the selected phase change memory cell, wherein a resistance state of the phase change memory cell is changed by heat corresponding to a level of the write current, and the level of the write current is changed between successive iterative applications.
摘要翻译：在相变存储器中写入数据的方法包括：接收要写入多个相变存储单元中的选定相变存储单元的写入数据，感测存储在所选择的相变存储单元中的数据，确定是否感测到数据等于写入数据，并且如果感测到的数据不等于写入数据，则向所选择的相变存储器单元迭代地施加写入电流，其中相变存储单元的电阻状态由对应于写入电流的电平和写入电流的电平在连续的迭代应用程序之间改变。

58. 发明授权

US08031558B2 Forced acoustic dipole and forced acoustic multipole array using the same 有权
标题翻译：强迫声偶极子和强迫声多极阵列使用相同
公开(公告)号：US08031558B2
公开(公告)日：2011-10-04
申请号：US12473214
申请日：2009-05-27
申请人： Min Cheol Shin , Sung Q Lee , Sang Kyun Lee , Hye Jin Kim , Kang Ho Park , Jong Dae Kim
发明人： Min Cheol Shin , Sung Q Lee , Sang Kyun Lee , Hye Jin Kim , Kang Ho Park , Jong Dae Kim
IPC分类号： H04B1/02
CPC分类号： H04R1/403
摘要： Provided is a forced acoustic dipole capable of regulating phases and acoustic pressures of first and second acoustic signals output from first and second pole speakers to freely steer the direction of an acoustic lobe. In addition, a forced acoustic multipole array is constituted by a plurality of forced acoustic dipoles. When the phases and acoustic pressures of the first and second acoustic signals output from the forced acoustic dipoles are regulated to steer an acoustic lobe in a specific direction, sound can be heard from a desired direction only without disturbing others.
摘要翻译：提供了一种能够调节从第一和第二极扬声器输出的第一和第二声信号的相位和声压以自由地引导声波瓣的方向的强制声偶极子。此外，强制声音多极阵列由多个强制声学偶极子构成。当从强制声学偶极子输出的第一和第二声信号的相位和声压被调节以在特定方向上引导声波波瓣时，只能从期望的方向听到声音，而不会扰乱其它声音。

59. 发明授权

US07961508B2 Phase-change random access memory 有权
标题翻译：相变随机存取存储器
公开(公告)号：US07961508B2
公开(公告)日：2011-06-14
申请号：US12771028
申请日：2010-04-30
申请人： Byung-Gil Choi , Du-Eung Kim , Woo-Yeong Cho , Hye-Jin Kim
发明人： Byung-Gil Choi , Du-Eung Kim , Woo-Yeong Cho , Hye-Jin Kim
IPC分类号： G11C11/00
CPC分类号： G11C29/808 , G11C29/02 , G11C29/027 , G11C29/787 , G11C29/804 , G11C29/846
摘要： A phase-change random access memory includes a memory block including a plurality of memory columns corresponding to the same column address and using different input/output paths; a redundancy memory block including a plurality of redundancy memory columns using different input/output paths; and an input/output controller repairing at least one of the plurality of memory columns using at least one of the plurality of redundancy memory columns, and controlling the number of memory columns simultaneously repaired using redundancy memory columns in response to an input/output repair mode control signal.
摘要翻译：相变随机存取存储器包括存储块，该存储块包括对应于同一列地址的多个存储器列并使用不同的输入/输出路径; 冗余存储器块，其包括使用不同的输入/输出路径的多个冗余存储器列; 以及输入/输出控制器，其使用所述多个冗余存储器列中的至少一个来修复所述多个存储器列中的至少一个，并且响应于输入/输出修复模式来控制使用冗余存储器列同时修复的存储器列的数量控制信号。

60. 发明申请

US20110096611A1 Semiconductor device and semiconductor system having the same 有权
公开(公告)号：US20110096611A1
公开(公告)日：2011-04-28
申请号：US12929123
申请日：2011-01-03
申请人： Kwang Jin Lee , Joon Min Park , Hye-Jin Kim
发明人： Kwang Jin Lee , Joon Min Park , Hye-Jin Kim
IPC分类号： G11C7/00
CPC分类号： G11C13/0069 , G11C7/22 , G11C8/12 , G11C13/0004 , G11C2013/0076 , G11C2207/2209
摘要： A semiconductor device according to example embodiments may be configured so that, when a read command for performing a read operation is input while a write operation is performed, and when a memory bank accessed by a write address during the write operation is the same as a memory bank accessed by a read address during the read operation, the semiconductor device may suspend the write operation automatically or in response to an internal signal until the read operation is finished and performs the write operation after the read operation is finished.

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