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41. 发明专利

JP2001168004A WAFER TREATING DEVICE 失效
公开(公告)号：JP2001168004A
公开(公告)日：2001-06-22
申请号：JP34842899
申请日：1999-12-08
申请人： TOKYO ELECTRON LTD
发明人： UEDA KAZUNARI , DEGUCHI MASATOSHI
IPC分类号： H01L21/677 , H01L21/027
摘要： PROBLEM TO BE SOLVED: To provide a wafer treating device capable of efficiently conveying a wafer and further to prevent liquid treatment unit from being affected by the heat of a heat treatment unit. SOLUTION: A wafer treating device 1 is provided with a first treatment unit group U1 for applying a first treatment process to a wafer W, a second treatment unit group U2 for applying a second treatment process to the wafer W, and conveying means 81 and 82 for conveying the wafer W to these first and second treatment unit groups U1 and U2. The first treatment unit group U1 is located along with a first conveyance route 21, and the second treatment unit group U2 is located along with a second conveyance route 22. Besides, concerning the first and second treatment unit groups U1 and U2, the liquid treatment unit is located so as not to be affected by the heat of the heat treatment unit.

42. 发明专利

JP2001093827A TREATMENT SYSTEM 失效
公开(公告)号：JP2001093827A
公开(公告)日：2001-04-06
申请号：JP2000195805
申请日：2000-06-29
申请人： TOKYO ELECTRON LTD
发明人： UEDA KAZUNARI
IPC分类号： B65G49/00 , F24F7/06 , H01L21/027 , H01L21/677 , H01L21/68
摘要： PROBLEM TO BE SOLVED: To provide a treatment system for preventing disturbance of air flow formed in a system. SOLUTION: When a wafer carriage means 54 of a first carriage unit 50 and a wafer carriage means 64 of a second carriage unit 60 move downward at the same time, the exhausting amount of exhausting fans 135 to 138 is increased under control of a controller 139, and a downflow of cleaning air is made strong. Then, a disturbance in air flow caused by the downward movement of the wafer carriage means 54 of the first carriage unit 50, and the wafer carriage means 64 of the second carriage unit 60 at the same time is absorbed by the strengthened downflow.

43. 发明专利

JP2001044119A RESIST COATING, DEVELOPING, AND PROCESSING APPARATUS 失效
公开(公告)号：JP2001044119A
公开(公告)日：2001-02-16
申请号：JP2000150418
申请日：2000-05-22
申请人： TOKYO ELECTRON LTD
发明人： UEDA KAZUNARI
IPC分类号： G03F7/16 , B65G49/00 , G03F7/30 , H01L21/027 , H01L21/677 , H01L21/68
摘要： PROBLEM TO BE SOLVED: To effectively eliminate influence of impurity components, such as the particles, alkaline component, etc., and the variations in the environment, such as the temperature, humidity, etc., on processing. SOLUTION: A resist coating, developing, and processing apparatus is provided with a cassette station 10, a processing station 11, and air flow forming mechanisms 60 and 80, which form an air flow from the top side to the bottom side of an interface section 12. The apparatus is also provided with a controller 90 which controls the mechanisms 60 and 80. The processing station 11 has vent holes 56 and 57, respectively communicating with the cassette station 10 and interface section 12, and the controller 90 forms air flows from the processing station 11 to the cassette station 10 and interface section 12 by controlling the air flow forming mechanism 60, so that the pressure in the processing station 11 becomes higher than those in the cassette station 11 and interface section 12.

44. 发明专利

JP2000331907A PROCESSING SYSTEM 失效
公开(公告)号：JP2000331907A
公开(公告)日：2000-11-30
申请号：JP13673399
申请日：1999-05-18
申请人： TOKYO ELECTRON LTD
发明人： UEDA KAZUNARI
IPC分类号： H01L21/027 , G03F7/16 , G03F7/30 , H01L21/00
摘要： PROBLEM TO BE SOLVED: To provide a processing system for reducing costs for forming a system environment. SOLUTION: In this processing system, down-flow clean air is supplied from the upper part through a temperature/moisture adjuster 81 for controlling temperature and moisture to a first block B in which processing for applying a reflection preventing film on a wafer W is operated, and a second block B2 in which processing for applying a resist film on the wafer W is operated, and downflow clean air is supplied from the upper part through a temperature adjuster 83 for controlling only the temperature to a third block B3 in which processing for developing the exposed resist film is operated, and the downflow clean air is directly supplied to a first block B2 in which processing for carrying the wafer W between the blocks is excited.

45. 发明专利

JP2000100718A EQUIPMENT FOR TREATMENT AND METHOD THEREFOR 失效
公开(公告)号：JP2000100718A
公开(公告)日：2000-04-07
申请号：JP28606298
申请日：1998-09-22
申请人： TOKYO ELECTRON LTD
发明人： KIMURA YOSHIO , UEDA KAZUNARI
IPC分类号： H01L21/677 , H01L21/027 , H01L21/673 , H01L21/68
摘要： PROBLEM TO BE SOLVED: To smoothly perform the flow of a delivering part of a carrier at a delivering part of a substrate carrier, and effectively use the space of a clean room, in spreading/developing equipment which spreads resist on a substrate and develops and treats the resist after exposure. SOLUTION: A carrier delivering part 2 is constituted by arranging, e.g. four exchanging mechanisms 20 in which two carriers C are made one set and vertical positions of the carriers C are exchanged. The exchanging mechanisms 20 is so constituted that two mounting tables S1, S2 can be vertically rotated, keeping the almost horizontal in attitude as it is. Access to the carrier C on a mounting table S1 (S2) of the upper side is performed with a substrate-carrying mechanism 52, which moves along a guide member 51 in the vicinity of a ceiling part of a clean room, and access to a substrate in the carrier C on a mounting table S2 (S1) of the lower side is made with a substrate-carrying mechanism of the equipment side. After treatment of the substrate in the carrier C of the lower side is finished, positions of the carriers C of the upper side and the lower side are exchanged.

46. 发明专利

JP2011199299A Coating/developing system 有权
标题翻译：涂料/开发体系
公开(公告)号：JP2011199299A
公开(公告)日：2011-10-06
申请号：JP2011103236
申请日：2011-05-02
申请人： Tokyo Electron Ltd , 東京エレクトロン株式会社
发明人： AKUMOTO MASAMI , HAYASHI SHINICHI , HAYASHIDA YASUSHI , MATSUOKA NOBUAKI , KIMURA YOSHIO , UEDA KAZUNARI , ITO AKIRA
IPC分类号： H01L21/027 , H01L21/677
CPC分类号： H01L21/67184 , H01L21/67173 , H01L21/67178
摘要： PROBLEM TO BE SOLVED: To reduce the depth dimension of a coating/developing system that forms a resist film on a substrate and performs a developing process to the substrate subjected to light exposure.SOLUTION: A plurality of coating process unit blocks each containing a plurality of coating process units for forming a coating film on a substrate are stacked in a layered form, and a plurality of developing process unit blocks each containing a plurality of developing units are stacked on the coating process unit blocks. Liquid process units in respective coating process unit blocks and liquid process units in respective developing process unit blocks are so arranged as to construct a layered form. Likewise, heating process units in respective coating process unit blocks and heating process units in respective developing process unit blocks are so arranged as to construct a layered form. The layered form structure of the liquid process units and the layered form structure of the heating process units are so arranged as to face each other via a straight-line-shaped substrate transfer path.
摘要翻译：要解决的问题：减少在基板上形成抗蚀剂膜的涂覆/显影系统的深度尺寸，并对经过曝光的基板进行显影处理。解决方案：多个涂覆处理单元块，每个包含多个用于在基板上形成涂膜的涂布处理单元以层叠形式堆叠，并且在涂布处理单元块上堆叠多个包含多个显影单元的显影处理单元块。相应的显影处理单元块中相应涂布处理单元块和液体处理单元中的液体处理单元布置成构成分层形式。同样，相应的显影处理单元块中的各涂布处理单元块和加热处理单元中的加热处理单元被布置成构成分层形式。液体处理单元的层状结构和加热处理单元的分层结构被布置为经由直线状的基板传送路径彼此面对。

47. 发明专利

JP2011187975A Coating and developing system 有权
标题翻译：涂料与开发体系
公开(公告)号：JP2011187975A
公开(公告)日：2011-09-22
申请号：JP2011103228
申请日：2011-05-02
申请人： Tokyo Electron Ltd , 東京エレクトロン株式会社
发明人： AKUMOTO MASAMI , HAYASHI SHINICHI , HAYASHIDA YASUSHI , MATSUOKA NOBUAKI , KIMURA YOSHIO , UEDA KAZUNARI , ITO AKIRA
IPC分类号： H01L21/027 , H01L21/677
CPC分类号： H01L21/67184 , H01L21/67173 , H01L21/67178
摘要： PROBLEM TO BE SOLVED: To reduce the depth dimension of a device in a coating and developing system for performing a process to form an antireflection film on a substrate, a process to form a resist film thereon, and a process to carry out developing on a substrate after exposure. SOLUTION: A COT layer B4 for forming the resist film on the substrate, a BCT layer B5 for forming the antireflection film underlying the resist film, a TCT layer B3 for forming the antireflection film overlying the resist film, and DEV layers B1 and B2 for carrying out developing processing are mutually laminated. A delivery stage group laminated with delivery stages corresponding to each layer is provided in the front and rear of these laminates. Thus, the substrate can be delivered between respective layers via the delivery stage. Further, a protective film formation unit for forming a protective film to immersion exposure on the surface of the substrate is provided on any of the COT layer B4, the BCT layer B5 and TCT layer B3. COPYRIGHT: (C)2011,JPO&INPIT
摘要翻译：要解决的问题为了减少用于进行在基板上形成抗反射膜的工艺的涂布和显影系统中的装置的深度尺寸，在其上形成抗蚀剂膜的工艺以及执行方法曝光后在底物上显影。解决方案：用于在基板上形成抗蚀剂膜的COT层B4，用于在抗蚀剂膜下形成抗反射膜的BCT层B5，用于形成覆盖抗蚀剂膜的抗反射膜的TCT层B3和DEV层B1 和B2进行显影处理相互层叠。在这些层叠体的前后设置有与各层对应的输送台层叠的输送阶段组。因此，可以经由输送阶段将基板输送到相应的层之间。此外，在COT层B4，BCT层B5和TCT层B3中的任一个上设置用于在基板表面上形成浸渍曝光的保护膜的保护膜形成单元。版权所有（C）2011，JPO＆INPIT

48. 发明专利

JP2010041059A Coating and developing apparatus 审中-公开
标题翻译：涂料和开发设备
公开(公告)号：JP2010041059A
公开(公告)日：2010-02-18
申请号：JP2009211791
申请日：2009-09-14
申请人： Tokyo Electron Ltd , 東京エレクトロン株式会社
发明人： AKUMOTO MASAMI , HAYASHI SHINICHI , HAYASHIDA YASUSHI , MATSUOKA NOBUAKI , KIMURA YOSHIO , UEDA KAZUNARI , ITO AKIRA
IPC分类号： H01L21/677 , B65G49/06 , B65G49/07 , H01L21/027
摘要： PROBLEM TO BE SOLVED: To achieve high carrying efficiency and high throughput in a coating and developing apparatus that performs a developing process on an exposed substrate after forming a coating layer including a resist layer on the substrate.
SOLUTION: A carrier block S1, a processing block S2 and an interface are disposed in a single line. In the processing block S2, two unit blocks are aligned in the front-back direction. The unit block includes a wafer transfer path that extends horizontally and linearly from the carrier block S1 towards the interface block S3, a coating processing unit that applies a coating solution on a substrate before exposure, and a heat processing unit that performs heat processing on the substrate. Rows of the two unit blocks are stacked vertically. The front unit block and the back unit block in the row of unit blocks in each layer are successively processed. The transfer of substrates between both unit blocks is performed via an intermediate stage.
COPYRIGHT: (C)2010,JPO&INPIT
摘要翻译：要解决的问题：为了在形成包括在基板上的抗蚀剂层的涂层之后在暴露的基板上进行显影处理的涂覆和显影装置中实现高承载效率和高生产率。解决方案：载体块S1，处理块S2和接口设置在一条线上。在处理块S2中，两个单位块在前后方向上排列。单元块包括从载体块S1朝向界面块S3水平且线性延伸的晶片传送路径，在曝光之前将涂布溶液涂布在基板上的涂布处理单元，以及对该基板进行热处理的热处理单元基质。两个单元块的行垂直堆叠。连续处理每层中单元块行中的前单元块和后单元块。在两个单元块之间的衬底的转移通过中间阶段进行。版权所有（C）2010，JPO＆INPIT

49. 发明专利

JP2009278138A Coating and developing apparatus, and method therefor 有权
标题翻译：涂料和开发设备及其方法
公开(公告)号：JP2009278138A
公开(公告)日：2009-11-26
申请号：JP2009193367
申请日：2009-08-24
申请人： Tokyo Electron Ltd , 東京エレクトロン株式会社
发明人： AKUMOTO MASAMI , HAYASHI SHINICHI , HAYASHIDA YASUSHI , MATSUOKA NOBUAKI , KIMURA YOSHIO , UEDA KAZUNARI , ITO AKIRA
IPC分类号： H01L21/027 , H01L21/677
摘要： PROBLEM TO BE SOLVED: To suppress throughput deterioration when trouble occurs in a processing unit for performing development processing or a conveying mechanism, in an apparatus which carries out resist film formation on a substrate and development of the substrate subjected to exposure. SOLUTION: Three-layer unit blocks B3 to B5 for forming a coating film and two-layer unit blocks B1, B2 for development processing are mutually laminated on a treatment block S2. Each of the unit blocks B1, B2 for development processing is provided with a developing liquid processing unit, a heating unit, a cooling unit and a main arm A1 or the like which moves along a conveying area extending horizontally and linearly from a carrier block side toward an interface block side. COPYRIGHT: (C)2010,JPO&INPIT
摘要翻译：要解决的问题：为了在用于进行显影处理的处理单元或输送机构中发生故障时抑制生产率恶化，在基板上进行抗蚀剂膜形成的设备和经受曝光的基板的显影。解决方案：用于形成涂膜的三层单元块B3至B5和用于显影处理的两层单元块B1，B2彼此层压在处理块S2上。用于显影处理的单元块B1，B2设置有沿着从承载块侧水平和线性延伸的输送区域移动的显影液处理单元，加热单元，冷却单元和主臂A1等朝向接口块侧。版权所有（C）2010，JPO＆INPIT

50. 发明专利

JP2004274068A Substrate processing equipment 审中-公开
标题翻译：基板加工设备
公开(公告)号：JP2004274068A
公开(公告)日：2004-09-30
申请号：JP2004093805
申请日：2004-03-26
申请人： Tokyo Electron Ltd , 東京エレクトロン株式会社
发明人： UEDA KAZUNARI , HAYASHI SHINICHI , IIDA NARIAKI , MATSUYAMA YUJI , DEGUCHI YOICHI
IPC分类号： H01L21/677 , H01L21/027 , H01L21/68
摘要： PROBLEM TO BE SOLVED: To provide a substrate processing method which reduces to the utmost an influence of time required for a temperature adjusting process on decrease of throughput, and to provide a substrate processing apparatus which achieves temperature control accurately in a process unit for conducting a liquid process to the substrate. SOLUTION: Each of heat processing unit portions G3 to G5 with 10 steps and each of coating processing unit portions G1 and G2 with 5 steps are arranged at the periphery of a first main wafer delivering portion A1 and a second main wafer delivering portion A2, and a wafer W is transported while temperature-adjusting the wafer W by a temperature-adjusting and transporting apparatus C in the heat processing unit portions G3 to G5. The influence of the time required for the temperature adjusting process of the substrate on the decrease of the throughput is reduced to the utmost thereby. COPYRIGHT: (C)2004,JPO&NCIPI
摘要翻译：要解决的问题：提供一种降低生产量降低对温度调节过程所需的时间的影响降低的基板处理方法，并且提供一种在处理单元中精确地实现温度控制的基板处理装置用于向衬底进行液体处理。解决方案：具有10个步骤的热处理单元部分G3至G5和具有5个步骤的每个涂覆处理单元部分G1和G2分别布置在第一主晶片输送部分A1的周边和第二主晶片输送部分 A2，并且通过温度调节传送装置C在热处理单元部分G3至G5中温度调节晶片W的同时传送晶片W. 最大限度地降低了基板的温度调节处理所需的时间对吞吐量的降低的影响。版权所有（C）2004，JPO＆NCIPI

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