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    • 42. 发明授权
    • Semiconductor memory device having a stacked capacitor cell structure
    • 具有叠层电容器单元结构的半导体存储器件
    • US5142639A
    • 1992-08-25
    • US701884
    • 1991-05-17
    • Yusuke KohyamaShizuo SawadaToshiharu WatanabeKinuyo Kohyama
    • Yusuke KohyamaShizuo SawadaToshiharu WatanabeKinuyo Kohyama
    • H01L27/04H01L21/02H01L21/822H01L21/8242H01L27/10H01L27/108H01L29/92
    • H01L27/10817H01L28/87
    • In a stacked capacitor cell structure of a semiconductor memory device, the MIM (metal-insulator-metal) capacitor to be used as a transfer gate comprises at least a unit stack of a first insulation film, a lower capacitor electrode, a capacitor gate insulation film, an upper capacitor electrode, another capacitor gate insulation film and an extension of the lower capacitor electrode. Thus, the surface area of the lower capacitor electrode can be enlarged without increasing the plane area exclusively occupied by memory cells. Moreover, with such a configuration, since the surface area of the lower capacitor electrode can be augmented without increasing the film thickness of the electrode, the technical difficulties that the currently known methods of manufacturing semiconductor memory devices with a stacked capacitor cell structure encounter are effectively eliminated and consequently troubles such as short-circuited lower capacitor electrodes become non-existent.
    • 在半导体存储器件的叠层电容器单元结构中,用作转移栅的MIM(金属 - 绝缘体 - 金属)电容器至少包括第一绝缘膜,下电容器电极,电容器栅绝缘 薄膜,上电容器电极,另一电容器栅绝缘膜和下电容器电极的延伸。 因此,可以扩大下电容器电极的表面积而不增加由存储单元专门占用的面积。 此外,通过这样的结构,由于可以增加下电容电极的表面积而不增加电极的膜厚度,所以当前已知的制造具有层叠电容器单元结构的半导体存储器件的制造方法遇到的技术难度有效地 消除并且因此诸如短路的较低电容器电极的故障不再存在。
    • 46. 发明授权
    • Compound type heat exchanger
    • 复合式换热器
    • US07077193B2
    • 2006-07-18
    • US10842118
    • 2004-05-10
    • Naohisa KamiyamaToshiharu Watanabe
    • Naohisa KamiyamaToshiharu Watanabe
    • F28F9/02
    • F28F1/126F28D1/0443F28F13/00F28F2009/0287F28F2270/00
    • A compound type heat exchanger has an oil cooler unit and a condenser unit integrated with each other. Both of the units have a plurality of heat exchanging pipes and fins juxtaposed and alternately stacked into a lamination, in common. At both ends of the lamination in the longitudinal direction of the pipes, they are connected with header pipes. At a boundary between the units, the heat exchanger includes partition walls arranged in the header pipes and a pseudo heat exchanging passage member interposed in the lamination. Further, at least either one of two fins adjoining the pseudo heat exchanging passage member on the side of the oil cooler unit and also on the side of the condenser unit is joined to the pseudo heat exchanging passage member, while the other fins are joined to the pipes.
    • 复合式热交换器具有油冷却器单元和彼此结合的冷凝器单元。 这两个单元共同地具有多个热交换管和翅片并置并交替堆叠成层叠。 在管道的纵向层叠的两端,它们与总管连接。 在单元之间的边界处,热交换器包括布置在集管中的分隔壁和插入层叠中的假热交换通道构件。 此外,在油冷却器单元一侧以及冷凝器单元一侧与假热交换通道构件相邻的两个翅片中的至少任一个接合到假热交换通道构件,而另一个翅片连接到 管道。
    • 50. 发明授权
    • Nonvolatile semiconductor memory having control gate with top flat surface covering storage layers of two adjacent transistors
    • 具有控制栅极的非易失性半导体存储器,其顶部平坦表面覆盖两个相邻晶体管的存储层
    • US06762955B2
    • 2004-07-13
    • US10422900
    • 2003-04-25
    • Koji SakuiToshiharu Watanabe
    • Koji SakuiToshiharu Watanabe
    • G11C1604
    • H01L27/11521G11C16/0483H01L27/115H01L27/11524
    • A nonvolatile semiconductor memory includes rewritable nonvolatile memory cell transistors connected in series. The nonvolatile memory cell transistors includes at least two charge storage layers formed on a first insulating film, a control gate shared by two adjacent transistors which are two of the nonvolatile memory cell transistors and which are adjacent to each other, and a second insulating film formed between the at least two charge storage layers and the control gate. A top of the control gate has a flat surface that covers the at least two charge storage layers that correspond to the two adjacent transistors, and the flat surface extends from one of the at least two charge storage layers to the other of the at least two charge storage layers.
    • 非易失性半导体存储器包括串联连接的可重写非易失性存储单元晶体管。 非易失性存储单元晶体管包括形成在第一绝缘膜上的至少两个电荷存储层,由两个非易失性存储单元晶体管彼此相邻并且彼此相邻的两个相邻晶体管共享的控制栅极和形成的第二绝缘膜 在所述至少两个电荷存储层和所述控制栅极之间。 控制栅极的顶部具有覆盖对应于两个相邻晶体管的至少两个电荷存储层的平坦表面,并且平坦表面从至少两个电荷存储层中的一个延伸到至少两个电荷存储层中的另一个 电荷存储层。