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41. 发明授权

US06999643B2 Method of manufacturing optical waveguide and method of manufacturing opto-electric wiring board 失效
标题翻译：制造光波导的方法及制造光电布线板的方法
公开(公告)号：US06999643B2
公开(公告)日：2006-02-14
申请号：US10303976
申请日：2002-11-26
申请人： Hideo Kikuchi , Mikio Oda , Hikaru Kouta , Sakae Kitajo , Yuzo Shimada
发明人： Hideo Kikuchi , Mikio Oda , Hikaru Kouta , Sakae Kitajo , Yuzo Shimada
IPC分类号： G02B6/12
CPC分类号： G02B6/4228 , G02B6/138 , G02B6/305 , G02B6/42 , G02B6/4202 , G02B6/4204 , G02B6/423 , G02B6/43 , G02B2006/12069 , G02B2006/1215 , G02B2006/12159 , H05K1/0274
摘要： After an optical waveguide substrate including a supporting substrate is adhered to an electric wiring board, the supporting substrate alone is dissolved using an organic solvent for removal. Alternatively, the supporting substrate alone is melted through a thermal treatment for removal. Further, a core layer of an optical waveguide is formed on the substrate using a photosensitive resin having a thermal expansion coefficient substantially identical to that of the supporting substrate.
摘要翻译：在将包括支撑基板的光波导基板粘附到电气布线板上之后，仅使用有机溶剂溶解支撑基板以进行除去。或者，单独的支撑衬底通过热处理熔化以除去。此外，使用具有与支撑基板的热膨胀系数基本相同的热膨胀系数的感光性树脂，在基板上形成光波导的芯层。

42. 发明授权

US5838064A Supporting member for cooling means and electronic package using the same 失效
标题翻译：冷却装置的支撑构件和使用其的电子封装
公开(公告)号：US5838064A
公开(公告)日：1998-11-17
申请号：US423455
申请日：1995-04-19
申请人： Yuzo Shimada , Takayuki Suyama , Yoshimasa Tanaka
发明人： Yuzo Shimada , Takayuki Suyama , Yoshimasa Tanaka
IPC分类号： H01L21/48 , H01L23/40 , H01L23/495 , H01L23/498 , H05K1/02 , H05K3/30 , H05K3/34 , H05K3/36 , H01L23/10 , H01L23/34
CPC分类号： H01L21/486 , H01L23/4006 , H01L23/49572 , H01L23/4985 , H01L24/50 , H05K3/301 , H05K3/363 , H01L2023/4043 , H01L2023/4056 , H01L2023/4062 , H01L2023/4087 , H01L2224/73253 , H01L2924/01322 , H01L2924/14 , H01L2924/15153 , H01L2924/15165 , H01L2924/1517 , H01L2924/15311 , H01L2924/1532 , H01L2924/15787 , H05K1/0201 , H05K2201/062 , H05K2201/09827 , H05K2201/09854 , H05K2201/10568 , H05K2201/10666 , H05K2201/10681 , H05K3/3457
摘要： An electronic package includes a supporting member, an electronic device, a carrier, a substrate a cooling means. The supporting member includes a plate and a bottom leg for supporting the plate. A first end of the bottom leg is joined to the lower surface of the plate. The carrier has a hole for receiving the bottom leg. The electronic device is connected to the carrier and is attached to the lower surface of the plate. A second end of the bottom leg is inserted into the hole of the carrier. The second end of the bottom leg is joined to the upper surface of the substrate. The electronic device is positioned between the plate of the supporting member and the substrate. The cooling is attached onto and supported by the upper surface of the plate.
摘要翻译：电子包装包括支撑部件，电子装置，载体，基板，冷却装置。支撑构件包括用于支撑板的板和底腿。底脚的第一端连接到板的下表面。载体具有用于接收底部支腿的孔。电子装置连接到载体上并附着到板的下表面。底脚的第二端插入托架的孔中。底脚的第二端连接到基底的上表面。电子设备位于支撑构件的板和基板之间。冷却被附着到板的上表面并由其支撑。

43. 发明授权

US5830563A Interconnection structures and method of making same 失效
标题翻译：互连结构及其制作方法
公开(公告)号：US5830563A
公开(公告)日：1998-11-03
申请号：US752798
申请日：1996-11-20
申请人： Tadanori Shimoto , Yoshitsugu Funada , Koji Matsui , Yuzo Shimada , Kazuaki Utsumi
发明人： Tadanori Shimoto , Yoshitsugu Funada , Koji Matsui , Yuzo Shimada , Kazuaki Utsumi
IPC分类号： H05K1/00 , H05K3/00 , H05K3/18 , H05K3/46 , B32B3/00
CPC分类号： H05K3/4661 , H05K3/465 , H05K2201/0195 , H05K2201/0355 , H05K2201/0394 , H05K3/0023 , H05K3/184 , H05K3/4676 , Y10S428/901 , Y10T428/24917 , Y10T428/3154
摘要： This invention relates to an interconnection structure comprising one or more insulating films and one or more layers of conductor electrode patterns, wherein at least one of the insulating films consists of a fluorene skeleton-containing epoxy acrylate resin, and to a method of making a multilayer interconnection structure including the steps of roughening the surface of an insulating resin layer and forming a conductor thereon by electroless plating, wherein the average roughness (Ra), maximum roughness (Ry) and conductor thickness (T) of the roughened surface of the insulating resin layer satisfy the following relations: 0.2.ltoreq.Ra.ltoreq.0.6 (unit: .mu.m) (1) 0.02.ltoreq.Ra/T.ltoreq.0.2 (2) 0.05.ltoreq.Ry/T.ltoreq.0.5 (3) and catalyst nuclei for electroless plating are supplied by applying a solution of a metallic salt to the roughened surface of the insulating resin layer or dipping the substrate in a solution of a metallic salt, drying and heat-treating the substrate, and then subjecting it to displacement palladium plating.
摘要翻译：本发明涉及一种互连结构，其包括一个或多个绝缘膜和一层或多层导体电极图案，其中绝缘膜中的至少一层由含芴骨架的环氧丙烯酸酯树脂组成，以及制备多层互连结构，包括通过无电解电镀使绝缘树脂层的表面粗糙化并在其上形成导体的步骤，其中绝缘树脂的粗糙表面的平均粗糙度（Ra），最大粗糙度（Ry）和导体厚度（T）层满足以下关系：0.2

44. 发明授权

US5814535A Supporting member for cooling means, electronic package and method of making the same 失效
标题翻译：冷却装置的支撑构件，电子封装及其制造方法
公开(公告)号：US5814535A
公开(公告)日：1998-09-29
申请号：US573131
申请日：1995-12-15
申请人： Yuzo Shimada , Takayuki Suyama , Yoshimasa Tanaka
发明人： Yuzo Shimada , Takayuki Suyama , Yoshimasa Tanaka
IPC分类号： H01L21/48 , H01L23/40 , H01L23/495 , H01L23/498 , H05K1/02 , H05K3/30 , H05K3/34 , H05K3/36 , H01L21/00 , H01L21/70 , H01L23/34
CPC分类号： H01L21/486 , H01L23/4006 , H01L23/49572 , H01L23/4985 , H01L24/50 , H05K3/301 , H05K3/363 , H01L2023/4043 , H01L2023/4056 , H01L2023/4062 , H01L2023/4087 , H01L2224/73253 , H01L2924/01322 , H01L2924/14 , H01L2924/15153 , H01L2924/15165 , H01L2924/1517 , H01L2924/15311 , H01L2924/1532 , H01L2924/15787 , H05K1/0201 , H05K2201/062 , H05K2201/09827 , H05K2201/09854 , H05K2201/10568 , H05K2201/10666 , H05K2201/10681 , H05K3/3457
摘要： An electronic package according to the present invention comprises a supporting member, an electronic device, a carrier, a substrate and cooling means. The supporting member includes a plate and a bottom leg for supporting the plate. A first end of the bottom leg is joined to the lower surface of the plate. The carrier has a hole for receiving the bottom leg. The electronic device is connected to the carrier and is attached to the lower surface of the plate. A second end of the bottom leg is inserted into the hole of the carrier. The second end of the bottom leg is joined to the upper surface of the substrate. The electronic device is positioned between the plate of the supporting member and the substrate. The cooling means is attached onto and supported by the upper surface of the plate.
摘要翻译：根据本发明的电子封装包括支撑构件，电子装置，载体，基板和冷却装置。支撑构件包括用于支撑板的板和底腿。底脚的第一端连接到板的下表面。载体具有用于接收底部支腿的孔。电子装置连接到载体上并附着到板的下表面。底脚的第二端插入托架的孔中。底脚的第二端连接到基底的上表面。电子设备位于支撑构件的板和基板之间。冷却装置附接到板的上表面并由板的上表面支撑。

45. 发明授权

US5793117A Semiconductor device and method of fabricating the same 失效
标题翻译：半导体装置及其制造方法
公开(公告)号：US5793117A
公开(公告)日：1998-08-11
申请号：US684617
申请日：1996-07-22
申请人： Yuzo Shimada , Naoji Senba , Nobuaki Takahashi
发明人： Yuzo Shimada , Naoji Senba , Nobuaki Takahashi
IPC分类号： G01R1/06 , G01R1/073 , G01R31/28 , H01L21/60 , H01L21/66 , H01L29/41 , H01L23/48 , H01L23/52 , H01L29/40
CPC分类号： G01R1/07314 , G01R31/2886 , H01L24/19 , H01L2924/12042 , H01L2924/14 , H01L2924/351
摘要： The invention provides a semiconductor device including a semiconductor substrate formed thereon with at least one recessed portion, an electrically conductive layer covering at least a surface of the recessed portion therewith, and a ball-bump formed on the electrically conductive layer within the recessed portion. The semiconductor device can act as a probe card by additionally having a tester device formed in the semiconductor substrate and provided with a function of testing electrical performances of a semiconductor device. Since the recessed portion can be formed by lithography technique, it is possible to arrange the greater number of pins in a smaller pitch, and in addition, it is also possible to locate ball-bumps in place with higher accuracy than a conventional semiconductor device.
摘要翻译：本发明提供了一种半导体器件，其包括在其上形成有至少一个凹部的半导体衬底，至少覆盖其凹部的表面的导电层，以及形成在凹部内的导电层上的球凸点。半导体器件可以通过另外具有形成在半导体衬底中的测试器器件并且具有测试半导体器件的电性能的功能而用作探针卡。由于可以通过光刻技术形成凹部，因此可以以更小的间距布置更多数量的销，另外也可以比现有的半导体装置更高精度地定位球形凸块。

46. 发明授权

US5283210A Low temperature sintering low dielectric inorganic composition 失效
标题翻译：低温烧结低介电无机组成
公开(公告)号：US5283210A
公开(公告)日：1994-02-01
申请号：US905376
申请日：1992-06-29
申请人： Keiichiro Kata , Yuzo Shimada
发明人： Keiichiro Kata , Yuzo Shimada
IPC分类号： C04B35/195 , C03C14/00 , C04B35/16 , H01B3/02 , H01B3/12 , H01L23/15 , H05K1/00 , H05K1/03 , C03C4/16
CPC分类号： C03C14/004 , H01L23/15 , C03C2214/04 , H01L2924/0002 , H01L2924/09701 , H05K1/0306 , H05K3/4676
摘要： A low temperature sintering, low dielectric inorganic composition is a ternary inorganic composition comprising cordierite, quartz glass and lead borosilicate glass, wherein if the amounts of the cordierite, quartz glass and lead borosilicate glass are represented by X, Y and Z (wt %) respectively, the composition of the ternary system falls within the range encircled by the following four points (a) to (d) including the lines between each neighboring two points:(X=35; Y=0; Z=65) (a)(X=65; Y=0; Z=35) (b)(X=0; Y=65; Z=35) (c)(X=0; Y=35; Z=65) (d)The inorganic composition has a dielectric constant substantially lower than that of the conventional composition while maintaining high reliability such as an ability of being sintered at a low temperature, high insulation properties and high resistance to water as well as excellent mechanical properties such as strength. The composition can be used for producing multilayer ceramic wiring boards for mounting very high speed VLSI elements and contributes to an increase in the packaging density and the production of fast transmitting devices.
摘要翻译：低温烧结低介电无机组合物是包含堇青石，石英玻璃和硼硅酸铅玻璃的三元无机组合物，其中如果堇青石，石英玻璃和硼硅酸铅玻璃的量由X，Y和Z（重量％）表示，（X = 35; Y = 0; Z = 65）（a）中的三个点（a）〜（d）所包围的范围内，（X = 65; Y = 0; Z = 35）（b）（X = 0; Y = 65; Z = 35）（c）（X = 0; Y = 35; Z = 65）（d）组合物的介电常数基本上低于常规组合物的介电常数，同时保持诸如在低温下烧结的能力，高绝缘性能和高耐水性等高可靠性以及优异的机械性能如强度。该组合物可用于生产用于安装超高速VLSI元件的多层陶瓷布线板，并有助于增加封装密度和快速传输器件的生产。

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