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31. 发明授权

US06576053B1 Method of forming thin film using atomic layer deposition method 有权
标题翻译：使用原子层沉积法形成薄膜的方法
公开(公告)号：US06576053B1
公开(公告)日：2003-06-10
申请号：US09679559
申请日：2000-10-06
申请人： Yeong-kwan Kim , Young-wook Park , Jae-soon Lim , Sung-je Choi , Sang-in Lee
发明人： Yeong-kwan Kim , Young-wook Park , Jae-soon Lim , Sung-je Choi , Sang-in Lee
IPC分类号： C30B2504
CPC分类号： H01L21/31691 , C30B25/02 , C30B29/20 , H01L21/316
摘要： In a method of forming a thin film using an atomic layer deposition (ALD) method, a thin film is formed on a substrate in cycles. Each cycle includes injecting a first reactant including an atom that forms the thin film and a ligand into a reaction chamber that includes the substrate, purging the first reactant, injecting a second reactant into the reaction chamber, and purging the second reactant. The thin film is formed by a chemical reaction between the atom that forms the thin film and a second reactant whose binding energy with respect to the atom that forms the thin film is larger than the binding energy of the ligand with respect to the atom that forms the thin film and the generation of by-products is prevented. The generation of a hydroxide by-product in the thin film is suppressed by using a material that does not include a hydroxide as the second reactant, purging the second reactant, and reacting the second reactant with a third reactant that includes hydroxide. After purging the second reactant, the third reactant for removing impurities and improving the stoichiometry of the thin film is injected and purged. In this way, it is possible to obtain a thin film that does not include impurities and whose stoichiometry is excellent.
摘要翻译：在使用原子层沉积（ALD）法形成薄膜的方法中，在基板上循环形成薄膜。每个循环包括将包括形成薄膜的原子和配体的第一反应物注入到包括基板的反应室中，清洗第一反应物，将第二反应物注入反应室，以及清除第二反应物。薄膜由形成薄膜的原子与第二反应物之间的化学反应形成，第二反应物的结合能相对于形成薄膜的原子的结合能大于配体相对于形成的原子的结合能防止了薄膜和副产物的产生。通过使用不包含氢氧化物作为第二反应物的材料，吹扫第二反应物，并使第二反应物与包含氢氧化物的第三反应物反应，可以抑制薄膜中氢氧化物副产物的产生。在清洗第二反应物之后，注入和清除用于除去杂质的第三反应物和改善薄膜的化学计量。以这种方式，可以获得不含杂质的化学计量优异的薄膜。

32. 发明授权

US06555394B2 Methods of fabricating capacitors including Ta2O5 layers in a chamber including changing a Ta2O5 layer to heater separation or chamber pressure 失效
公开(公告)号：US06555394B2
公开(公告)日：2003-04-29
申请号：US09867109
申请日：2001-05-29
申请人： Ki-yeon Park , Heung-soo Park , Young-wook Park
发明人： Ki-yeon Park , Heung-soo Park , Young-wook Park
IPC分类号： H01L2100
CPC分类号： H01L21/02356 , C23C16/405 , C23C16/46 , C23C16/56 , H01L21/02183 , H01L21/02337 , H01L21/02348 , H01L21/31604 , H01L21/31691
摘要： Methods of forming Ta2O5 layers in a process chamber are disclosed. A Ta2O5 layer can be maintained at a first temperature that is less than a temperature for crystallization of the Ta2O5 layer. At least one of a position of the Ta2O5 layer in the process chamber relative to the heater and a pressure in the process chamber is changed to increase the temperature of the Ta2O5 layer to about the temperature for crystallization.

33. 发明授权

US6136641A Method for manufacturing capacitor of semiconductor device including thermal treatment to dielectric film under hydrogen atmosphere 有权
标题翻译：在氢气氛下对电介质膜进行热处理的半导体器件的电容器的制造方法
公开(公告)号：US6136641A
公开(公告)日：2000-10-24
申请号：US134063
申请日：1998-08-13
申请人： Seok-jun Won , Kab-jin Nam , Young-wook Park
发明人： Seok-jun Won , Kab-jin Nam , Young-wook Park
IPC分类号： H01L29/12 , H01L21/02 , H01L21/3105 , H01L21/314 , H01L21/316 , H01L21/70
CPC分类号： H01L28/55 , H01L21/3105 , H01L21/31691
摘要： A capacitor fabricating method for a semiconductor device where a dielectric film is thermally treated under hydrogen atmosphere to improve interface characteristics between the dielectric film and an electrode. In the method, a lower electrode is formed on a semiconductor substrate. A dielectric film is formed on the lower electrode. The dielectric film is thermally treated under hydrogen atmosphere. An upper electrode is formed on the dielectric film, thereby completing formation of the capacitor. The thermal treatment under the hydrogen atmosphere is performed at a temperature of 300 to 600.degree. C. using H.sub.2 gas or H.sub.2 plasma for 5 to 60 minutes. Thus, the density of an interface trap between the electrode and the dielectric film of the capacitor is reduced.
摘要翻译：一种用于半导体器件的电容器制造方法，其中在氢气氛下对电介质膜进行热处理以改善介电膜和电极之间的界面特性。在该方法中，在半导体衬底上形成下电极。在下电极上形成电介质膜。电介质膜在氢气氛下进行热处理。在电介质膜上形成上电极，从而形成电容器。氢气氛下的热处理在300〜600℃的温度下，使用H2气或H2等离子体进行5〜60分钟。因此，电容器的电极和电介质膜之间的界面陷阱的密度降低。

34. 发明授权

US06476489B1 Apparatus and manufacturing method for semiconductor device adopting NA interlayer contact structure 失效
标题翻译：采用NA层间接触结构的半导体器件的装置和制造方法
公开(公告)号：US06476489B1
公开(公告)日：2002-11-05
申请号：US09258292
申请日：1999-02-26
申请人： Bong-young Yoo , Dae-hong Ko , Nae-in Lee , Young-wook Park
发明人： Bong-young Yoo , Dae-hong Ko , Nae-in Lee , Young-wook Park
IPC分类号： H01L2348
CPC分类号： H01L23/485 , H01L21/28061 , H01L21/76805 , H01L23/5226 , H01L23/53271 , H01L29/4925 , H01L29/4933 , H01L29/4983 , H01L2924/0002 , Y10S257/905 , Y10S257/906 , Y10S257/907 , Y10S257/908 , H01L2924/00
摘要： A semiconductor device adopting an interlayer contact structure between upper and lower conductive layers and a method of manufacturing the semiconductor device adopting the structure are provided. The lower conductive layer includes a first conductive layer and a first silicide layer stacked together. The upper conductive layer includes a second conductive layer doped with impurities and a second silicide layer stacked together. In the interlayer contact structure, the first and second conductive layers are in direct contact with each other. This decreases the contact resistance between the two conductive layers and improves the electrical properties of the device.
摘要翻译：提供了采用上下导电层之间的层间接触结构的半导体器件以及采用该结构制造半导体器件的方法。下导电层包括堆叠在一起的第一导电层和第一硅化物层。上导电层包括掺杂有杂质的第二导电层和堆叠在一起的第二硅化物层。在层间接触结构中，第一和第二导电层彼此直接接触。这降低了两个导电层之间的接触电阻并改善了器件的电性能。

35. 发明授权

US06239493B1 Apparatus and manufacturing method for semiconductor device adopting an interlayer contact structure 有权
公开(公告)号：US06239493B1
公开(公告)日：2001-05-29
申请号：US09258292
申请日：1999-02-26
申请人： Bong-young Yoo , Dae-hong Ko , Nae-in Lee , Young-wook Park
发明人： Bong-young Yoo , Dae-hong Ko , Nae-in Lee , Young-wook Park
IPC分类号： H01L2348
摘要： A semiconductor device adopting an interlayer contact structure between upper and lower conductive layers and a method of manufacturing the semiconductor device adopting the structure are provided. The lower conductive layer includes a first conductive layer and a first silicide layer stacked together. The upper conductive layer includes a second conductive layer doped with impurities and a second silicide layer stacked together. In the interlayer contact structure, the first and second conductive layers are in direct contact with each other. This decreases the contact resistance between the two conductive layers and improves the electrical properties of the device.

36. 发明授权

US5837605A Manufacturing method of transistors 失效
标题翻译：晶体管的制造方法
公开(公告)号：US5837605A
公开(公告)日：1998-11-17
申请号：US563082
申请日：1995-11-27
申请人： Young-wook Park , Dae-rok Bae , Mun-han Park
发明人： Young-wook Park , Dae-rok Bae , Mun-han Park
IPC分类号： H01L21/335 , H01L21/28 , H01L21/285 , H01L21/336 , H01L29/78 , H01L21/441
CPC分类号： H01L21/28061
摘要： A manufacturing method for transistors wherein silicide is directed doped with a conductive impurity includes the steps of: forming a field oxide film defining an active region on a semiconductor substrate; forming transistors wherein a doped first silicide film is formed on gate electrodes on said active region; forming an interlayer dielectric film having contact holes on the whole surface of said semiconductor substrate; forming spacers on the innerwalls of each contact hole;p forming a thin doped polysilicon film on the whole surface of said semiconductor surface; and forming a doped second silicide film on the whole surface of said doped polysilicon film, filling each contact hole. The silicide film is directly doped with conductive impurity so that the conductive impurity of a polysilicon film can be prevented from being diffused to the outside. Therefore, the doped silicide film is useful to prevent the threshold voltage from increasing and the saturation current from reducing.
摘要翻译：其中硅化物被引导掺杂有导电杂质的晶体管的制造方法包括以下步骤：在半导体衬底上形成限定有源区的场氧化物膜; 形成晶体管，其中在所述有源区上的栅电极上形成掺杂的第一硅化物膜; 在所述半导体衬底的整个表面上形成具有接触孔的层间绝缘膜; 在每个接触孔的内壁上形成间隔物; p在所述半导体表面的整个表面上形成薄掺杂多晶硅膜; 以及在所述掺杂多晶硅膜的整个表面上形成掺杂的第二硅化物膜，填充每个接触孔。硅化物膜直接掺杂有导电杂质，使得可以防止多晶硅膜的导电杂质扩散到外部。因此，掺杂的硅化物膜可用于防止阈值电压升高，饱和电流降低。

37. 发明授权

US07316954B2 Methods of fabricating integrated circuit devices that utilize doped poly-Si1−xGex conductive plugs as interconnects 有权
标题翻译：使用掺杂的多晶硅Si-xGex导电插头作为互连的集成电路器件的制造方法
公开(公告)号：US07316954B2
公开(公告)日：2008-01-08
申请号：US10968233
申请日：2004-10-19
申请人： Sang-jeong Oh , Yeong-kwan Kim , Seung-hwan Lee , Dong-chan Kim , Young-wook Park
发明人： Sang-jeong Oh , Yeong-kwan Kim , Seung-hwan Lee , Dong-chan Kim , Young-wook Park
IPC分类号： H01L21/8242 , H01L21/20
CPC分类号： H01L27/10855 , H01L21/28525 , H01L21/76877 , H01L21/76895 , H01L23/485 , H01L28/60 , H01L28/90 , H01L2924/0002 , H01L2924/00
摘要： The present invention provides integrated circuit devices that include a semiconductor substrate having a semiconductor region of first conductivity type therein extending adjacent the surface of the substrate. The device further includes an electrically insulating layer with a contact hole in it that exposes the semiconductor region of first conductivity type on the surface of the semiconductor substrate. The device still further includes a poly-Si1-xGex conductive plug of first conductivity type that extends in the contact hole and is electrically connected to the semiconductor region of first conductivity type is provided. Related methods of fabricating integrated circuit devices are also provided.
摘要翻译：本发明提供了一种集成电路器件，其包括半导体衬底，该半导体衬底具有第一导电类型的半导体区域，该半导体区域在衬底的表面附近延伸。该器件还包括其中具有接触孔的电绝缘层，其在半导体衬底的表面上暴露出第一导电类型的半导体区域。该器件还包括在接触孔中延伸并且电连接到第一导电类型的半导体区域的第一导电类型的多晶Si-1-x-Ge 提供导电类型。还提供了制造集成电路器件的相关方法。

38. 发明授权

US06806183B2 Methods for forming capacitors on semiconductor substrates 有权
标题翻译：在半导体衬底上形成电容器的方法
公开(公告)号：US06806183B2
公开(公告)日：2004-10-19
申请号：US10295348
申请日：2002-11-15
申请人： Chang-seok Kang , Doo-sup Hwang , Cha-young Yoo , Young-wook Park , Hong-bae Park
发明人： Chang-seok Kang , Doo-sup Hwang , Cha-young Yoo , Young-wook Park , Hong-bae Park
IPC分类号： H01L214763
CPC分类号： H01L28/60 , H01L21/321 , H01L28/55
摘要： Methods and apparatus for plasma annealing layers of a microelectronic capacitor on a substrate are provided to improve the leakage current characteristics of a capacitor and/or to reduce the number of impurities in an electrode.
摘要翻译：提供了用于提高电容器的漏电流特性和/或减少电极中杂质数量的基板上的微电子电容器等离子体退火层的方法和装置。

39. 发明授权

US6133148A Method of depositing film for semiconductor device in single wafer type apparatus using a lamp heating method 有权
标题翻译：使用灯加热方法在单晶片型设备中淀积半导体器件的膜的方法
公开(公告)号：US6133148A
公开(公告)日：2000-10-17
申请号：US185093
申请日：1998-11-03
申请人： Seok-jun Won , Kyoung-hoon Kim , Young-wook Park , Kab-jin Nam , Duk-soo Yoon , Sun-woo Kwak
发明人： Seok-jun Won , Kyoung-hoon Kim , Young-wook Park , Kab-jin Nam , Duk-soo Yoon , Sun-woo Kwak
IPC分类号： H01L21/26 , C23C16/44 , C23C16/455 , C23C16/48 , H01L21/285 , H01L21/314 , H01L21/44 , H01L21/31
CPC分类号： C23C16/45561 , C23C16/45557 , C23C16/481 , H01L21/28556 , H01L21/314 , Y10S438/907
摘要： A method of depositing a thin film for a semiconductor device using a lamp heating type apparatus. In the method, a wafer is loaded into a processing chamber of the apparatus, and the pressure of the chamber and the temperature of a susceptor installed in the chamber are increased to a level higher than a deposition pressure and a deposition temperature, respectively. Then, the pressure of the chamber and the temperature of the susceptor are decreased to the deposition pressure and the deposition temperature, respectively, and a film is deposited on the wafer. The vacuum of the chamber is then released and the gas remaining in the chamber and a source gas injection tube is purged.
摘要翻译：一种使用灯加热型设备沉积半导体器件用薄膜的方法。在该方法中，将晶片装载到装置的处理室中，并且将室的压力和安装在室中的基座的温度分别提高到高于沉积压力和沉积温度的水平。然后，室的压力和基座的温度分别降低到沉积压力和沉积温度，并且膜沉积在晶片上。然后释放室的真空，并且清除残留在室中的气体和源气体注入管。

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