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31. 发明申请

US20100271851A1 SELF-BOOTSTRAPPING FIELD EFFECT DIODE STRUCTURES AND METHODS 有权
标题翻译：自引导场效应二极管结构和方法
公开(公告)号：US20100271851A1
公开(公告)日：2010-10-28
申请号：US12683425
申请日：2010-01-06
申请人： Alexei Ankoudinov , Vladimir Rodov
发明人： Alexei Ankoudinov , Vladimir Rodov
IPC分类号： H02M7/06 , H01L29/66
CPC分类号： H01L29/7412 , H01L27/0811 , H01L27/0814 , H01L29/861
摘要： A two terminal device which can be used for the rectification of the current. Internally it has a regenerative coupling between MOS gates of opposite type and probe regions. This regenerative coupling allows to achieve performance better than that of ideal diode.
摘要翻译：可用于整流电流的二端装置。在内部，它具有相反类型的MOS栅极和探针区域之间的再生耦合。这种再生耦合可以实现比理想二极管更好的性能。

32. 发明申请

US20070246794A1 Integrated circuit including power diode 有权
标题翻译：集成电路包括功率二极管
公开(公告)号：US20070246794A1
公开(公告)日：2007-10-25
申请号：US11821234
申请日：2007-06-22
申请人： Paul Chang , Geeng-Chuan Chern , Prognyan Ghosh , Wayne Hsueh , Vladimir Rodov
发明人： Paul Chang , Geeng-Chuan Chern , Prognyan Ghosh , Wayne Hsueh , Vladimir Rodov
IPC分类号： H01L29/00 , H01L21/76
CPC分类号： H01L27/0629 , H01L29/0692 , H01L29/78 , H01L29/861
摘要： A method of fabricating a semiconductor integrated circuit including a power diode includes providing a semiconductor substrate of first conductivity type, fabricating a integrated circuit such as a CMOS transistor circuit in a first region of the substrate, and fabricating a power diode in a second region in the semiconductor substrate. Dielectric material is formed between the first region and the second regions thereby providing electrical isolation between the integrated circuit in the first region and the power diode in the second region. The power diode can comprise a plurality of MOS source/drain elements and associated gate elements all connected together by one electrode of the diode, and a semiconductor layer in the second region can function as another source/drain of the power diode.
摘要翻译：一种制造包括功率二极管的半导体集成电路的方法包括提供第一导电类型的半导体衬底，在衬底的第一区域中制造诸如CMOS晶体管电路的集成电路，并且在第二区域中制造功率二极管半导体衬底。介电材料形成在第一区域和第二区域之间，从而在第一区域中的集成电路与第二区域中的功率二极管之间提供电隔离。功率二极管可以包括由二极管的一个电极连接在一起的多个MOS源极/漏极元件和相关联的栅极元件，并且第二区域中的半导体层可以用作功率二极管的另一个源极/漏极。

33. 发明授权

US07250668B2 Integrated circuit including power diode 有权
公开(公告)号：US07250668B2
公开(公告)日：2007-07-31
申请号：US11040180
申请日：2005-01-20
申请人： Paul Chang , Geeng-Chuan Chern , Prognyan Ghosh , Wayne Y. W. Hsueh , Vladimir Rodov
发明人： Paul Chang , Geeng-Chuan Chern , Prognyan Ghosh , Wayne Y. W. Hsueh , Vladimir Rodov
IPC分类号： H01L29/00
CPC分类号： H01L27/0629 , H01L29/0692 , H01L29/78 , H01L29/861
摘要： A method of fabricating a semiconductor integrated circuit including a power diode includes providing a semiconductor substrate of first conductivity type, fabricating a integrated circuit such as a CMOS transistor circuit in a first region of the substrate, and fabricating a power diode in a second region in the semiconductor substrate. Dielectric material is formed between the first region and the second regions thereby providing electrical isolation between the integrated circuit in the first region and the power diode in the second region. The power diode can comprise a plurality of MOS source/drain elements and associated gate elements all connected together by one electrode of the diode, and a semiconductor layer in the second region can function as another source/drain of the power diode.

34. 发明申请

US20060157815A1 Integrated circuit including power diode 有权
标题翻译：集成电路包括功率二极管
公开(公告)号：US20060157815A1
公开(公告)日：2006-07-20
申请号：US11040180
申请日：2005-01-20
申请人： Paul Chang , Geeng-Chuan Chern , Prognyan Ghosh , Wayne Hsueh , Vladimir Rodov
发明人： Paul Chang , Geeng-Chuan Chern , Prognyan Ghosh , Wayne Hsueh , Vladimir Rodov
IPC分类号： H01L29/00
CPC分类号： H01L27/0629 , H01L29/0692 , H01L29/78 , H01L29/861
摘要： A method of fabricating a semiconductor integrated circuit including a power diode includes providing a semiconductor substrate of first conductivity type, fabricating a integrated circuit such as a CMOS transistor circuit in a first region of the substrate, and fabricating a power diode in a second region in the semiconductor substrate. Dielectric material is formed between the first region and the second regions thereby providing electrical isolation between the integrated circuit in the first region and the power diode in the second region. The power diode can comprise a plurality of MOS source/drain elements and associated gate elements all connected together by one electrode of the diode, and a semiconductor layer in the second region can function as another source/drain of the power diode.
摘要翻译：一种制造包括功率二极管的半导体集成电路的方法包括提供第一导电类型的半导体衬底，在衬底的第一区域中制造诸如CMOS晶体管电路的集成电路，并且在第二区域中制造功率二极管半导体衬底。介电材料形成在第一区域和第二区域之间，从而在第一区域中的集成电路与第二区域中的功率二极管之间提供电隔离。功率二极管可以包括由二极管的一个电极连接在一起的多个MOS源极/漏极元件和相关联的栅极元件，并且第二区域中的半导体层可以用作功率二极管的另一个源极/漏极。

35. 发明申请

US20060097323A1 Method and apparatus for preventing microcircuit thermo-mechanical damage during an ESD event 审中-公开
公开(公告)号：US20060097323A1
公开(公告)日：2006-05-11
申请号：US11314266
申请日：2005-12-21
申请人： Vladimir Rodov , Wlodzimierz Tworzydlo
发明人： Vladimir Rodov , Wlodzimierz Tworzydlo
IPC分类号： H01L23/62
CPC分类号： H01L29/1602 , H01L23/60 , H01L27/0251 , H01L29/16 , H01L29/1608 , H01L29/20 , H01L29/456 , H01L29/4925 , H01L2924/0002 , H01L2924/00
摘要： A method and apparatus for preventing thermo-mechanical damage to an electrostatic discharge (ESD) protection device is disclosed. The method and apparatus of the invention use materials with superior thermo-mechanical properties, in particular, the Coefficient of Thermal Expansion (CTE), melting temperature, tensile strength and fracture toughness. The thermo-mechanical energy absorber materials are incorporated in, or replace, components of the ESD device that are susceptible to thermo-mechanical stress and cracking due to localized heating and thermal expansion.

36. 发明授权

US06624030B2 Method of fabricating power rectifier device having a laterally graded P-N junction for a channel region 有权
标题翻译：制造具有用于沟道区域的横向渐变的P-N结的功率整流装置的方法
公开(公告)号：US06624030B2
公开(公告)日：2003-09-23
申请号：US09742262
申请日：2000-12-19
申请人： Paul Chang , Geeng-Chuan Chern , Wayne Y. W. Hsueh , Vladimir Rodov , Charles Lin
发明人： Paul Chang , Geeng-Chuan Chern , Wayne Y. W. Hsueh , Vladimir Rodov , Charles Lin
IPC分类号： H01L21336
CPC分类号： H01L29/861 , H01L21/2815 , H01L29/0696 , H01L29/6609 , H01L29/7802
摘要： A vertical semiconductor rectifier device includes a semiconductor substrate of first conductivity type and having a plurality of gates insulatively formed on a first major surface and a plurality of source/drain regions of the first conductivity type formed in surface regions of second conductivity type in the first major surface adjacent to the gates. A plurality of channels of the second conductivity type each abuts a source/drain region and extends under a gate, each channel being laterally graded with a sloped P-N junction separating the channel region from the substrate of first conductivity type. In fabricating the vertical semiconductor rectifier device, a partial ion mask is formed on the surface of the semiconductor with the mask having a sloped surface which varies the path length of ions through the mask to form laterally-graded channel regions.
摘要翻译：一种垂直半导体整流器件包括第一导电类型的半导体衬底，并且具有绝缘地形成在第一主表面上的多个栅极和在第一导电类型的第一导电类型的表面区域中形成的多个第一导电类型的源极/漏极区域主要表面毗邻门。第二导电类型的多个通道每个都邻接源极/漏极区并在栅极下方延伸，每个沟道横向渐变，其中沟道区域与第一导电类型的衬底分离出倾斜的P-N结。在制造垂直半导体整流器件时，在半导体表面上形成一个部分离子掩模，该掩模具有倾斜表面，该倾斜表面改变通过该掩模的离子的路径长度以形成横向渐变的沟道区。

37. 发明授权

US06515330B1 Power device having vertical current path with enhanced pinch-off for current limiting 失效
标题翻译：具有垂直电流路径的功率器件，具有增强的夹断电流限制
公开(公告)号：US06515330B1
公开(公告)日：2003-02-04
申请号：US10037495
申请日：2002-01-02
申请人： Gary M. Hurtz , Vladimir Rodov , Geeng-Chuan Chern , Paul Chang , Ching-Lang Chiang
发明人： Gary M. Hurtz , Vladimir Rodov , Geeng-Chuan Chern , Paul Chang , Ching-Lang Chiang
IPC分类号： H01L2976
CPC分类号： H01L29/7811 , H01L29/0696 , H01L29/1095 , H01L29/66712 , H01L29/7802 , H01L29/861
摘要： A semiconductor current limiting device is provided by a two-terminal vertical N(P)-channel MOSFET device having the gate, body, and source terminals tied together as the anode and the drain terminal as the cathode. The doping profile of the body is so tailored with ion implantation that a depletion region pinches off to limit current. The body comprises a shallow implant to form a MOS channel and an additional deep implant through a spacer shielding the channel area. Implanted a higher energies and at an acute angle, the deep implant protrudes into the regular current path of the vertical MOSFET.
摘要翻译：半导体限流器件由两端垂直N（P）沟道MOSFET器件提供，其栅极，体和源极端子连接在一起作为阳极，漏极端子作为阴极。使用离子注入来定制主体的掺杂特性，耗尽区夹紧以限制电流。主体包括浅植入物以形成MOS通道，并通过隔离屏蔽通道区域的间隔物进行额外的深度注入。注入较高的能量并且以锐角，深的注入突出到垂直MOSFET的常规电流通路中。

38. 发明授权

US06448160B1 Method of fabricating power rectifier device to vary operating parameters and resulting device 有权
标题翻译：制造动力整流装置以改变运行参数和产生的装置的方法
公开(公告)号：US06448160B1
公开(公告)日：2002-09-10
申请号：US09544730
申请日：2000-04-06
申请人： Paul Chang , Geeng-Chuan Chern , Wayne Y. W. Hsueh , Vladimir Rodov
发明人： Paul Chang , Geeng-Chuan Chern , Wayne Y. W. Hsueh , Vladimir Rodov
IPC分类号： H01L2144
CPC分类号： H01L29/7802 , H01L21/2815 , H01L27/0727 , H01L27/0814 , H01L27/095 , H01L29/0619 , H01L29/0634 , H01L29/1095 , H01L29/66712 , H01L29/781 , H01L29/861 , H01L29/872 , H01L2924/0002 , H01L2924/00
摘要： A semiconductor rectifying device which emulates the characteristics of a low forward voltage drop Schottky diode and which is capable of a variety of electrical characteristics from less than 1 A to greater than 1000 A current with adjustable breakdown voltage. The manufacturing process provides for uniformity and controllability of operating parameters, high yield, and readily variable device sizes. The device includes a semiconductor body with a guard ring on one surface to define a device region in which are optionally formed a plurality of conductive plugs. Between the guard ring and the conductive plugs are a plurality of source/drain, gate and channel elements which function with the underlying substrate in forming a MOS transistor. The channel regions are defined by using the photoresist mask for the gate oxide with the photoresist mask isotropically etched to expose a peripheral portion of the gate oxide (and gate electrode) with ions thereafter implanted through the exposed gate for forming the channel region. The source/drain (e.g. source) regions can be formed by ion implantation or by out-diffusion from a doped polysilicon layer.
摘要翻译：一种半导体整流装置，其模拟低正向压降肖特基二极管的特性，并能够具有小于1A至大于1000A电流的多种电气特性，具有可调击穿电压。制造过程提供了操作参数的均匀性和可控性，高产量和容易变化的装置尺寸。该器件包括在一个表面上具有保护环的半导体本体，以限定其中可选地形成多个导电插塞的器件区域。在保护环和导电插塞之间是形成MOS晶体管的多个源极/漏极，栅极和沟道元件，其与下面的衬底起作用。通过使用用于栅极氧化物的光致抗蚀剂掩模来限定沟道区，其中光致抗蚀剂掩模被各向同性蚀刻以暴露栅极氧化物（和栅电极）的外围部分，然后通过暴露的栅极注入用于形成沟道区的离子。源极/漏极（例如源极）区域可以通过离子注入或通过从掺杂多晶硅层向外扩散来形成。

39. 发明授权

US06404033B1 Schottky diode having increased active surface area with improved reverse bias characteristics and method of fabrication 有权
标题翻译：肖特基二极管具有增加的有源表面积，具有改进的反向偏压特性和制造方法
公开(公告)号：US06404033B1
公开(公告)日：2002-06-11
申请号：US09620653
申请日：2000-07-20
申请人： Paul Chang , Geeng-Chuan Chern , Wayne Y. W. Hsueh , Vladimir Rodov
发明人： Paul Chang , Geeng-Chuan Chern , Wayne Y. W. Hsueh , Vladimir Rodov
IPC分类号： H01L27095
CPC分类号： H01L29/66143 , H01L21/2815 , H01L27/0814 , H01L27/095 , H01L29/0619 , H01L29/66712 , H01L29/7802 , H01L29/781 , H01L29/861 , H01L29/872
摘要： A Schottky diode comprises a semiconductor body of one conductivity type, the semiconductor body having a grooved surface, a metal layer on the grooved surface and forming a Schottky junction with the semiconductor body. The semiconductor body preferably includes a silicon substrate with the grooved surface being on a device region defined by a guard ring of a conductivity type opposite to the conductivity type of the semiconductor body, and a plurality of doped regions at the bottom of grooves and forming P-N junctions with the semiconductor body. The P-N junctions of the doped regions form carrier depletion regions across and spaced from the grooves to increase the reverse bias breakdown voltage and reduce the reverse bias leakage current.
摘要翻译：肖特基二极管包括一种导电类型的半导体本体，半导体本体具有沟槽表面，在凹槽表面上的金属层，并与半导体本体形成肖特基结。半导体本体优选地包括硅衬底，其中沟槽表面在由与半导体本体的导电类型相反的导电类型的保护环限定的器件区域上，以及在沟槽底部的多个掺杂区域并形成PN 与半导体体接合。掺杂区域的P-N结形成跨沟槽间隙的载流子耗尽区域，以增加反向偏压击穿电压并减小反偏压漏电流。

40. 发明授权

US5932922A Uniform current density and high current gain bipolar transistor 失效
公开(公告)号：US5932922A
公开(公告)日：1999-08-03
申请号：US818643
申请日：1997-03-14
申请人： Richard A. Metzler , Vladimir Rodov
发明人： Richard A. Metzler , Vladimir Rodov
IPC分类号： H01L29/08 , H01L29/73 , H01L29/00
CPC分类号： H01L29/0804 , H01L29/73
摘要： A bipolar transistor designed to support a substantially uniform current density in base and collector regions to prevent the characteristic early fall-off of bipolar transistor current gain, and to improve the forward safe operating area performance. The advantages of the present invention are achieved by optimally spacing the neighboring emitters in relation to base thickness and further by maintaining a symmetrical topology by the self-aligned formation of emitters and base contacts. The spacing distance between the neighboring emitters does not exceed the base thickness. As a result, the current density below each emitter island is substantially uniform and the transistor as a whole can conduct a higher total current. Moreover, the transistor inhibits formation of current filaments and hot spots because the electric field in the collector region is uniform.

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