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21. 发明授权

US06251720B1 High pressure reoxidation/anneal of high dielectric constant materials 失效
标题翻译：高介电常数材料的高压再氧化/退火
公开(公告)号：US06251720B1
公开(公告)日：2001-06-26
申请号：US08720375
申请日：1996-09-27
申请人： Randhir P. S. Thakur , Scott Jeffrey DeBoer
发明人： Randhir P. S. Thakur , Scott Jeffrey DeBoer
IPC分类号： H01L218242
CPC分类号： H01L28/60 , H01L21/32105 , H01L21/3211 , H01L27/1085 , H01L28/84
摘要： A high dielectric constant (HDC) capacitive dielectric film is fabricated in a capacitor structure using relatively high pressure surface treatments. After forming the HDC capacitive dielectric film on a supporting bottom plate electrode structure, a surface treatment comprising oxidation, at a pressure of at least approximately one atmosphere and temperatures of approximately at least 200 degrees Celsius densifies/conditions the HDC capacitive dielectric film. When using a polysilicon, crystalline silicon, hemispherical grain polysilicon, germanium, or silicon-germanium bottom plate electrode, a relatively high pressure surface treatment, comprising rapid thermal nitridation or oxidation, is used after forming the bottom plate electrode, forming a diffusion barrier layer in a controlled manner.
摘要翻译：使用相对较高压力的表面处理，在电容器结构中制造高介电常数（HDC）电容电介质膜。在支撑底板电极结构上形成HDC电容电介质膜之后，在至少大约一个气压的压力和大约至少200摄氏度的温度下，包括氧化的表面处理使HDC电容性电介质膜致密/调节。当使用多晶硅，晶体硅，半球形晶粒多晶硅，锗或硅锗底板电极时，在形成底板电极之后使用包括快速热氮化或氧化的相对高压表面处理，形成扩散阻挡层以受控的方式。

22. 发明授权

US6146959A Method of forming capacitors containing tantalum 失效
标题翻译：形成含有钽的电容器的方法
公开(公告)号：US6146959A
公开(公告)日：2000-11-14
申请号：US98035
申请日：1998-06-15
申请人： Scott Jeffrey DeBoer , F. Daniel Gealy , Randhir P. S. Thakur
发明人： Scott Jeffrey DeBoer , F. Daniel Gealy , Randhir P. S. Thakur
IPC分类号： H01G4/10 , H01L21/02 , H01L21/285 , H01L21/314 , H01L21/316 , H01L21/20
CPC分类号： H01L28/40 , H01G4/10 , H01L21/28568 , H01L21/3145 , H01L21/31604 , H01L28/56
摘要： The invention pertains to methods of forming capacitors and semiconductor circuit components. In one aspect, the invention includes a method of forming a dielectric layer comprising: a) forming a first tantalum-comprising layer; and b) forming a second tantalum-comprising layer over the first tantalum-comprising layer, the second tantalum-comprising layer comprising nitrogen. In another aspect, the invention includes a method of forming a capacitor comprising: a) forming a first capacitor plate; b) forming a first layer over the first capacitor plate, the first layer comprising tantalum and oxygen; c) annealing the first layer in the presence of an ambient comprising a nitrogen-comprising gas containing at least one compound selected from a group consisting of ammonia, hydrazine and hydrazoic acid; the annealing forming a second layer over the first layer; and d) forming a second capacitor plate over the second layer.
摘要翻译：本发明涉及形成电容器和半导体电路元件的方法。一方面，本发明包括一种形成电介质层的方法，包括：a）形成第一含钽层; 以及b）在所述第一含钽层上形成第二含钽层，所述第二含钽层包含氮。另一方面，本发明包括形成电容器的方法，包括：a）形成第一电容器板; b）在第一电容器板上形成第一层，第一层包括钽和氧; c）在包含含有至少一种选自氨，肼和叠氮酸的化合物的含氮气体的环境存在下退火第一层; 所述退火在所述第一层上形成第二层; 以及d）在所述第二层上形成第二电容器板。

23. 发明授权

US07045277B2 Semiconductor processing methods of transferring patterns from patterned photoresists to materials, and structures comprising silicon nitride 有权
公开(公告)号：US07045277B2
公开(公告)日：2006-05-16
申请号：US10160698
申请日：2002-05-30
申请人： Scott Jeffrey DeBoer , John T. Moore
发明人： Scott Jeffrey DeBoer , John T. Moore
IPC分类号： G03F7/26 , H01L21/027
CPC分类号： H01L21/0332 , H01L21/28123 , H01L21/31144 , H01L21/3144 , H01L21/3145 , H01L21/3185 , H01L21/32139 , Y10S438/942 , Y10S438/944
摘要： The invention includes a semiconductor processing method. A first material comprising silicon and nitrogen is formed. A second material is formed over the first material, and the second material comprises silicon and less nitrogen, by atom percent, than the first material. An imagable material is formed on the second material, and patterned. A pattern is then transferred from the patterned imagable material to the first and second materials. The invention also includes a structure comprising a first layer of silicon nitride over a substrate, and a second layer on the first layer. The second layer comprises silicon and is free of nitrogen. The structure further comprises a third layer consisting essentially of imagable material on the second layer.

24. 发明授权

US06858523B2 Semiconductor processing methods of transferring patterns from patterned photoresists to materials, and structures comprising silicon nitride 有权
标题翻译：将图案从图案化光刻胶转移到材料的半导体加工方法，以及包括氮化硅的结构
公开(公告)号：US06858523B2
公开(公告)日：2005-02-22
申请号：US10161136
申请日：2002-05-30
申请人： Scott Jeffrey DeBoer , John T. Moore
发明人： Scott Jeffrey DeBoer , John T. Moore
IPC分类号： H01L21/28 , H01L21/314 , H01L21/3205
CPC分类号： H01L21/0332 , H01L21/28123 , H01L21/31144 , H01L21/3144 , H01L21/3145 , H01L21/3185 , H01L21/32139 , Y10S438/942 , Y10S438/944
摘要： The invention includes a semiconductor processing method. A first material comprising silicon and nitrogen is formed. A second material is formed over the first material, and the second material comprises silicon and less nitrogen, by atom percent, than the first material. An imagable material is formed on the second material, and patterned. A pattern is then transferred from the patterned imagable material to the first and second materials. The invention also includes a structure comprising a first layer of silicon nitride over a substrate, and a second layer on the first layer. The second layer comprises silicon and is free of nitrogen. The structure further comprises a third layer consisting essentially of imagable material on the second layer.
摘要翻译：本发明包括半导体处理方法。形成包含硅和氮的第一材料。在第一材料上形成第二材料，并且第二材料包含硅和少于第一材料的原子百分比的氮。在第二材料上形成可成像的材料并图案化。然后将图案从图案化的可成像材料转移到第一和第二材料。本发明还包括在衬底上包括第一氮化硅层的结构，以及在第一层上的第二层。第二层包括硅并且不含氮。该结构还包括基本上由第二层上的可成像材料组成的第三层。

25. 发明授权

US06635530B2 Methods of forming gated semiconductor assemblies 失效
标题翻译：形成门控半导体组件的方法
公开(公告)号：US06635530B2
公开(公告)日：2003-10-21
申请号：US09057148
申请日：1998-04-07
申请人： Mark A. Helm , Mark Fischer , John T. Moore , Scott Jeffrey DeBoer
发明人： Mark A. Helm , Mark Fischer , John T. Moore , Scott Jeffrey DeBoer
IPC分类号： H01L21336
CPC分类号： H01L29/7881 , H01L21/28273 , H01L29/511
摘要： The invention includes a method of forming a gated semiconductor assembly. A first transistor gate layer is formed over a substrate. A silicon nitride layer is formed over the first transistor gate layer. The silicon nitride layer comprises a first portion and a second portion elevationally displaced above the first portion. The first portion has less electrical resistance than the second portion and a different stoichiometric composition than the second portion. The first portion is physically against the second portion. A second transistor gate layer is formed over the silicon nitride layer.
摘要翻译：本发明包括一种形成门控半导体组件的方法。在衬底上形成第一晶体管栅极层。在第一晶体管栅极层上形成氮化硅层。氮化硅层包括第一部分和在第一部分上方向上移位的第二部分。第一部分具有比第二部分更少的电阻和不同于第二部分的化学计量组成。第一部分物理地抵靠第二部分。在氮化硅层上形成第二晶体管栅极层。

26. 发明授权

US06391710B1 Methods of forming capacitors 有权
标题翻译：形成电容器的方法
公开(公告)号：US06391710B1
公开(公告)日：2002-05-21
申请号：US09602832
申请日：2000-06-23
申请人： John T. Moore , Guy T. Blalock , Scott Jeffrey DeBoer
发明人： John T. Moore , Guy T. Blalock , Scott Jeffrey DeBoer
IPC分类号： H01L218242
CPC分类号： H01L28/40 , H01L21/31116 , H01L21/3146 , Y10S438/924 , Y10S438/97
摘要： In one aspect, the invention includes an etching process, comprising: a) providing a first material over a substrate, the first material comprising from about 2% to about 20% carbon (by weight); b) providing a second material over the first material; and c) etching the second material at a faster rate than the first material. In another aspect, the invention includes a capacitor forming method, comprising: a) forming a wordline over a substrate; b) defining a node proximate the wordline; c.) forming an etch stop layer over the wordline, the etch stop layer comprising carbon; d) forming an insulative layer over the etch stop layer; e) etching through the insulative layer to the etch stop layer to form an opening through the insulative layer; and e) forming a capacitor construction comprising a storage node, dielectric layer and second electrode, at least a portion of the capacitor construction being within the opening. In yet another aspect, the invention includes a semiconductive material assembly, comprising: a) a semiconductive substrate; and b) a layer over the semiconductive substrate, the layer comprising silicon, nitrogen and carbon.
摘要翻译：一方面，本发明包括蚀刻工艺，其包括：a）在衬底上提供第一材料，所述第一材料包含约2％至约20％的碳（重量）; b）在第一材料上提供第二材料; 以及c）以比所述第一材料更快的速率蚀刻所述第二材料。另一方面，本发明包括电容器形成方法，包括：a）在衬底上形成字线; b）定义靠近字线的节点; c）在所述字线上形成蚀刻停止层，所述蚀刻停止层包含碳; d）在所述蚀刻停止层上形成绝缘层; e）通过绝缘层蚀刻到蚀刻停止层以形成穿过绝缘层的开口; 以及e）形成包括存储节点，电介质层和第二电极的电容器结构，所述电容器结构的至少一部分在所述开口内。在另一方面，本发明包括半导体材料组件，其包括：a）半导体衬底; 以及b）半导体衬底上的层，该层包含硅，氮和碳。

27. 发明授权

US07141850B2 Gated semiconductor assemblies and methods of forming gated semiconductor assemblies 有权
标题翻译：门控半导体组件和形成门控半导体组件的方法
公开(公告)号：US07141850B2
公开(公告)日：2006-11-28
申请号：US10769573
申请日：2004-01-30
申请人： Mark A. Helm , Mark Fischer , John T. Moore , Scott Jeffrey DeBoer
发明人： Mark A. Helm , Mark Fischer , John T. Moore , Scott Jeffrey DeBoer
IPC分类号： H01L29/792
CPC分类号： H01L29/7881 , H01L21/28273 , H01L29/511
摘要： In one aspect, the invention includes a method of forming a gated semiconductor assembly, comprising: a) forming a silicon nitride layer over and against a floating gate; and b) forming a control gate over the silicon nitride layer. In another aspect, the invention includes a method of forming a gated semiconductor assembly, comprising: a) forming a floating gate layer over a substrate; b) forming a silicon nitride layer over the floating gate layer, the silicon nitride layer comprising a first portion and a second portion elevationally displaced from the first portion, the first portion having a greater stoichiometric amount of silicon than the second portion; and c) forming a control gate over the silicon nitride layer. In yet another aspect, the invention includes a gated semiconductor assembly comprising: a) a substrate; b) a floating gate over the substrate; c) a control gate over the floating gate; and d) an electron barrier layer between the floating gate and the control gate, the electron barrier layer comprising a silicon nitride layer, the silicon nitride layer comprising a first portion and a second portion elevationally displaced from the first portion, the first portion having a greater stoichiometric amount of silicon than the second portion.
摘要翻译：一方面，本发明包括一种形成门控半导体组件的方法，包括：a）在浮动栅极上形成氮化硅层; 以及b）在所述氮化硅层上形成控制栅极。另一方面，本发明包括形成门控半导体组件的方法，包括：a）在衬底上形成浮栅; b）在所述浮栅上形成氮化硅层，所述氮化硅层包括从所述第一部分向前倾斜的第一部分和第二部分，所述第一部分具有比所述第二部分更大的化学计量的硅量; 以及c）在所述氮化硅层上形成控制栅极。在另一方面，本发明包括门控半导体组件，其包括：a）衬底; b）衬底上的浮栅; c）浮动门上的控制门; 以及d）在所述浮动栅极和所述控制栅极之间的电子势垒层，所述电子势垒层包括氮化硅层，所述氮化硅层包括第一部分和从所述第一部分向上偏移的第二部分，所述第一部分具有比第二部分更大的化学计量的硅。

28. 发明授权

US07057263B2 Semiconductor wafer assemblies comprising photoresist over silicon nitride materials 失效
公开(公告)号：US07057263B2
公开(公告)日：2006-06-06
申请号：US10734419
申请日：2003-12-11
申请人： John T. Moore , Scott Jeffrey DeBoer , Mark Fischer , J. Brett Rolfson , Annette L. Martin , Ardavan Niroomand
发明人： John T. Moore , Scott Jeffrey DeBoer , Mark Fischer , J. Brett Rolfson , Annette L. Martin , Ardavan Niroomand
IPC分类号： H01L23/58
CPC分类号： H01L21/0217 , G03F7/091 , H01L21/022 , H01L21/02271 , H01L21/02304 , H01L21/02362 , H01L21/0274 , H01L21/0332 , H01L21/31144 , H01L21/312 , H01L21/3185
摘要： In one aspect, the invention includes a semiconductor processing method, comprising: a) providing a silicon nitride material having a surface; b) forming a barrier layer over the surface of the material, the barrier layer comprising silicon and nitrogen; and c) forming a photoresist over and against the barrier layer. In another aspect, the invention includes a semiconductor processing method, comprising: a) providing a silicon nitride material having a surface; b) forming a barrier layer over the surface of the material, the barrier layer comprising silicon and nitrogen; c) forming a photoresist over and against the barrier layer; d) exposing the photoresist to a patterned beam of light to render at least one portion of the photoresist more soluble in a solvent than an other portion, the barrier layer being an antireflective surface that absorbs light passing through the photoresist; and e) exposing the photoresist to the solvent to remove the at least one portion while leaving the other portion over the barrier layer. In yet another aspect, the invention includes a semiconductor wafer assembly, comprising: a) a silicon nitride material, the material having a surface; b) a barrier layer over the surface of the material, the barrier layer comprising silicon and nitrogen; and c) a photoresist over and against the barrier layer.

29. 发明授权

US06593616B2 Buried bit line memory circuitry 有权
公开(公告)号：US06593616B2
公开(公告)日：2003-07-15
申请号：US10060894
申请日：2002-01-29
申请人： Yongjun Jeff Hu , Pai-Hung Pan , Scott Jeffrey DeBoer
发明人： Yongjun Jeff Hu , Pai-Hung Pan , Scott Jeffrey DeBoer
IPC分类号： H01K2972
CPC分类号： H01L27/10885 , H01L21/76838 , H01L21/76889 , H01L27/10814 , H01L27/10888
摘要： The invention includes buried bit line memory circuitry, methods of forming buried bit line memory circuitry, and semiconductor processing methods of forming conductive lines. In but one implementation, a semiconductor processing method of forming a conductive line includes forming a silicon comprising region over a substrate. A TiNx comprising layer is deposited over the silicon comprising region, where “x” is greater than 0 and less than 1. The TiNx comprising layer is annealed in a nitrogen containing atmosphere effective to transform at least an outermost portion of the TiNx layer over the silicon comprising region to TiN. After the annealing, an elemental tungsten comprising layer is deposited on the TiN and at least the elemental tungsten comprising layer, the TiN, and any remaining TiNx layer is patterned into conductive line. In one implementation, a method such as the above is utilized in the fabrication of buried bit line memory circuitry. In one implementation, the invention comprises buried bit line memory circuitry fabricated by the above and other methods.

30. 发明授权

US06440860B1 Semiconductor processing methods of transferring patterns from patterned photoresists to materials, and structures comprising silicon nitride 有权
公开(公告)号：US06440860B1
公开(公告)日：2002-08-27
申请号：US09488947
申请日：2000-01-18
申请人： Scott Jeffrey DeBoer , John T. Moore
发明人： Scott Jeffrey DeBoer , John T. Moore
IPC分类号： H01L21311
CPC分类号： H01L21/0332 , H01L21/28123 , H01L21/31144 , H01L21/3144 , H01L21/3145 , H01L21/3185 , H01L21/32139 , Y10S438/942 , Y10S438/944
摘要： The invention includes a semiconductor processing method. A first material comprising silicon and nitrogen is formed. A second material is formed over the first material, and the second material comprises silicon and less nitrogen, by atom percent, than the first material. An imagable material is formed on the second material, and patterned. A pattern is then transferred from the patterned imagable material to the first and second materials. The invention also includes a structure comprising a first layer of silicon nitride over a substrate, and a second layer on the first layer. The second layer comprises silicon and is free of nitrogen. The structure further comprises a third layer consisting essentially of imagable material on the second layer.

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