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21. 发明申请

US20100246309A1 SEMICONDUCTOR MEMORY 审中-公开
标题翻译：半导体存储器
公开(公告)号：US20100246309A1
公开(公告)日：2010-09-30
申请号：US12684998
申请日：2010-01-11
申请人： Yasushi SHIMONO , Kaoru Yoshida , Akira Ohta
发明人： Yasushi SHIMONO , Kaoru Yoshida , Akira Ohta
IPC分类号： G11C8/08
CPC分类号： G11C8/08 , G11C7/04 , G11C7/14 , G11C7/22 , G11C11/413
摘要： An SRAM module includes bit cells arranged within an SRAM array of N×M, and a replica SRAM cell array of a replica bit cell used for bit cell performance measurement, and can control the number of replica bit cells used for performance measurement. When the clock generator circuit generates an internal pulse upon receiving a clock, the clock generator circuit generates a leading edge of a pulse by a clock (clk), and generates a trailing edge thereof by a delay circuit including the delay of the replica bit cells. The internal pulse is used for controlling the activation time of the word lines for selecting the memory cell, and the timing of a bit line control circuit (a bit line precharger circuit, an address logic circuit, and a sense amplifier circuit).
摘要翻译： SRAM模块包括布置在N×M的SRAM阵列内的比特单元和用于比特单元性能测量的复制比特单元的复制SRAM单元阵列，并且可以控制用于性能测量的复制比特单元的数量。当时钟发生器电路在接收时钟时产生内部脉冲，时钟发生器电路通过时钟（clk）产生脉冲的前沿，并通过包括复制位单元的延迟的延迟电路产生其后沿。内部脉冲用于控制用于选择存储单元的字线的激活时间，以及位线控制电路（位线预充电器电路，地址逻辑电路和读出放大器电路）的定时。

22. 发明授权

US06833771B1 High efficiency amplifier with amplifier element, radio transmission device therewith and measuring device therefor 有权
标题翻译：具有放大器元件的高效放大器及其无线电传输装置及其测量装置
公开(公告)号：US06833771B1
公开(公告)日：2004-12-21
申请号：US09717215
申请日：2000-11-22
申请人： Akira Ohta , Akira Inoue
发明人： Akira Ohta , Akira Inoue
IPC分类号： H03H738
CPC分类号： H04B1/04 , H03H7/38
摘要： A low impedance high efficiency amplifier is connected to a low impedance isolator. The low impedance high efficiency amplifier includes a plurality of amplifiers and an output matching circuit having a harmonic processing circuit arranged between a fundamental wave regulator circuit/a final stage amplifier and the low impedance isolator.
摘要翻译：低阻抗高效率放大器连接到低阻抗隔离器。低阻抗高效率放大器包括多个放大器和具有布置在基波调节器电路/末级放大器与低阻抗隔离器之间的谐波处理电路的输出匹配电路。

23. 发明授权

US06563750B2 Semiconductor memory including a circuit for selecting redundant memory cells 有权
标题翻译：半导体存储器，包括用于选择冗余存储单元的电路
公开(公告)号：US06563750B2
公开(公告)日：2003-05-13
申请号：US10134521
申请日：2002-04-30
申请人： Hiroshi Otori , Hiroki Fujisawa , Minoru Ebihara , Seiji Narui , Masanori Isoda , Akira Ohta
发明人： Hiroshi Otori , Hiroki Fujisawa , Minoru Ebihara , Seiji Narui , Masanori Isoda , Akira Ohta
IPC分类号： G11C700
CPC分类号： G11C29/70 , G11C5/025 , G11C5/063
摘要： Relief units (UNITb) each having electrically programmable electric fuses for storing information according to the difference in threshold voltage, and an address comparator are disposed in a second area, and relief units (UNITa) each having laser fuses and an address comparator are disposed in a first area. Both areas are adjacent to each other along an address signal wiring for each comparator, and the address signal wiring is laid out linearly. Even if the electric fuses and the laser fuses are caused to coexist for relief address storage, the difference between by-chip occupied areas due to the difference between their configurations can be adjusted based on the size extending in the direction of the address signal wiring, and an increase in the by-chip occupied area can be restrained to the utmost from a layout viewpoint.
摘要翻译：每个具有用于根据阈值电压差存储信息的电可编程电保险丝和地址比较器的排气单元（UNITb）设置在第二区域中，并且每个具有激光熔丝和地址比较器的释放单元（UNITa）设置在第一个区域。两个区域沿着每个比较器的地址信号布线彼此相邻，并且地址信号布线线性布置。即使电保险丝和激光熔丝被共存用于释放地址存储，也可以基于在地址信号布线的方向上延伸的大小来调整由于它们的配置之间的差异造成的片外占用面积之间的差异，并且可以从布局的观点最大限度地抑制片上占用面积的增加。

24. 发明授权

US06177841B1 High frequency power amplifier 有权
标题翻译：高频功率放大器
公开(公告)号：US06177841B1
公开(公告)日：2001-01-23
申请号：US09258069
申请日：1999-02-26
申请人： Akira Ohta , Akira Inoue , Tetsuya Heima
发明人： Akira Ohta , Akira Inoue , Tetsuya Heima
IPC分类号： H03F3191
CPC分类号： H03F3/601 , H01L2224/48091 , H03F1/0205 , H03F1/565 , H01L2924/00014
摘要： A high frequency power amplifier with reduced power loss and improved power amplification efficiency has an output matching circuit providing an open circuit to a second harmonic and a short circuit to a third harmonic of a high frequency signal. This is accomplished by, for example, adjusting lengths of a drain bias line and a plurality of signal lines so that the phase of S parameter S11 (input reflection coefficient) to the second harmonic is from −80° to 140°, and the phase of S parameter S11 to the third harmonic is from 160° to 220°. The line length of each line in an input matching circuit is also adjusted so that the phase of S parameter S22 (output reflection coefficient) at the fundamental frequency is between +5° to −75°.
摘要翻译：具有降低的功率损耗和提高的功率放大效率的高频功率放大器具有输出匹配电路，其提供对二次谐波的开路和与高频信号的三次谐波的短路。这通过例如调整漏极偏置线和多条信号线的长度来实现，使得S参数S11（输入反射系数）相对于二次谐波的相位为-80°至140°，相位 S参数S11与三次谐波的关系为160°〜220°。也调整输入匹配电路中每条线的线路长度，使得基频下的S参数S22（输出反射系数）的相位在+ 5°至-75°之间。

25. 发明授权

US5880182A Water-reducing admixtures for cementitious compositions 失效
标题翻译：水泥组合物的减水剂
公开(公告)号：US5880182A
公开(公告)日：1999-03-09
申请号：US801309
申请日：1997-02-18
申请人： Yoshikazu Minomiya , Akira Ohta , Minoru Yaguchi
发明人： Yoshikazu Minomiya , Akira Ohta , Minoru Yaguchi
IPC分类号： C04B24/32 , C04B24/38 , C04B28/02 , C04B40/00 , C08K3/00 , C08L1/02 , C08L3/02 , C08L5/04
CPC分类号： C04B28/02 , C04B24/32 , C04B24/38 , C04B40/0039 , C04B2103/302
摘要： An admixture for decreasing the water demand of cementitious compositions such as concrete consists of(a) from 75-25% by weight of a water-reducing agent whose major component is a polycarboxylate; and(b) from 25-75% by weight of at least one saccharide component selected from hydrogenated saccharides and polyhydric alcohol adducts of saccharides.The saccaride component is preferably a hydrogenated polysaccharide with a molecular weight distribution as follows:(i) 70-30% by weight (on total weight of hydrogenated saccharides) have molecular weights in the range 180-300;(ii) 30-70% by weight have molecular weights of from 300 up to 4,000; and(iii) 30% by weight maximum have molecular weights of 4,000 and over.
摘要翻译：用于降低水泥质组合物如混凝土的用水需求的混合物包括（a）75-25重量％的主要成分是多羧酸盐的减水剂; 和（b）25-75重量％的选自氢化糖和糖的多元醇加合物的至少一种糖成分。优选地，该囊状成分是分子量分布如下的氢化多糖：（i）70-30重量％（相对于氢化糖的总重量），分子量范围为180-300; （ii）30-70重量％的分子量为300至4,000; 和（iii）最大30重量％的分子量为4000以上。

26. 发明授权

US5834960A Semiconductor device 失效
标题翻译：半导体器件
公开(公告)号：US5834960A
公开(公告)日：1998-11-10
申请号：US880767
申请日：1997-06-23
申请人： Tetsuya Heima , Norio Higashisaka , Akira Ohta
发明人： Tetsuya Heima , Norio Higashisaka , Akira Ohta
IPC分类号： H03H11/26 , H03K5/13
CPC分类号： H03K5/133 , H03H11/265 , H03K5/131
摘要： A semiconductor device includes an input terminal and an output terminal; a delay circuit including N (N=integer) unit delay circuits connected in series between the input terminal and the output terminal, earn unit delay circuit including first and second two-input NOR or NAND circuits connected in series, the second two-input NOR or NAND circuit being nearer to the output terminal than the first two-input NOR or NAND circuit, a first input of each first two-input NOR or NAND circuit being connected to the input terminal, and an output of each first two-input NOR or NAND circuit being connected to a first input of the second two-input NOR or NAND circuit of each unit delay circuit; and a control circuit outputting individual control signals, each control signal being applied to a respective second input of the second two-input NOR or NAND circuit included in each unit delay circuit, wherein delay time in signal transmission from the input terminal to the output terminal varies in response to the control signals. The number of elements per unit resolution is reduced, and variations in the delay time are reduced by the reduced element number so the linearity of the delay circuit is improved. Further, the layout is simplified as compared with the conventional delay circuit.
摘要翻译：半导体器件包括输入端子和输出端子; 包括在输入端子和输出端子之间串联连接的N（N =整数）个单位延迟电路的延迟电路，包括串联连接的第一和第二双输入NOR或NAND电路的单位延迟电路，第二双输入NOR 或NAND电路比第一双输入NOR或NAND电路更接近输出端，每个第一双输入NOR或NAND电路的第一输入连接到输入端，并且每个第一双输入NOR 或NAND电路连接到每个单位延迟电路的第二双输入NOR或NAND电路的第一输入; 以及输出各个控制信号的控制电路，每个控制信号被施加到包括在每个单位延迟电路中的第二双输入NOR或NAND电路的相应的第二输入，其中从输入端到输出端的信号传输的延迟时间响应于控制信号而变化。降低了每单位分辨率的元件数量，并且通过减少元件数量来减小延迟时间的变化，从而提高了延迟电路的线性度。此外，与传统的延迟电路相比，布局被简化。

27. 发明授权

US5716447A Flowability additive 失效
标题翻译：流动性添加剂
公开(公告)号：US5716447A
公开(公告)日：1998-02-10
申请号：US905284
申请日：1997-08-01
申请人： Shigemi Matsuo , Akira Ohta , Tadashi Tsuchitani , Minoru Ueda
发明人： Shigemi Matsuo , Akira Ohta , Tadashi Tsuchitani , Minoru Ueda
IPC分类号： E04G21/04 , C04B24/02 , C04B24/32 , C04B24/38 , C04B28/02 , C04B40/00 , C04B103/32 , F04B15/02
CPC分类号： C04B24/023 , C04B24/02 , C04B24/32 , C04B28/02 , C04B40/0039 , C04B2103/34 , C04B2111/00146
摘要： A cement pumpability-enhancing additive which comprises polyethylene glycol and diethylene glycol monobutyl ether and/or a derivative thereof, and optionally polysaccharide. The additive is especially useful for high-strength, high-flow concretes for use in construction.
摘要翻译：一种包含聚乙二醇和二甘醇单丁醚和/或其衍生物和任选的多糖的水泥可泵性增强添加剂。添加剂特别适用于建筑用高强度高流动性混凝土。

28. 发明授权

US5037289A Blow molding mold for forming hollow double-walled product and blow molding apparatus using such mold 失效
标题翻译：用于形成中空双壁产品的吹塑模具和使用这种模具的吹塑设备
公开(公告)号：US5037289A
公开(公告)日：1991-08-06
申请号：US438602
申请日：1989-11-17
申请人： Akira Ohta , Masanori Kikuchi
发明人： Akira Ohta , Masanori Kikuchi
IPC分类号： B29C49/00 , B29C49/04 , B29C49/42 , B29C49/48
CPC分类号： B29C49/48 , B29C49/0031 , B29C49/4242 , B29C2049/4805 , B29C2049/4807 , B29C49/04
摘要： A blow molding mold for making a hollow double-walled product includes male and female mold members movable toward and away from each other. The female mold member has a bottom and has first and second pairs of confronting peripheral wall segments, the wall segments of the second pair being pivotal relative to the bottom between open and closed positions. In one embodiment, the peripheral wall segments of the first pair are fixedly coupled to the bottom. In a different embodiment, the wall segments of the first pair are also pivotal between open and closed positions, and have expansion prevention walls which project outwardly from opposite sides thereof and which, when the wall segments of the first and second pairs are in their closed positions, project outwardly beyond the peripheral wall segments of the second pair.

29. 发明授权

US07310019B2 High frequency power amplifier 有权
标题翻译：高频功率放大器
公开(公告)号：US07310019B2
公开(公告)日：2007-12-18
申请号：US11398627
申请日：2006-04-06
申请人： Seiki Gotou , Akira Inoue , Akira Ohta
发明人： Seiki Gotou , Akira Inoue , Akira Ohta
IPC分类号： H03F3/68
CPC分类号： H03F3/193 , H01L2224/48091 , H01L2224/49175 , H01L2924/00014
摘要： A high frequency power amplifier includes: a multi-finger transistor including transistor cells electrically connected in parallel; an input side matching circuit connected to gate electrodes of the transistor cells; and resonant circuits, each resonant circuit being connected between a gate electrode of a respective one of the transistor cells and the input side matching circuit. The resonant circuits resonate at a second harmonic of the operational frequency of the transistor or at a frequency within a predetermined range centered at the second harmonic and act as a short circuit or exhibit low impedance as seen from the gate electrode.
摘要翻译：高频功率放大器包括：多指晶体管，其包括并联电连接的晶体管单元; 连接到晶体管单元的栅电极的输入侧匹配电路; 和谐振电路，每个谐振电路连接在晶体管单元的相应一个的栅电极和输入侧匹配电路之间。谐振电路以晶体管的工作频率的二次谐波或在以二次谐波为中心的预定范围内的频率谐振，并且作为短路或从栅极观察到的低阻抗。

30. 发明授权

US07061329B2 Semiconductor device having balanced circuit for use in high frequency band 有权
标题翻译：具有用于高频带的平衡电路的半导体器件
公开(公告)号：US07061329B2
公开(公告)日：2006-06-13
申请号：US10792856
申请日：2004-03-05
申请人： Akira Inoue , Akira Ohta , Seiki Goto
发明人： Akira Inoue , Akira Ohta , Seiki Goto
IPC分类号： H03F3/191
CPC分类号： H01L23/66 , H01L24/45 , H01L24/48 , H01L24/49 , H01L2223/6644 , H01L2224/451 , H01L2224/48091 , H01L2224/49111 , H01L2224/49175 , H01L2924/00014 , H01L2924/01005 , H01L2924/01006 , H01L2924/01014 , H01L2924/0105 , H01L2924/01068 , H01L2924/01072 , H01L2924/01075 , H01L2924/014 , H01L2924/10253 , H01L2924/1305 , H01L2924/1306 , H01L2924/14 , H01L2924/181 , H01L2924/19011 , H01L2924/19041 , H01L2924/19042 , H01L2924/19043 , H01L2924/30105 , H01L2924/30107 , H01L2924/3011 , H01L2924/30111 , H03F1/565 , H03F3/602 , H01L2924/00 , H01L2224/05599
摘要： A semiconductor chip for amplification is connected between input-side and output-side matching circuits, and each of matching circuits includes balanced circuits which receive signals different in phase by 180 degrees, divided from an input signal. The balanced circuits are connected at a virtual grounding point, which is used as a grounding point sensitive to RF characteristics in an IPD. Thus, a semiconductor device can be free from influence of variations of grounding wires and can be reduced in size, weight, and cost.
摘要翻译：用于放大的半导体芯片连接在输入侧和输出侧匹配电路之间，并且每个匹配电路包括从输入信号中分离出相位不同180度的信号的平衡电路。平衡电路连接在虚拟接地点，用作IPD中对RF特性敏感的接地点。因此，半导体器件可以不受接地线的变化的影响，并且可以减小尺寸，重量和成本。

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