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    • 8. 发明授权
    • Logic gate circuit and digital integrated circuit
    • 逻辑门电路和数字集成电路
    • US5656956A
    • 1997-08-12
    • US590526
    • 1996-01-24
    • Akira OhtaNorio Higashisaka
    • Akira OhtaNorio Higashisaka
    • H03K17/687H03K19/0952H03K19/094
    • H03K19/0952
    • A logic gate circuit includes a resistor, a current limiting circuit, a switching transistor, and a load transistor, the source of load transistor being connected to the drain of the switching transistor, the gate of the switching transistor being connected to an input terminal, the resistor being connected between the source of and the gate of the load transistor, and the current limiting circuit being connected between the gate of the load transistor and the source of the switching transistor. By using this logic gate circuit in the low speed operating section of an LSI, the dissipation current and the chip area of the LSI can be reduced even when the gate width and the threshold voltage of the load FET are the same as those in the high speed operating section.
    • 逻辑门电路包括电阻器,限流电路,开关晶体管和负载晶体管,负载晶体管源极连接到开关晶体管的漏极,开关晶体管的栅极连接到输入端子, 电阻器连接在负载晶体管的源极和栅极之间,并且限流电路连接在负载晶体管的栅极和开关晶体管的源极之间。 通过在LSI的低速工作部中使用该逻辑门电路,即使当负载FET的栅极宽度和阈值电压与高电平相同时,LSI的耗散电流和芯片面积也可以减小 高速运行部分。