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    • 21. 发明申请
    • Semiconductor device having IGBT and diode
    • 具有IGBT和二极管的半导体器件
    • US20070200138A1
    • 2007-08-30
    • US11709272
    • 2007-02-22
    • Yoshihiko OzekiNorihito TokuraYukio Tsuzuki
    • Yoshihiko OzekiNorihito TokuraYukio Tsuzuki
    • H01L29/74
    • H01L27/0611H01L29/7395H01L29/8611
    • A semiconductor device includes: a semiconductor substrate; a IGBT region including a first region on a first surface of the substrate and providing a channel-forming region and a second region on a second surface of the substrate and providing a collector; a diode region including a third region on the first surface and providing an anode or a cathode and a fourth region on the second surface and providing the anode or the cathode; a periphery region including a fifth region on the first surface and a sixth region on the second surface. The first, third and fifth regions are commonly and electrically coupled, and the second, fourth and sixth regions are commonly and electrically coupled with one another.
    • 半导体器件包括:半导体衬底; IGBT区域,包括在所述基板的第一表面上的第一区域,并且在所述基板的第二表面上提供沟道形成区域和第二区域,并提供集电体; 二极管区域,包括在第一表面上的第三区域,并在第二表面上提供阳极或阴极和第四区域,并提供阳极或阴极; 外围区域,包括在第一表面上的第五区域和第二表面上的第六区域。 第一,第三和第五区域通常和电耦合,并且第二,第四和第六区域彼此通常电耦合。
    • 24. 发明授权
    • Semiconductor device with protective means against overheating
    • 具有防止过热的保护装置的半导体器件
    • US4760434A
    • 1988-07-26
    • US935718
    • 1986-11-28
    • Yukio TsuzukiMasami Yamaoka
    • Yukio TsuzukiMasami Yamaoka
    • H01L23/58H01L21/822H01L23/34H01L27/02H01L27/04H01L29/78G05F1/40H01L23/56H01L31/00
    • H01L29/7803H01L23/34H01L27/0248H01L29/7804H01L29/7808H01L2924/0002
    • A semiconductor substrate has a power region and a control region. The control region is located in the center portion of the substrate, and the power region surrounds the control region and is separated therefrom. A vertical type, MOS transistor, i.e., an active semiconductor element, is formed on the power region. An insulation film is formed on part of the control region. A polycrystalline silicon diode, which functions as a heat-sensitive element, is formed on the insulation film. A control section comprising a lateral type, MOS transistor is also formed on the control region. The lateral type, MOS transistor is connected to receive a signal form the polycrystalline silicon diode. Further, a polycrystalline silicon resistor, which determines a circuit constant, is formed on the insulation film. The MOS transistor protects the active semiconductor element in response to a signal supplied from the heat-sensitive element showing that the temperature of the semiconductor substrate has risen above a predetermined value. For example, the active semiconductor element may be disabled until the detected temperature drops below a predetermined value.
    • 半导体衬底具有功率区域和控制区域。 控制区域位于基板的中心部分,功率区域围绕控制区域并与之分离。 在功率区域上形成垂直型MOS晶体管即有源半导体元件。 在控制区域的一部分上形成绝缘膜。 在绝缘膜上形成用作热敏元件的多晶硅二极管。 在控制区域上还形成有包括横向型MOS晶体管的控制部。 横向型MOS晶体管被连接以从多晶硅二极管接收信号。 此外,在绝缘膜上形成确定电路常数的多晶硅电阻器。 MOS晶体管响应于来自热敏元件的信号保护有源半导体元件,表明半导体衬底的温度已经升高到预定值以上。 例如,可以禁用活性半导体元件,直到检测到的温度下降到预定值以下。
    • 26. 发明授权
    • Semiconductor device
    • 半导体器件
    • US09099387B2
    • 2015-08-04
    • US13171115
    • 2011-06-28
    • Yukio TsuzukiMakoto Asai
    • Yukio TsuzukiMakoto Asai
    • H01L29/66H01L29/06H01L21/265H01L29/10H01L29/417H01L29/739H01L29/78
    • H01L29/7813H01L21/26586H01L29/0619H01L29/0696H01L29/1095H01L29/41766H01L29/66727H01L29/66734H01L29/7397H01L29/7806
    • A semiconductor device includes an n-conductive type semiconductor substrate having a main side and a rear side, a p-conductive type layer arranged over the main side of the substrate, a main side n-conductive type region arranged in the p-conductive type layer, a rear side n-conductive type layer arranged over the rear side of the substrate, a first trench which reaches the substrate and penetrates the main side n-conductive type region and the p-conductive type layer, a second trench which reaches an inside of the p-conductive type layer, a second electrode layer, which is embedded in the second trench and connected to the p-conductive type layer. Hereby, the semiconductor device, in which the recovery property of a diode cell can be improved without damaging the property of a MOS transistor cell or an IGBT cell and the surge withstand property does not deteriorate, can be obtained.
    • 半导体器件包括具有主侧和后侧的n导电型半导体衬底,布置在衬底的主侧上的p导电型层,以p导电型布置的主侧n导电型区域 层,布置在基板的后侧上的后侧n导电型层,到达基板并穿透主侧n导电型区域和p导电型层的第一沟槽,到达基板的第二沟槽 在p导电型层的内部,嵌入在第二沟槽中并连接到p导电型层的第二电极层。 因此,可以获得其中二极管电池的恢复特性可以在不损害MOS晶体管单元或IGBT单元的性能而不损坏浪涌耐受性的情况下得到的半导体器件。
    • 30. 发明授权
    • Insulated gate semiconductor device
    • 绝缘栅半导体器件
    • US08614483B2
    • 2013-12-24
    • US13313050
    • 2011-12-07
    • Hiromitsu TanabeYukio TsuzukiKenji KounoTomofusa Shiga
    • Hiromitsu TanabeYukio TsuzukiKenji KounoTomofusa Shiga
    • H01L29/66
    • H01L29/7397H01L29/0696H01L29/1095H01L29/36H01L29/4236H01L29/66348
    • An insulated gate semiconductor device includes a first conductivity-type semiconductor substrate, a second conductivity-type base layer on a first surface side of the substrate, a trench dividing the base layer into channel and floating layers, and a first conductivity-type emitter region that is formed in the channel layer and in contact with the trench. The semiconductor device includes a gate insulation layer in the trench, a gate electrode on the insulation layer, an emitter electrode electrically connected to the emitter region and the floating layer, a second conductivity-type collector layer in the substrate, and a collector electrode on the collector layer. The floating layer has a lower impurity concentration than the channel layer. The floating layer has a first conductivity-type hole stopper layer located at a predetermined depth from the first surface of the substrate and at least partially spaced from the insulation layer.
    • 绝缘栅半导体器件包括第一导电型半导体衬底,在衬底的第一表面侧上的第二导电型基极层,将基极层分为沟道和浮动层的沟槽,以及第一导电型发射极区域 其形成在沟道层中并与沟槽接触。 半导体器件包括沟槽中的栅极绝缘层,绝缘层上的栅极电极,电连接到发射极区域和浮置层的发射极电极,衬底中的第二导电型集电极层,以及集电极电极 集电极层。 浮置层的杂质浓度低于沟道层。 浮动层具有位于距离基板的第一表面预定深度并且至少部分地与绝缘层间隔开的第一导电型孔阻挡层。