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11. 发明申请

US20050113951A1 Method for designing a manufacturing process, method for providing manufacturing process design and technology computer-aided design system 失效
标题翻译：设计制造过程的方法，提供制造工艺设计和技术计算机辅助设计系统的方法
公开(公告)号：US20050113951A1
公开(公告)日：2005-05-26
申请号：US10933439
申请日：2004-09-03
申请人： Tatsuo Akiyama , Masahiro Abe , Kenji Hirakawa , Shigeru Komatsu
发明人： Tatsuo Akiyama , Masahiro Abe , Kenji Hirakawa , Shigeru Komatsu
IPC分类号： H01L21/02 , G06F17/50 , G06F19/00
CPC分类号： G06F17/5068
摘要： A method for designing a manufacturing process of an electronic device includes calibrating a technology computer-aided design system by fitting simulation parameters of manufacturing process and electrical characteristic simulations, using first feature of commercial manufacturing process of first electronic device manufactured by first manufacturing facilities, and first electrical characteristic of the first electronic device; acquiring second feature of trial manufacturing process of second electronic device manufactured by second manufacturing facilities, and second electrical characteristic of the second electronic device; calculating simulation electrical characteristic of the second electronic device by substituting the second feature to the manufacturing process simulation corresponding to the trial manufacturing process; comparing the second electrical characteristic with the simulation electrical characteristic; and creating design specification of commercial manufacturing process of the second manufacturing facilities based on difference between the second electrical characteristic and the simulation electrical characteristic.
摘要翻译：一种设计电子设备的制造方法的方法，包括使用第一制造设备制造的第一电子设备的商业制造工艺的第一特征，通过拟合制造工艺和电气特性模拟的仿真参数来校准技术计算机辅助设计系统，以及第一电子装置的第一电特性; 获得由第二制造设备制造的第二电子装置的试制制造过程的第二特征和第二电子装置的第二电特性; 通过将第二特征代入对应于试制造过程的制造过程模拟来计算第二电子装置的模拟电特性; 将第二电特性与仿真电特性进行比较; 并基于第二电特性和仿真电特性之间的差异，创建第二制造设备的商业制造过程的设计规范。

12. 发明申请

US20050095774A1 Semiconductor device manufacturing system and method for manufacturing semiconductor devices 失效
标题翻译：半导体器件制造系统和半导体器件的制造方法
公开(公告)号：US20050095774A1
公开(公告)日：2005-05-05
申请号：US10935430
申请日：2004-09-08
申请人： Yukihiro Ushiku , Akira Ogawa , Hidenori Kakinuma , Shunji Shuto , Masahiro Abe , Tatsuo Akiyama , Shigeru Komatsu
发明人： Yukihiro Ushiku , Akira Ogawa , Hidenori Kakinuma , Shunji Shuto , Masahiro Abe , Tatsuo Akiyama , Shigeru Komatsu
IPC分类号： H01L21/3065 , G05B19/418 , H01L21/00 , H01L21/02 , H01L21/31 , H01L21/316 , H01L21/331
CPC分类号： G05B19/4184 , G05B19/41885 , G05B2219/32368 , G05B2219/45031 , Y02P90/14 , Y02P90/22 , Y02P90/26 , Y02P90/265
摘要： The present invention provides a solution for interleaving data frames, in a semiconductor device manufacturing system in which the processing apparatus for conducting a process on any one of a semiconductor substrate and a thin film on a surface thereof; a self-diagnostic system for diagnosing a state of the processing apparatus; and a parameter fitting apparatus for maintaining a parameter of the self-diagnostic system when an inspection result of the semiconductor substrate having undergone the process has been determined to be correct, and for changing the parameter of the self-diagnostic system when the inspection result has been determined to be incorrect.
摘要翻译：本发明提供了一种在半导体器件制造系统中交错数据帧的解决方案，其中用于对其表面上的半导体衬底和薄膜中的任一个进行处理的处理装置; 用于诊断处理装置的状态的自诊断系统; 以及参数拟合装置，当已经确定了所述处理的半导体衬底的检查结果被确定为正确时，用于维持所述自我诊断系统的参数，并且当所述检查结果具有所述参数时，改变所述自我诊断系统的参数被确定为不正确。

13. 发明授权

US5006070A Dental implant with y-shaped body 失效
标题翻译：牙科植入物与y形身体
公开(公告)号：US5006070A
公开(公告)日：1991-04-09
申请号：US404113
申请日：1989-09-07
申请人： Shigeru Komatsu
发明人： Shigeru Komatsu
IPC分类号： A61C8/00
CPC分类号： A61C8/0019 , A61C8/0018 , A61C8/005
摘要： A dental implant comprises a Y-shaped body including three planar legs which have respective openings defined centrally in sides thereof and extend radially as viewed from above, and a head supported on the body and adapted to be capped by an artificial tooth. The three legs which extend radially outwardly allow the body to be firmly anchored in an alveolar bone of the patient. After the body has been embedded in a groove defined in the alveolar bone, the alveolar bone grows and is joined together through the openings in the legs. As a result, the embedded body becomes more and more secure with time.
摘要翻译：牙科植入物包括Y形体，其包括三个平面腿，其具有在其侧面中心地限定并且从上方径向延伸的相应开口，以及支撑在身体上并适于被人造牙齿覆盖的头部。径向向外延伸的三条腿允许身体牢固地锚定在患者的牙槽骨中。在身体已经嵌入限定在牙槽骨中的凹槽中之后，牙槽骨通过腿部的开口生长并连接在一起。因此，随着时间的推移，嵌入式机身变得越来越安全。

14. 发明授权

US4516147A Semiconductor device having a substrate covered with a high impurity concentration first polycrystalline layer and then a lower impurity concentration second polycrystalline layer 失效
标题翻译：半导体器件具有被高杂质浓度的第一多晶层覆盖的衬底，然后覆盖较低杂质浓度的第二多晶层
公开(公告)号：US4516147A
公开(公告)日：1985-05-07
申请号：US582857
申请日：1984-02-24
申请人： Shigeru Komatsu , Hiroshi Inoue
发明人： Shigeru Komatsu , Hiroshi Inoue
IPC分类号： H01L29/43 , H01L21/225 , H01L21/28 , H01L21/285 , H01L21/331 , H01L29/73 , H01L29/04 , H01L23/48 , H01L29/34
CPC分类号： H01L21/2257 , H01L21/28525
摘要： A semiconductor device has a semiconductor substrate of a first conductivity type, and a diffused region of a second conductivity type. A first insulation film is formed on the substrate, having an opening exposing the surface of the diffused region. First and second polycrystalline layers doped with impurities associated with the second conductivity type are disposed in the opening, and the concentration of the impurities of the first polycrystalline layer is higher than that of the second polycrystalline layer. A metal electrode is formed on the second polycrystalline layer.
摘要翻译：半导体器件具有第一导电类型的半导体衬底和第二导电类型的扩散区域。第一绝缘膜形成在基板上，具有露出扩散区域的表面的开口。掺杂有与第二导电类型相关的杂质的第一和第二多晶层设置在开口中，并且第一多晶层的杂质浓度高于第二多晶层的杂质浓度。金属电极形成在第二多晶层上。

15. 发明授权

US4438556A Method of forming doped polycrystalline silicon pattern by selective implantation and plasma etching of undoped regions 失效
标题翻译：通过选择性注入和未掺杂区域的等离子体蚀刻形成掺杂多晶硅图案的方法
公开(公告)号：US4438556A
公开(公告)日：1984-03-27
申请号：US332973
申请日：1981-12-21
申请人： Shigeru Komatsu , Michio Nakamura
发明人： Shigeru Komatsu , Michio Nakamura
IPC分类号： H01L21/3213 , H01L21/3215 , H01L21/302 , C23F1/02 , H01L21/225
CPC分类号： H01L21/32137 , H01L21/32155 , Y10S438/924
摘要： A process of forming a polycrystalline silicon pattern which is used for a semiconductor device, wherein the degree of side etching is low and the obtained pattern is of high precision. Firstly, a polycrystalline silicon layer is deposited on a semiconductor substrate or on an insulating film which is formed on a semiconductor substrate. An impurity is selectively ion-implanted with high concentration into the region in the layer which is to remain as a polycrystalline silicon pattern. Finally, whole of the polycrystalline silicon layer into which the impurity is thus selectively ion-implanted is plasma-etched to etch off the areas into which the impurity is not ion-implanted.
摘要翻译：形成用于半导体器件的多晶硅图案的工艺，其中侧蚀刻度低，并且所获得的图案具有高精度。首先，在半导体基板上或形成在半导体基板上的绝缘膜上沉积多晶硅层。选择性地将杂质离子注入到要保留为多晶硅图案的层中的区域中。最后，等离子体刻蚀了杂质从而选择性地离子注入的整个多晶硅层，以蚀刻离子注入杂质的区域。

16. 发明授权

US4423434A Semiconductor device having two or more semiconductor elements with paired characteristics regularly arranged in a semiconductor substrate 失效
标题翻译：具有两个以上具有成对特性的半导体元件的半导体器件规则地布置在半导体衬底中
公开(公告)号：US4423434A
公开(公告)日：1983-12-27
申请号：US212503
申请日：1980-12-03
申请人： Shigeru Komatsu
发明人： Shigeru Komatsu
IPC分类号： H01L21/822 , H01L21/331 , H01L23/28 , H01L27/02 , H01L27/04 , H01L27/20 , H01L29/73 , H01L29/04 , H01L29/84
CPC分类号： H01L27/20 , H01L27/0207 , H01L2924/0002 , Y10S257/925
摘要： Semiconductor elements are arranged in a semiconductor substrate substantially equidistantly of a dicing line and oriented in the same direction. A region where the semiconductor elements are regularly arranged is the one where, when the semiconductor substrate and a semiconductor element are integrally formed with a sealing member, a characteristic of the semiconductor element abruptly changes, ranging from the center line of the dicing line to a point having stress of 90% of the stress developed in the center area of the semiconductor substrate or ranging from the center line of the dicing line to a point distanced from the center line by a distance 1.8 times the thickness of the semiconductor substrate or less. The semiconductor substrate with semiconductor elements arranged therein is integrally formed by a sealing member.
摘要翻译：半导体元件被布置在基本上等距于切割线并且沿相同方向定向的半导体衬底中。半导体元件规则排列的区域是当半导体衬底和半导体元件与密封构件一体形成时，半导体元件的特性突然变化，从切割线的中心线到具有在半导体衬底的中心区域产生的应力的90％的应力或从切割线的中心线到远离中心线的距离为半导体衬底的厚度的1.8倍以下的应力的点。其中布置有半导体元件的半导体衬底由密封构件一体地形成。

17. 发明授权

US4388621A Drive circuit for character and graphic display device 失效
标题翻译：字符和图形显示装置的驱动电路
公开(公告)号：US4388621A
公开(公告)日：1983-06-14
申请号：US158263
申请日：1980-06-10
申请人： Shigeru Komatsu , Shigeru Hirahata , Tsuguji Tachiuchi
发明人： Shigeru Komatsu , Shigeru Hirahata , Tsuguji Tachiuchi
IPC分类号： G09G5/24 , G06F3/153 , G09G1/16 , G09G5/00 , G09G5/397 , G09G5/399 , G09G1/00
CPC分类号： G09G5/001
摘要： In a .phi..sub.2 cycle steal mode, a clock signal is selected such that a time period during which a RAM is connected to a timing signal generator for display is extended and a time period during which the RAM is connected to a CPU is shortened accordingly, without changing an overall period. This clock signal is used to actuate a switching circuit for the RAM while a clock signal having unmodified duty ratio is applied to the CPU, a ROM and external circuits so that a display data readout period from the RAM is extended without affecting the CPU clock frequency and the operation of other circuits. During this readout period, a plurality of display address signals are applied to the RAM from the timing signal generator and a plurality of data derived from the RAM are sequentially loaded in a register which is then read out at a desired timing to enable the display of a plurality of characters in one CPU clock period.
摘要翻译：在phi 2循环盗取模式中，选择时钟信号，使得连接到用于显示的定时信号发生器的RAM的时间段被延长，并且相应地缩短RAM连接到CPU的时间段，而不改变整个时期。该时钟信号用于激活用于RAM的开关电路，而具有未修改占空比的时钟信号被施加到CPU，ROM和外部电路，使得来自RAM的显示数据读出周期不会影响CPU时钟频率和其他电路的操作。在该读出期间，多个显示地址信号从定时信号发生器施加到RAM，并且从RAM导出的多个数据顺序地加载到寄存器中，然后在期望的定时读出寄存器，以使得能够显示一个CPU时钟周期内的多个字符。

18. 发明授权

US4119167A Steering drive axle assembly 失效
标题翻译：转向传动轴总成
公开(公告)号：US4119167A
公开(公告)日：1978-10-10
申请号：US766755
申请日：1977-02-08
申请人： Shinichi Yamada , Shigeru Komatsu
发明人： Shinichi Yamada , Shigeru Komatsu
IPC分类号： B62D7/18 , B60K17/30 , F16D3/00
CPC分类号： B60K17/306 , F16D3/224 , F16D2003/22316 , F16D2003/22326 , Y10S464/906
摘要： A steering drive axle assembly which comprises a steering knuckle having an integral reduced portion rigid with one end of an axle housing, a socket member having its reduced portion secured to internal extremity of a wheel mounting spindle and being supported by a pair of vertically spaced king pins which are respectively mounted to an upper wall and a lower wall of the steering knuckle so that it can move about the king pins. The steering drive axle assembly further comprises a shell housing which includes a substantially semi-spherical portion and a cylindrical extension which extends into rigid engagement with the reduced portion of the steering knuckle, a constant velocity universal joint which connects a drive and a driven shafts together being disposed within the shell housing, and a sealing member being provided in sealing contact against a smoothly spherical outer periphery of the shell housing.
摘要翻译：一种转向传动轴组件，其包括转向节，该转向节具有与轴壳体的一端刚性的整体减小部分，所述转动传动轴组件具有固定到车轮安装主轴的内部末端并由一对垂直间隔的主体销分别安装在转向节的上壁和下壁上，使得其可绕主销移动。转向传动轴组件还包括壳体壳体，其包括基本上半球形的部分和延伸成与转向节的减小部分刚性接合的圆柱形延伸部，将驱动轴和从动轴连接在一起的等速万向接头设置在所述外壳壳体内，并且密封构件设置成与所述外壳壳体的平滑的球形外周密封接触。

19. 发明授权

US4036780A Catalyst for the preparation of maleic anhydride 失效
标题翻译：用于制备马来酸酐的催化剂
公开(公告)号：US4036780A
公开(公告)日：1977-07-19
申请号：US636746
申请日：1975-12-01
申请人： Hideo Suzuki , Takahisa Sato , Tatsuo Kubota , Shigemi Osaka , Shigeru Komatsu
发明人： Hideo Suzuki , Takahisa Sato , Tatsuo Kubota , Shigemi Osaka , Shigeru Komatsu
IPC分类号： C07D307/60 , B01J23/16 , B01J23/28 , B01J27/16 , B01J27/198 , B01J27/199 , C07B61/00 , C07C51/255 , C07C51/31 , B01J27/14
CPC分类号： C07C51/313 , B01J23/002 , B01J23/28 , B01J27/199 , B01J2523/00
摘要： A catalyst for the preparation of maleic anhydride by vapor phase catalytic oxidation of benzene with a molecular oxygen containing gas comprising a porous inert support of an alkali metal content, calculated as oxide, of at most 0.3 % by weight and supported thereon a catalytic substance of a constituent composition comprising (a) 1 mole of vanadium pentoxide, (b) 0.3 to 1.2 moles of molybdenum trioxide, (c) 0.005 to 0.05 moles of phosphorus pentoxide, (d) 0.03 to 0.2 moles of sodium oxide and (d) 0 to 0.05 moles of potassium oxide.
摘要翻译：一种用于通过气相催化氧化苯与含分子氧的气体制备马来酸酐的催化剂，其包含以氧化物计为至多0.3重量％的碱金属含量的多孔惰性载体，其上载有催化物质（a）1摩尔五氧化二钒，（b）0.3〜1.2摩尔三氧化钼，（c）0.005〜0.05摩尔五氧化二磷，（d）0.03〜0.2摩尔氧化钠和（d）0 至0.05摩尔的氧化钾。

20. 发明申请

US20070147609A1 Information processing method and information processing apparatus 审中-公开
标题翻译：信息处理方法和信息处理装置
公开(公告)号：US20070147609A1
公开(公告)日：2007-06-28
申请号：US11517554
申请日：2006-09-08
申请人： Takaharu Noguchi , Akira Shibata , Shigeru Komatsu , Atsushi Ogawa , Goro Umeda
发明人： Takaharu Noguchi , Akira Shibata , Shigeru Komatsu , Atsushi Ogawa , Goro Umeda
IPC分类号： H04N7/167
CPC分类号： H04N7/1675 , H04N21/23439 , H04N21/2347 , H04N21/2541 , H04N21/25841 , H04N21/26613 , H04N21/4405 , H04N21/4623 , H04N21/835
摘要： An apparatus and a method for processing video and audio information therein, comprising: an encrypting circuit for coping with a copyright management system, which adopts an encrypting method differing from each other depending on a region where it is used; and an input portion, through which information of the region of use is inputted, wherein an encrypting method of said encrypting circuit is selected, upon basis of said information of the region of use, which is obtained from said input portion, through which information of the region of use is inputted, thereby processing the video and audio information.
摘要翻译：一种用于处理视频和音频信息的装置和方法，包括：加密电路，用于处理版权管理系统，该版权管理系统采用根据其使用的区域彼此不同的加密方法; 以及输入部分，通过所述输入部分输入所述使用区域的信息，其中，根据从所述输入部分获得的所述使用区域的所述信息，选择所述加密电路的加密方法，通过所述信息输入使用区域，从而处理视频和音频信息。

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