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1. 发明申请

US20050113951A1 Method for designing a manufacturing process, method for providing manufacturing process design and technology computer-aided design system 失效
标题翻译：设计制造过程的方法，提供制造工艺设计和技术计算机辅助设计系统的方法
公开(公告)号：US20050113951A1
公开(公告)日：2005-05-26
申请号：US10933439
申请日：2004-09-03
申请人： Tatsuo Akiyama , Masahiro Abe , Kenji Hirakawa , Shigeru Komatsu
发明人： Tatsuo Akiyama , Masahiro Abe , Kenji Hirakawa , Shigeru Komatsu
IPC分类号： H01L21/02 , G06F17/50 , G06F19/00
CPC分类号： G06F17/5068
摘要： A method for designing a manufacturing process of an electronic device includes calibrating a technology computer-aided design system by fitting simulation parameters of manufacturing process and electrical characteristic simulations, using first feature of commercial manufacturing process of first electronic device manufactured by first manufacturing facilities, and first electrical characteristic of the first electronic device; acquiring second feature of trial manufacturing process of second electronic device manufactured by second manufacturing facilities, and second electrical characteristic of the second electronic device; calculating simulation electrical characteristic of the second electronic device by substituting the second feature to the manufacturing process simulation corresponding to the trial manufacturing process; comparing the second electrical characteristic with the simulation electrical characteristic; and creating design specification of commercial manufacturing process of the second manufacturing facilities based on difference between the second electrical characteristic and the simulation electrical characteristic.
摘要翻译：一种设计电子设备的制造方法的方法，包括使用第一制造设备制造的第一电子设备的商业制造工艺的第一特征，通过拟合制造工艺和电气特性模拟的仿真参数来校准技术计算机辅助设计系统，以及第一电子装置的第一电特性; 获得由第二制造设备制造的第二电子装置的试制制造过程的第二特征和第二电子装置的第二电特性; 通过将第二特征代入对应于试制造过程的制造过程模拟来计算第二电子装置的模拟电特性; 将第二电特性与仿真电特性进行比较; 并基于第二电特性和仿真电特性之间的差异，创建第二制造设备的商业制造过程的设计规范。

2. 发明授权

US07272460B2 Method for designing a manufacturing process, method for providing manufacturing process design and technology computer-aided design system 失效
标题翻译：设计制造过程的方法，提供制造工艺设计和技术计算机辅助设计系统的方法
公开(公告)号：US07272460B2
公开(公告)日：2007-09-18
申请号：US10933439
申请日：2004-09-03
申请人： Tatsuo Akiyama , Masahiro Abe , Kenji Hirakawa , Shigeru Komatsu
发明人： Tatsuo Akiyama , Masahiro Abe , Kenji Hirakawa , Shigeru Komatsu
IPC分类号： G06F19/00 , G06F17/00
CPC分类号： G06F17/5068
摘要： A method for designing a manufacturing process of an electronic device includes calibrating a technology computer-aided design system by fitting simulation parameters of manufacturing process and electrical characteristic simulations, using first feature of commercial manufacturing process of first electronic device manufactured by first manufacturing facilities, and first electrical characteristic of the first electronic device; acquiring second feature of trial manufacturing process of second electronic device manufactured by second manufacturing facilities, and second electrical characteristic of the second electronic device; calculating simulation electrical characteristic of the second electronic device by substituting the second feature to the manufacturing process simulation corresponding to the trial manufacturing process; comparing the second electrical characteristic with the simulation electrical characteristic; and creating design specification of commercial manufacturing process of the second manufacturing facilities based on difference between the second electrical characteristic and the simulation electrical characteristic.
摘要翻译：一种设计电子设备的制造方法的方法，包括使用第一制造设备制造的第一电子设备的商业制造工艺的第一特征，通过拟合制造工艺和电气特性模拟的仿真参数来校准技术计算机辅助设计系统，以及第一电子装置的第一电特性; 获得由第二制造设备制造的第二电子装置的试制制造过程的第二特征和第二电子装置的第二电特性; 通过将第二特征代入对应于试制造过程的制造过程模拟来计算第二电子装置的模拟电特性; 将第二电特性与仿真电特性进行比较; 并基于第二电特性和仿真电特性之间的差异，创建第二制造设备的商业制造过程的设计规范。

3. 发明申请

US20050095774A1 Semiconductor device manufacturing system and method for manufacturing semiconductor devices 失效
标题翻译：半导体器件制造系统和半导体器件的制造方法
公开(公告)号：US20050095774A1
公开(公告)日：2005-05-05
申请号：US10935430
申请日：2004-09-08
申请人： Yukihiro Ushiku , Akira Ogawa , Hidenori Kakinuma , Shunji Shuto , Masahiro Abe , Tatsuo Akiyama , Shigeru Komatsu
发明人： Yukihiro Ushiku , Akira Ogawa , Hidenori Kakinuma , Shunji Shuto , Masahiro Abe , Tatsuo Akiyama , Shigeru Komatsu
IPC分类号： H01L21/3065 , G05B19/418 , H01L21/00 , H01L21/02 , H01L21/31 , H01L21/316 , H01L21/331
CPC分类号： G05B19/4184 , G05B19/41885 , G05B2219/32368 , G05B2219/45031 , Y02P90/14 , Y02P90/22 , Y02P90/26 , Y02P90/265
摘要： The present invention provides a solution for interleaving data frames, in a semiconductor device manufacturing system in which the processing apparatus for conducting a process on any one of a semiconductor substrate and a thin film on a surface thereof; a self-diagnostic system for diagnosing a state of the processing apparatus; and a parameter fitting apparatus for maintaining a parameter of the self-diagnostic system when an inspection result of the semiconductor substrate having undergone the process has been determined to be correct, and for changing the parameter of the self-diagnostic system when the inspection result has been determined to be incorrect.
摘要翻译：本发明提供了一种在半导体器件制造系统中交错数据帧的解决方案，其中用于对其表面上的半导体衬底和薄膜中的任一个进行处理的处理装置; 用于诊断处理装置的状态的自诊断系统; 以及参数拟合装置，当已经确定了所述处理的半导体衬底的检查结果被确定为正确时，用于维持所述自我诊断系统的参数，并且当所述检查结果具有所述参数时，改变所述自我诊断系统的参数被确定为不正确。

4. 发明授权

US07702413B2 Semiconductor device manufacturing system and method for manufacturing semiconductor devices including calculating oxide film thickness using real time simulator 失效
标题翻译：半导体器件制造系统以及使用实时仿真器计算氧化膜厚度的半导体器件的制造方法
公开(公告)号：US07702413B2
公开(公告)日：2010-04-20
申请号：US10935430
申请日：2004-09-08
申请人： Yukihiro Ushiku , Akira Ogawa , Hidenori Kakinuma , Shunji Shuto , Masahiro Abe , Tatsuo Akiyama , Shigeru Komatsu
发明人： Yukihiro Ushiku , Akira Ogawa , Hidenori Kakinuma , Shunji Shuto , Masahiro Abe , Tatsuo Akiyama , Shigeru Komatsu
IPC分类号： G06F19/00
CPC分类号： G05B19/4184 , G05B19/41885 , G05B2219/32368 , G05B2219/45031 , Y02P90/14 , Y02P90/22 , Y02P90/26 , Y02P90/265
摘要： The present invention provides a solution for interleaving data frames, in a semiconductor device manufacturing system in which the processing apparatus for conducting a process on any one of a semiconductor substrate and a thin film on a surface thereof; a self-diagnostic system for diagnosing a state of the processing apparatus; and a parameter fitting apparatus for maintaining a parameter of the self-diagnostic system when an inspection result of the semiconductor substrate having undergone the process has been determined to be correct, and for changing the parameter of the self-diagnostic system when the inspection result has been determined to be incorrect.
摘要翻译：本发明提供了一种在半导体器件制造系统中交错数据帧的解决方案，其中用于对其表面上的半导体衬底和薄膜中的任一个进行处理的处理装置; 用于诊断处理装置的状态的自诊断系统; 以及参数拟合装置，当已经确定了所述处理的半导体衬底的检查结果被确定为正确时，用于维持所述自我诊断系统的参数，并且当所述检查结果具有所述参数时，改变所述自我诊断系统的参数被确定为不正确。

5. 发明授权

US07623937B2 Semiconductor device manufacturing system and method for manufacturing semiconductor devices including calculating oxide film thickness using real time simulator 有权
公开(公告)号：US07623937B2
公开(公告)日：2009-11-24
申请号：US10935430
申请日：2004-09-08
申请人： Yukihiro Ushiku , Akira Ogawa , Hidenori Kakinuma , Shunji Shuto , Masahiro Abe , Tatsuo Akiyama , Shigeru Komatsu
发明人： Yukihiro Ushiku , Akira Ogawa , Hidenori Kakinuma , Shunji Shuto , Masahiro Abe , Tatsuo Akiyama , Shigeru Komatsu
IPC分类号： G06F19/00
摘要： The present invention provides a solution for interleaving data frames, in a semiconductor device manufacturing system in which the processing apparatus for conducting a process on any one of a semiconductor substrate and a thin film on a surface thereof; a self-diagnostic system for diagnosing a state of the processing apparatus; and a parameter fitting apparatus for maintaining a parameter of the self-diagnostic system when an inspection result of the semiconductor substrate having undergone the process has been determined to be correct, and for changing the parameter of the self-diagnostic system when the inspection result has been determined to be incorrect.

6. 发明申请

US20080218628A1 Decoder Device And Receiver Using The Same 有权
标题翻译：解码器和接收器使用它
公开(公告)号：US20080218628A1
公开(公告)日：2008-09-11
申请号：US12120472
申请日：2008-05-14
申请人： Masuo Oku , Hironori Komi , Keisuke Inata , Ryosuke Toya , Kenji Katsumata , Shigeru Komatsu , Shinobu Torikoshi , Takaaki Matono , Fumihito Tanaka , Masaaki Hisanaga
发明人： Masuo Oku , Hironori Komi , Keisuke Inata , Ryosuke Toya , Kenji Katsumata , Shigeru Komatsu , Shinobu Torikoshi , Takaaki Matono , Fumihito Tanaka , Masaaki Hisanaga
IPC分类号： H04N7/01
CPC分类号： H04N5/775 , H04N5/4401 , H04N5/445 , H04N5/45 , H04N5/46 , H04N5/85 , H04N7/012 , H04N21/42638 , H04N21/42653 , H04N21/4305 , H04N21/4316 , H04N21/440218
摘要： A decoder apparatus which includes a de-multiplexer, which is configured to divide motion picture data from a transport stream, a video decoder, which is configured to decode the divided motion picture data, and a first re-formatter on-screen unit, which is configured to display motion picture data and at least one of first and second graphic data on a screen. The first re-formatter on-screen unit converts motion picture data of a first aspect ratio, which is decoded by the video decoder, and first graphics data, which is produced by applying information relating to a caption corresponding to the motion picture data, into a second aspect ratio, when outputting the motion picture data of the first aspect ratio after conversion into the second aspect ratio, without converting the aspect ratio of second graphic data, which is produced by applying information relating to a program guide.
摘要翻译：一种解码器装置，包括解复用器，其被配置为从传输流分割运动图像数据，被配置为对分割的运动图像数据进行解码的视频解码器和第一重新格式化器屏幕单元，其中被配置为在屏幕上显示运动图像数据和第一和第二图形数据中的至少一个。第一重新格式化器屏幕单元将由视频解码器解码的第一宽高比的运动图像数据和通过将与运动图像数据相对应的字幕相关的信息应用的信息产生的第一图形数据转换成第二宽高比，当在转换成第二宽高比之后输出第一宽高比的运动图像数据而不转换通过应用与节目指南相关的信息而产生的第二图形数据的纵横比。

7. 发明授权

US06710817B2 Decoder device and receiver using the same 有权
标题翻译：解码器和接收机使用相同
公开(公告)号：US06710817B2
公开(公告)日：2004-03-23
申请号：US09984508
申请日：2001-10-30
申请人： Masuo Oku , Hironori Komi , Keisuke Inata , Ryosuke Toya , Kenji Katsumata , Shigeru Komatsu , Shinobu Torikoshi , Takaaki Matono , Fumihito Tanaka , Masaaki Hisanaga
发明人： Masuo Oku , Hironori Komi , Keisuke Inata , Ryosuke Toya , Kenji Katsumata , Shigeru Komatsu , Shinobu Torikoshi , Takaaki Matono , Fumihito Tanaka , Masaaki Hisanaga
IPC分类号： H04N550
CPC分类号： H04N5/775 , H04N5/4401 , H04N5/445 , H04N5/45 , H04N5/46 , H04N5/85 , H04N7/012 , H04N21/42638 , H04N21/42653 , H04N21/4305 , H04N21/4316 , H04N21/440218
摘要： An object of the present application is to provide the display of motion picture data used in both of analog and digital broadcasts with high picture quality and a common user interface. The above object can be achieved by providing a plurality of picture format converters, a plurality of OSD circuits, and means for storing motion picture data used in an analog broadcast in a common memory.
摘要翻译：本申请的目的是提供在具有高图像质量的模拟和数字广播两者中使用的运动图像数据的显示和公共用户界面。上述目的可以通过提供多个图像格式转换器，多个OSD电路和用于存储在公共存储器中的模拟广播中使用的运动图像数据的装置来实现。

8. 发明授权

US5179642A Image synthesizing apparatus for superposing a second image on a first image 失效
标题翻译：用于将第二图像叠加在第一图像上的图像合成装置
公开(公告)号：US5179642A
公开(公告)日：1993-01-12
申请号：US856827
申请日：1992-03-25
申请人： Shigeru Komatsu
发明人： Shigeru Komatsu
IPC分类号： G06T15/40
CPC分类号： G06T15/40
摘要： An image synthesizing apparatus for synthesizing first and second images with each other which includes a first display memory for storing a first image data constituting a first image, and a display memory control device for comparing a second image data for constituting a second image with a predetermined image data to thereby judge whether the second image data is to be written into the first display memory or not.
摘要翻译：一种用于合成第一和第二图像的图像合成装置，包括：第一显示存储器，用于存储构成第一图像的第一图像数据;以及显示存储器控制装置，用于将用于构成第二图像的第二图像数据与预定的从而判断第二图像数据是否被写入第一显示存储器。

9. 发明授权

US4980765A Frame buffer memory for display 失效
标题翻译：帧缓冲存储器用于显示
公开(公告)号：US4980765A
公开(公告)日：1990-12-25
申请号：US464214
申请日：1990-01-12
申请人： Yoshimichi Kudo , Shigeru Komatsu
发明人： Yoshimichi Kudo , Shigeru Komatsu
IPC分类号： G09G5/00 , G06F12/02 , G06T1/60 , G09G5/14 , G09G5/34 , G09G5/39 , G09G5/397
CPC分类号： G09G5/14 , G09G5/397 , G09G2360/126
摘要： A frame buffer memory capable of storing video data for plural frames of pictures with memory areas irrelevant to the display being reduced to a minimum, which video data consist of a number of pixels unequal to a power of "2" in the vertical and horizontal directions, respectively. The frame buffer memory is realized by using multi-port video RAMs and includes a plurality of regions for display and auxiliary regions. The regions for display includes at least first and second display regions which partially overlap each other. The auxiliary regions store the video data contained in the overlapping portion (overlapping region) of the first and second display regions, the video data stored in the auxiliary region being transferred to the overlapping region as occasion requires.
摘要翻译：能够将与图像无关的存储区域的多帧图像的视频数据的帧缓冲存储器减少到最小，哪个视频数据由不同于垂直和水平方向上的“2”的功率的像素数组成，分别。帧缓冲存储器是通过使用多端口视频RAM来实现的，并且包括用于显示和辅助区域的多个区域。用于显示的区域至少包括彼此部分重叠的至少第一和第二显示区域。辅助区域存储包含在第一和第二显示区域的重叠部分（重叠区域）中的视频数据，根据需要，存储在辅助区域中的视频数据被传送到重叠区域。

10. 发明授权

US4692190A Trimming of metal interconnection layer by selective migration of metal atoms by energy beams 失效
标题翻译：通过能量束选择性迁移金属原子来修剪金属互连层
公开(公告)号：US4692190A
公开(公告)日：1987-09-08
申请号：US813039
申请日：1985-12-24
申请人： Shigeru Komatsu
发明人： Shigeru Komatsu
IPC分类号： H01L21/3205 , H01L21/268 , H01L21/82 , H01L23/525 , H01C7/00 , B23K26/00
CPC分类号： H01L23/525 , H01L21/268 , H01L2924/0002 , Y10S148/093 , Y10S148/14
摘要： Semiconductor body is prepared and a film is formed on the semiconductor body, followed by forming an interconnection layer of aluminum alloy on the insulating film. A silicon oxide film is formed on the interconnection layer, followed by removing that portion of the silicon oxide film which is situated on a predetermined trimming area of the interconnection layer. A silicon nitride film is formed on the whole surface of the resultant structure. An energy beam is directed onto the predetermined trimming area of the interconnection layer, causing the interconnection layer to be locally heated to 400.degree. to 600.degree. C. whereby atoms in the interconnection layer migrate to permit the interconnection layer to be trimmed.
摘要翻译：制备半导体体，在半导体体上形成膜，然后在绝缘膜上形成铝合金的配线层。在互连层上形成氧化硅膜，然后除去位于互连层的预定修整区域上的部分氧化硅膜。在所得结构的整个表面上形成氮化硅膜。能量束被引导到互连层的预定修整区域上，使得互连层局部加热至400℃至600℃，由此互连层中的原子迁移以允许互连层被修整。

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