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    • 3. 发明专利
    • Manufacturing method of wiring board
    • 接线板制造方法
    • JP2005136361A
    • 2005-05-26
    • JP2003385740
    • 2003-11-14
    • North:Kk株式会社ノース
    • IIJIMA ASAOHYODO KIYOSHIHIRAIDE SHIGEO
    • H05K3/40H05K3/26H05K3/38H05K3/46
    • PROBLEM TO BE SOLVED: To prevent the connectability of a metal bump 12 with a metal layer 14 or a wiring layer 14d connected on the top face 12a from being deteriorated by accumulating a residue made of an epoxy resin 4 of stage B in a polishing groove (polishing scratch) generated on the top face 12a of the metal bump 12 in a step for polishing the epoxy resin 4 formed on the surface of the metal bump 12 formation side of a metal plate 2 until the top face 12a of the metal bump 12 is exposed, to polish also by wet polishing, and to carry out a smooth and highly efficient polish. SOLUTION: The manufacturing method has a step for forming an epoxy resin 4 of stage B having a thickness covering metal bumps 12 entirely on the surface of a metal plate 2 where the metal bumps 12 for interlayer connection are formed on one surface; and a step for pressurizing and heating the epoxy resin 4 so as to be stage C and a stage for wet polishing the front surface of an interlayer insulating film 4 made of an epoxy resin become stage C until the top face 12a of each metal bump 12 is exposed. COPYRIGHT: (C)2005,JPO&NCIPI
    • 要解决的问题为了防止金属凸块12与连接在顶面12a上的金属层14或布线层14d的连接性不会因为将B层的环氧树脂4堆积而残留在 在金属板2的金属凸块12形成侧的表面上形成的环氧树脂4的研磨工序中,在金属凸块12的顶面12a上产生的抛光槽(抛光刮痕) 金属凸块12被暴露,也可以通过湿式抛光进行抛光,并且进行平滑和高效的抛光。 解决方案:该制造方法具有在金属板2的表面上整体形成覆盖金属凸块12的层的环氧树脂4的步骤,金属板2的表面上形成有用于层间连接的金属凸块12, 并且将环氧树脂4加压和加热到阶段C,并且用于湿式研磨由环氧树脂制成的层间绝缘膜4的前表面的阶段变成阶段C直到每个金属凸块12的顶面12a 被暴露。 版权所有(C)2005,JPO&NCIPI
    • 7. 发明专利
    • Base material for multilayer printed circuit board, double-sided wiring board and these manufacturing method
    • 多层印刷电路板,双面接线板和这些制造方法的基材
    • JP2005183880A
    • 2005-07-07
    • JP2003426392
    • 2003-12-24
    • Fujikura LtdNorth:Kk株式会社ノース株式会社フジクラ
    • NAKAJIMA KANAKOINATANI YASUSHIUNAMI YOSHIHARUIIJIMA ASAOOSAWA KENJI
    • H05K1/11H05K1/03H05K3/40H05K3/46
    • PROBLEM TO BE SOLVED: To surely expose the top of a bump without grinding and polishing the surface of an insulating adhesive layer, and to obtain high electrical reliability regarding inter-layer conduction by the bump. SOLUTION: The insulating adhesive layer (17) from which the tops (12A) of bumps are exposed or projected is formed by coating regions excepting the tops of the bumps with an insulating resin material (16) having adhesive properties on the bump forming surface of a metallic layer (11), in which the bumps (12) for the inter-layer conduction are formed on one surface by a base material (10) for a multilayer printed circuit board. A double-sided wiring board (20) has the bumps (12) for the inter-layer conduction on one surface, and a first metallic layer (11) to which the insulating adhesive layer (17) from which the tops (12A) of the bumps are exposed or projected is formed by coating the regions excepting the tops of the bumps with the insulating resin material (16) having adhesive properties. The double-sided wiring board (20) further has a second metallic layer (18) laminated by the insulating adhesive layer (17) and inter-layer conducted with the first metallic layer (11) by the bumps (12). COPYRIGHT: (C)2005,JPO&NCIPI
    • 要解决的问题:为了确保在不研磨抛光绝缘粘合剂层的表面的情况下暴露凸块的顶部,并且通过凸块获得关于层间传导的高电可靠性。 解决方案:通过在凸块上具有粘合性的绝缘树脂材料(16)之外,通过涂覆凸起顶部之外的区域,形成凸起的顶部(12A)从其露出或突出的绝缘粘合剂层(17) 通过用于多层印刷电路板的基材(10)在一个表面上形成用于层间传导的凸块(12)的金属层(11)的形成表面。 双面布线板(20)具有用于一个表面上的层间导通的凸块(12)和第一金属层(11),绝缘粘合剂层(17)的顶部(12A) 通过用具有粘合性的绝缘树脂材料(16)涂覆凸起顶部以外的区域来形成凸块。 双面布线板(20)还具有通过绝缘粘合剂层(17)层压的第二金属层(18),并且通过凸块(12)与第一金属层(11)导电的第二金属层。 版权所有(C)2005,JPO&NCIPI
    • 9. 发明专利
    • Electronic apparatus and method of manufacturing the same
    • 电子装置及其制造方法
    • JP2005026452A
    • 2005-01-27
    • JP2003190259
    • 2003-07-02
    • North:Kk株式会社ノース
    • IIJIMA ASAOFUKUOKA YOSHITAKA
    • H01L23/12
    • H01L2924/0002H01L2924/00
    • PROBLEM TO BE SOLVED: To provide the electronic apparatus of a flexible multilayer wiring board structure in which a semiconductor chip is embedded within the multilayer wiring board.
      SOLUTION: At the surface in the side to form a wiring film 11 of a first metal base plate including a bump 13 for terminal at the rear surface, a flexible semiconductor chip 20 in the thickness of 10 to 50 μm or less is connected by the flip-chip connection method so that the electrode thereof is connected to the wiring film 11. In a second metal base plate 56, a bump 52 for interlayer connection and a chip accommodating space 42 are provided in the same surface, and a wiring film is formed to the opposite side. The base plate 56 is laminated to a first metal base plate 16 to connect the top surface of the bump 52 for interlayer connection to the wiring film 11, and an interlayer insulating film 40 is provided between the bumps 52.
      COPYRIGHT: (C)2005,JPO&NCIPI
    • 要解决的问题:为了提供其中半导体芯片嵌入在多层布线板内的柔性多层布线板结构的电子设备。 解决方案:在侧面的表面形成第一金属基板的布线膜11,第一金属基板包括在后表面上用于端子的凸块13,厚度为10至50μm或更小的柔性半导体芯片20是 通过倒装芯片连接方法连接,使得其电极连接到布线膜11.在第二金属基板56中,在相同的表面上设置有用于层间连接的凸块52和芯片容纳空间42,并且 布线膜形成在相对侧。 基板56被层压到第一金属基板16上,以将层间连接用凸块52的上表面与布线膜11连接起来,并且在凸块52之间设置层间绝缘膜40.权利要求 C)2005,JPO&NCIPI
    • 10. 发明专利
    • Multilayer wiring board and its manufacturing method
    • 多层接线板及其制造方法
    • JP2005026445A
    • 2005-01-27
    • JP2003190162
    • 2003-07-02
    • North:Kk株式会社ノース
    • IIJIMA ASAOFUKUOKA YOSHITAKA
    • H05K3/46
    • H01L2924/0002H01L2924/00
    • PROBLEM TO BE SOLVED: To provide a multilayer wiring board which builds in a passive element having a high packing density with a built-in passive element and to provide a method for manufacturing the same.
      SOLUTION: The multilayer wiring board includes a plurality of wiring films 11, 21, 31 and 41 interlayer insulated by a plurality of interlayer insulating layers 50, 60 and 70 and interlayer connected by interlayer connecting conductive layer penetrating the interlayer insulating films 50, 70, such as, for example, by bumps 12, 42. The passive elements 11L, 22R and 22C formed to connect a terminal to the wiring layer via element films 21, 23, 31 and 32 of the same material as or another material from the wiring film 11 are formed in an interior of any of the interlayer insulating layers 50, 60 and 70.
      COPYRIGHT: (C)2005,JPO&NCIPI
    • 要解决的问题:提供一种利用内置无源元件构建具有高填充密度的无源元件的多层布线板,并提供其制造方法。 解决方案:多层布线板包括由多个层间绝缘层50,60和70绝缘的多个布线膜11,21,31和41以及穿过层间绝缘膜50的层间连接导电层的层间连接 70,例如通过凸块12,42形成。无源元件11L,22R和22C被形成为通过与其它材料相同的材料的元件膜21,23,31和32将端子连接到布线层 从布线膜11形成在任何层间绝缘层50,60和70的内部。版权所有(C)2005,JPO&NCIPI