专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

1. 发明申请

WO2013163691A1 PULSE GENERATING CIRCUIT FOR AUDIO-FREQUENCY AMPLIFIERS AND REGULATED POWER SUPPLIES 审中-公开
标题翻译：用于音频放大器和调节电源的脉冲发生电路
公开(公告)号：WO2013163691A1
公开(公告)日：2013-11-07
申请号：PCT/AU2013/000452
申请日：2013-04-30
申请人： INDICE PTY LTD
发明人： HAMOND, James
IPC分类号： H03F3/38 , H03K7/00 , H03F3/217
CPC分类号： H03K5/01 , H02M1/08 , H03F3/2173 , H03K5/02 , H03K7/08 , H03K9/08
摘要： A circuit for generating a series of pulses in response to a first signal, the circuit comprising: a lossy integrator which receives a second signal as its input; and a comparator which: receives the output of the lossy integrator at one of its inputs; and receives the first signal at the other of its inputs. This circuit can be incorporated into, for example, audio-frequency amplifiers and regulated power supplies.
摘要翻译：一种用于响应于第一信号产生一系列脉冲的电路，所述电路包括：有损收集器，其接收第二信号作为其输入; 以及比较器，其在其输入之一处接收有损积分器的输出; 并在其另一个输入端接收第一个信号。该电路可以结合到例如音频放大器和稳压电源中。

2. 发明申请

WO2013089743A1 LOW POWER TRANSMITTER FOR GENERATING PULSE MODULATED SIGNALS 审中-公开
标题翻译：用于产生脉冲调制信号的低功率发射器
公开(公告)号：WO2013089743A1
公开(公告)日：2013-06-20
申请号：PCT/US2011/065175
申请日：2011-12-15
申请人： INTEL CORPORATION , YANG, Wei-Lien
发明人： YANG, Wei-Lien
IPC分类号： H04L27/00 , H03K7/00 , H04L25/03
CPC分类号： H04L25/4902 , H03K7/08
摘要： Described herein are an apparatus, system, and method for generating pulse modulated (PWM) signals. The apparatus (e.g., input-output transmitter) comprises: an edge detector to detect one of a rising or falling edges of a clock signal; a counter to count up or down in response to detecting one of the rising or falling edges of the clock signal, the counter to generate a select signal; and a control unit to receive a data signal for transmission to a receiver and to generate a PWM signal as output according to a value of the select signal and the data signal, wherein the receiver and the transmitter are a Mobile Industry Processor Interface (MIPI®) M-PHY(SM) receiver and transmitter.
摘要翻译：这里描述了用于产生脉冲调制（PWM）信号的装置，系统和方法。该装置（例如，输入 - 输出发射机）包括：边缘检测器，用于检测时钟信号的上升沿或下降沿之一; 响应于检测到所述时钟信号的上升沿或下降沿之一响应于向上或向下计数的计数器，所述计数器产生选择信号; 以及控制单元，用于接收用于传输到接收机的数据信号并根据选择信号和数据信号的值产生作为输出的PWM信号，其中接收机和发射机是移动工业处理器接口（MIPI ）M-PHY（SM）接收机和发射机。

3. 发明申请

WO2011091741A1 一种扩展控制器PWM分辨率的方法及装置审中-公开
公开(公告)号：WO2011091741A1
公开(公告)日：2011-08-04
申请号：PCT/CN2011/070525
申请日：2011-01-24
申请人：深圳市京泉华电子有限公司 , 刘建飞 , 谢春华 , 张立品 , 孔徐生 , 鞠万金 , 汪兆华 , 李战功 , 窦晓月
发明人：刘建飞 , 谢春华 , 张立品 , 孔徐生 , 鞠万金 , 汪兆华 , 李战功 , 窦晓月
IPC分类号： H03K7/00
CPC分类号： H03M1/822 , H03K7/08

4. 发明申请

WO2011017802A1 HIGH VOLTAGE SQUARE WAVE AND SPWM WAVE GENERATOR 审中-公开
标题翻译：高压方波和SPWM波发生器
公开(公告)号：WO2011017802A1
公开(公告)日：2011-02-17
申请号：PCT/CA2010/001233
申请日：2010-08-11
申请人： JAYARAM, Sheshakamal, H. , YU, Ya, Tong
发明人： JAYARAM, Sheshakamal, H. , YU, Ya, Tong
IPC分类号： G01R31/34 , H03K4/02 , H03K7/00 , G01R31/00 , A23L3/32
CPC分类号： G01R31/343 , G01R31/1227 , G01R31/14 , H03K7/08
摘要： A high voltage wave generator circuit is provided for generating high voltage square-waves and SPWM-waves. The circuit comprises a plurality of stages, each stage including (a) an input connected to a DC source, (b) a first switch, (c) a second switch, (d) an energy storage device and (e) a wave shaping resistor, wherein the first switch charges the energy storage device and the second switch discharges the energy storage device. Each of the stages is operable to generate waveforms and the stages are connected in cascade, and the stages are configured such that (i) the first switches and the second switches of the plurality of stages are operable to switch substantially at the same time, and (ii) when the first switches are "ON" the second switches are "OFF" and vice versa. The circuit is configured such that by charging the circuit and sequentially switching all of the first switches and then the second switches substantially at the same time, the stages are operable to cumulatively generate as an output high voltage square-waves and SPWM-waves. An insulation test apparatus based on the wave generator is also provided. Also, a novel method for testing rotating machine insulation is provided.
摘要翻译：提供高电压波发生器电路用于产生高电压方波和SPWM波。电路包括多个级，每级包括（a）连接到DC源的输入，（b）第一开关，（c）第二开关，（d）能量存储装置和（e）波形整形电阻器，其中所述第一开关对所述能量存储装置充电，并且所述第二开关放电所述能量存储装置。每个级可操作以产生波形并且级联级联，并且级被配置为使得（i）多级中的第一开关和第二开关可操作以基本上同时切换，并且（ii）当第一开关为“ON”时，第二开关为“OFF”，反之亦然。电路被配置为使得通过对电路充电并且基本上同时顺序地切换所有第一开关，然后顺序地切换第二开关，该级可操作地累积地产生作为输出高电压方波和SPWM波。还提供了一种基于波发生器的绝缘测试装置。此外，还提供了一种用于测试旋转机器绝缘的新颖方法。

5. 发明申请

WO2008008949A2 SIGNAL INTEGRITY MEASUREMENT SYSTEMS AND METHODS USING A PREDOMINANTLY DIGITAL TIME-BASE GENERATOR 审中-公开
标题翻译：信号完整性测量系统和方法使用数字时基发生器
公开(公告)号：WO2008008949A2
公开(公告)日：2008-01-17
申请号：PCT/US2007073454
申请日：2007-07-13
申请人： DFT MICROSYSTEMS INC , HAFED MOHAMED M
发明人： HAFED MOHAMED M
IPC分类号： G01M99/00 , G01R25/00 , G01R29/26 , G06F15/04 , H03K7/00 , H03K17/18
CPC分类号： G01R31/2882 , G01R31/31709 , G01R31/31725 , G01R31/31727
摘要： Signal-integrity measurement systems and methods utilizing unique time-base generation techniques for controlling the sampling of one or more signals under test. A time-base generator made in accordance with the present disclosure includes a phase filter and modulation circuitry that generates a rapidly varying phase signal as a function of the output of a sigma-delta modulator. The phase filter filters unwanted high-frequency phase components from the rapidly varying phase signal. The filtered signal is used to clock one or more samplers so as to create sampling instances of the signal(s) under test. The sampling instances are then analyze using any one or more of a variety of techniques suited to the type of signal(s) under test.
摘要翻译：信号完整性测量系统和方法利用独特的时基生成技术来控制一个或多个被测信号的采样。根据本公开制造的时基发生器包括相位滤波器和调制电路，该相位滤波器和调制电路根据Σ-Δ调制器的输出生成快速变化的相位信号。相位滤波器从快速变化的相位信号中滤除不需要的高频相位分量。经过滤波的信号用于对一个或多个采样器进行计时，以创建被测信号的采样实例。然后使用适合于被测信号类型的各种技术中的任何一种或多种来分析采样实例。

6. 发明申请

WO2007028236A2 SYSTEM AND METHOD FOR DELIVERY OF VIDEO, CONTENT ON DEMAND AND IP PACKETS 审中-公开
标题翻译：用于传送视频，内容和IP分组的系统和方法
公开(公告)号：WO2007028236A2
公开(公告)日：2007-03-15
申请号：PCT/CA2006/001455
申请日：2006-09-05
申请人： LIQUID XSTREAM SYSTEMS INC. , DUFRESNE, Benoît , KISOVEC
发明人： DUFRESNE, Benoît , KISOVEC
IPC分类号： H03K5/01 , H03K5/08 , H03K7/00 , H04L27/00 , H04N7/173 , H04N7/24
CPC分类号： H04L25/03834 , H04L27/362 , H04N7/17318 , H04N21/2383 , H04N21/47202
摘要： The present application describes a method and filter for shaping a series of pulses spaced in time for subsequent transmission in a communications system, each of the pulses having a magnitude comprising the steps of providing a generic shaped pulse, for each pulse in the series, generating a shaped pulse by scaling the generic shaped pulse by an amount proportional to the magnitude, wherein at least a portion of each generated pulse overlaps in time with at least a portion of at least one subsequent generated pulse, and combining the overlapping portions of the generated pulses. The present application also describes a method and apparatus for modulating an input signal comprised of an ordered series of samples separated by a substantially constant period T comprising the steps of providing a carrier signal, the carrier signal comprised of a series of samples separated by a substantially constant period T, wherein one of the carrier samples corresponds to each of the input signal samples, selecting a plurality of N successive samples from the series of input signal samples, the series of samples having an input order, for each of the N selected samples in parallel, multiplying the selected sample by the corresponding carrier sample and recombining the N multiplied samples while maintaining the input order.
摘要翻译：本申请描述了一种用于对一系列脉冲进行整形以在随后的通信系统中传输的脉冲的方法和滤波器，每个脉冲具有幅度，包括为串联中的每个脉冲提供通用成形脉冲的步骤，通过将通用成形脉冲缩放与幅度成比例的量的成形脉冲，其中每个产生的脉冲的至少一部分在时间上与至少一个后续产生的脉冲的至少一部分重叠，并且将所产生的脉冲的重叠部分脉冲。本申请还描述了一种用于调制包括由基本上恒定的周期T分离的有序序列的输入信号的方法和装置，包括以下步骤：提供载波信号，载波信号由一系列采样分离的样本恒定周期T，其中载波样本中的一个对应于每个输入信号样本，从所述一系列输入信号样本中选择多个N个连续样本，对于所选N个样本中的每一个，所述一系列样本具有输入阶数并行地，将所选择的样本乘以相应的载波样本，并重新组合N个相乘的样本，同时保持输入顺序。

7. 发明申请

WO2003028217A2 VORRICHTUNG UND VERFAHREN ZUM ERZEUGEN PULSWEITENMODULIERTER AUSGANGSSIGNALE 审中-公开
标题翻译：用于产生脉冲宽度调制的输出信号的装置和方法
公开(公告)号：WO2003028217A2
公开(公告)日：2003-04-03
申请号：PCT/DE2002/001867
申请日：2002-05-23
申请人： ROBERT BOSCH GMBH , DALAKURAS, Lambros , SCHUMPELT, Michael , FLOREANI, Bruno
发明人： DALAKURAS, Lambros , SCHUMPELT, Michael , FLOREANI, Bruno
IPC分类号： H03K7/00
CPC分类号： H03K7/08
摘要： Es werden eine Vorrichtung und ein Verfahren zum Erzeugen pulsweitenmodulierter Ausgangssignale vorgeschlagen, mit Erfassungsmitteln (10, 12), die zumindest eine Eingangsgrösse als Mass für jeweils eine mittels eines korrespondierenden pulsweitenmodulierten Ausgangssignals (Yi) zu erzeugende Pulsweite erfassen, mit Sortiermitteln (10, 12) zum Sortieren nach der Grösse der Pulsweite (Pi), Steuermittel (10, 12) zum Setzen des mit der erfassten Eingangsgrösse korrespondierenden Ausgangssignals (Yi), zum Starten eines Timers (16) mit der kleinstens, von Null verschiedenen Pulsweite (P1), und zum Rücksetzen des mit der kleinstens Pulsweite korrespondierenden Ausgangssignals (Y1) bei Ablauf des Timer (16).
摘要翻译：
有提出了用检测装置（10，12）生成脉冲宽度调制输出信号的设备和方法，所述至少一个输入变量和OUML; SSE作为导航用途r的测量各自是由一个相应的脉冲宽度调制输出信号的装置（易）捕获生成脉冲宽度，用分选装置（10，12），用于GR＆oUML后排序; SSE为与检测到的输入变量＆oUML设置的脉冲宽度（PI），控制装置（10，12）; SSE相应的输出信号（一），用于开始计时器（16）的非零脉冲宽度（P1），并在定时器（16）到期时复位对应于最小脉冲宽度的输出信号（Y1）。

8. 发明申请

WO2013138990A1 PWM DUTY CYCLE SYNTHESIZER AND METHOD WITH ADJUSTABLE CORNER FREQUENCY 审中-公开
标题翻译： PWM占空比合成器和可调角度频率的方法
公开(公告)号：WO2013138990A1
公开(公告)日：2013-09-26
申请号：PCT/CN2012/072582
申请日：2012-03-20
申请人： TEXAS INSTRUMENTS INCORPORATED , TEXAS INSTRUMENTS JAPAN LIMITED , ZHANG, Ruochen , LU, Yisong , TAN, Pauy Guan
发明人： ZHANG, Ruochen , LU, Yisong , TAN, Pauy Guan
IPC分类号： H03K7/00
CPC分类号： H03K7/08
摘要： A PWM circuit for generating a PWM output signal (PWM OUT ) having an output frequency (f PWM ) in response to a PWM input signal (PWM IN ) having an input frequency (f PWMIN ) includes an algebraic summing circuit (3) for comparing the PWM output signal to the PWM input signal and producing an increment signal (INC) if a value of the PWM input signal exceeds a corresponding value of the PWM output signal and producing a decrement signal (DEC) if a value of the PWM input signal is less than a corresponding value of the PWM output signal. An integrator (5) produces a duty cycle signal (Duty[7:0]) representative of a duty cycle of the PWM input signal by producing an increase in value of the duty cycle signal in response to each increment signal produced by the algebraic summing circuit and by producing a decrease in value of the duty cycle signal in response to each decrement signal. A PWM generator circuit (9) produces the PWM output signal in response to the duty cycle signal to cause the duty cycle of the PWM output signal to precisely equal the duty cycle of the PWM input signal with no loss of duty cycle resolution.
摘要翻译：用于响应具有输入频率（fPWMIN）的PWM输入信号（PWMIN）产生具有输出频率（fPWM）的PWM输出信号（PWMOUT）的PWM电路包括用于将PWM输出信号（fPWM）进行比较的代数求和电路（3）如果PWM输入信号的值小于PWM输入信号的值，则PWM输入信号的值超过PWM输出信号的对应值并产生递减信号（DEC），并产生增量信号（INC），并产生递增信号（INC）相应的PWM输出信号值。积分器（5）通过响应由代数求和产生的每个增量信号产生占空比信号的值的增加来产生表示PWM输入信号的占空比的占空比信号（Duty [7：0]）并且通过响应于每个减量信号产生占空比信号的值的减小。 PWM发生器电路（9）响应于占空比信号产生PWM输出信号，以使PWM输出信号的占空比精确地等于PWM输入信号的占空比，同时不损耗占空比分辨率。

9. 发明申请

WO2009034146A1 INCREASING OF PWM RESOLUTION BY MODULATION 审中-公开
标题翻译：通过调制增加PWM分辨率
公开(公告)号：WO2009034146A1
公开(公告)日：2009-03-19
申请号：PCT/EP2008/062098
申请日：2008-09-11
申请人： TEXAS INSTRUMENTS DEUTSCHLAND GMBH , DIEWALD, Horst, Georg
发明人： DIEWALD, Horst, Georg
IPC分类号： H03K7/00
CPC分类号： H03K7/08
摘要： The present invention relates to a method for generating a pulse width modulated (PWM) signal, which includes determining a PWM period and/or a pulse width of the pulse width modulated signal (fpwwi) by counting the number of clock cycles of a reference clock signa and by switching the pulse width modulated signal when a predetermined number of clock cycles is reached, wherein the reference clock signal comprises clock cycles of at least a first clock period and a second clock period, and the first clock period and the second clock period differ by an amount of time, which is substantially smaller than both half of th first clock period and half of the second clock period.
摘要翻译：本发明涉及一种用于产生脉宽调制（PWM）信号的方法，该方法包括通过对参考时钟的时钟周期数进行计数来确定脉冲宽度调制信号（fpwwi）的PWM周期和/或脉冲宽度并且当达到预定数量的时钟周期时，通过切换脉宽调制信号，其中参考时钟信号包括至少第一时钟周期和第二时钟周期的时钟周期，以及第一时钟周期和第二时钟周期与时间量相比，其大大小于第一时钟周期的一半和第二时钟周期的一半。

10. 发明申请

WO2008005853A3 ALL- DIGITAL PHASE-LOCKED LOOP FOR A DIGITAL PULSE-WIDTH MODULATOR 审中-公开
标题翻译：用于数字脉宽调制器的全数字锁相环
公开(公告)号：WO2008005853A3
公开(公告)日：2008-11-27
申请号：PCT/US2007072514
申请日：2007-06-29
申请人： TEXAS INSTRUMENTS INC , RISBO LARS , SHANKAR ASIT , ANGILIVELIL JOSEY GEORGE
发明人： RISBO LARS , SHANKAR ASIT , ANGILIVELIL JOSEY GEORGE
IPC分类号： H03L1/00 , H03D3/24 , H03K3/03 , H03K7/00 , H03K9/00 , H03L7/00 , H03L7/06 , H03L7/085 , H03L7/089 , H03L7/099 , H04B1/10 , H04B14/04 , H04M1/00
CPC分类号： H03L7/093 , H03L7/089 , H03L7/0991 , H03L7/0995
摘要： A digital audio system including a digital phase-locked-loop (26) circuit for generating a pulse- width-modulation (PWM) clock signal, applied to a pulse-code- modulation to pulse-width-modulation converter, is disclosed. The digital phase-locked loop includes a phase detector (32) for measuring phase error between a reference signal and a feedback signal. A digital version of the phase error, after filtering by a loop filter (36), is converted to a digital delay control word that is sampled at twice its frequency. Successive samples of the delay control word control the propagation delay of first and second delay cells in an oscillator. The use of successive samples at substantially twice the frequency of change of the delay control word effectively realizes the sum of a sine filter and a comb filter, which greatly suppresses the effects of jitter in the reference signal to the digital phase- locked loop.
摘要翻译：公开了一种数字音频系统，其包括用于产生脉冲宽度调制（PWM）时钟信号的数字锁相环（26）电路，其被应用于脉冲宽度调制转换器的脉冲编码调制。数字锁相环包括用于测量参考信号和反馈信号之间的相位误差的相位检测器（32）。在由环路滤波器（36）滤波之后，数字版本的相位误差被转换为以其两倍频率采样的数字延迟控制字。延迟控制字的连续采样控制振荡器中第一和第二延迟单元的传播延迟。以基本上两倍于延迟控制字变化频率的连续采样的使用有效地实现了正弦滤波器和梳状滤波器的总和，这极大地抑制了参考信号中抖动对数字锁相环的影响。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式