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1. 发明申请

WO2016065504A1 DC-DC CONVERTER WITH TEMPERATURE, PROCESS AND VOLTAGE COMPENSATED DEAD TIME DELAY 审中-公开
标题翻译：具有温度，过程和电压补偿死区时间延迟的DC-DC转换器
公开(公告)号：WO2016065504A1
公开(公告)日：2016-05-06
申请号：PCT/CN2014/089531
申请日：2014-10-27
申请人： TEXAS INSTRUMENTS INCORPORATED , TEXAS INSTRUMENTS JAPAN LIMITED
发明人： YI, Jun , OU, Xuechun
IPC分类号： H02M1/38
CPC分类号： H02M1/38 , G05F3/267 , H02M1/088 , H02M3/1588 , H02M2001/385 , H03K5/134 , H03K17/145 , H03K19/018521 , H03K2005/00143
摘要： Temperature, process and supply compensated delay circuits, DC to DC converters and integrated circuits are presented in which switch driver dead time delays are provided using a plurality of cascaded CMOS inverter circuits with a first inverter coupled through a diode-connected MOS transistor to a regulated voltage or circuit ground and a MOS capacitor is provided between the first inverter output and the regulated voltage or circuit ground to provide a controlled delay time. A second cascaded CMOS inverter is powered by a compensated voltage which decreases with temperature to operate as a comparator, and certain embodiments include one or more intermediate CMOS inverters to form a level shifting circuit between the second inverter and the final output inverter, with the level shift inverters powered by successively higher compensated voltages that decrease with increasing temperature.
摘要翻译：提出了温度，过程和电源补偿延迟电路，DC到DC转换器和集成电路，其中使用多个级联的CMOS反相器电路提供开关驱动器死区时间延迟，第一反相器通过二极管连接的MOS晶体管耦合到调节电压或电路接地，并且在第一反相器输出和调节电压或电路接地之间提供MOS电容器以提供受控的延迟时间。第二级联CMOS反相器由补偿电压供电，其随着温度而降低以用作比较器，并且某些实施例包括一个或多个中间CMOS反相器，以在第二反相器和最终输出反相器之间形成电平移位电路，移相逆变器由连续更高的补偿电压供电，随温度升高而降低。

2. 发明申请

WO2008079188A3 APPARATUS AND METHOD FOR CONTROLLING THE PROPAGATION DELAY OF A CIRCUIT BY CONTROLLING THE VOLTAGE APPLIED TO THE CIRCUIT 审中-公开
标题翻译：通过控制电路的电压来控制电路的传播延迟的装置和方法
公开(公告)号：WO2008079188A3
公开(公告)日：2011-01-13
申请号：PCT/US2007024284
申请日：2007-11-21
申请人： KERNAHAN KENT , LAMBERT CRAIG NORMAN , PAYSEO-DIAZ RAFAEL , RIBEIRO MILTON D , SPANOCHE SORIN ANDREI , CHEN JINGQUAN , CALDWELL MICHAEL W , FYRESTORM INC
发明人： KERNAHAN KENT , LAMBERT CRAIG NORMAN , PAYSEO-DIAZ RAFAEL , RIBEIRO MILTON D , SPANOCHE SORIN ANDREI , CHEN JINGQUAN , CALDWELL MICHAEL W
IPC分类号： G05F1/10
CPC分类号： H03H11/265 , H03K3/0315 , H03K2005/00143
摘要： The voltage applied to an integrated circuit is controlled by a temporal process monitor formed as part of the integrated circuit. The temporal process monitor includes a voltage controlled oscillator for producing a first output signal having a first period. A comparator compares the first period to one or more reference values. Should the first period be greater than a first selected reference value the comparator sends a signal to increase the voltage being supplied to the integrated circuit. Should the first period be less than a second selected reference value, the comparator sends a signal to decrease the voltage applied to the integrated circuit. In some embodiments a scaling circuit is provided for producing a second output signal having a second period different from (typically but not necessarily longer than) the first period.
摘要翻译：施加到集成电路的电压由作为集成电路的一部分形成的时间处理监视器来控制。时间处理监视器包括用于产生具有第一周期的第一输出信号的压控振荡器。比较器将第一周期与一个或多个参考值进行比较。如果第一周期大于第一选择的参考值，则比较器发送信号以增加提供给集成电路的电压。如果第一周期小于第二选择的参考值，则比较器发送信号以降低施加到集成电路的电压。在一些实施例中，提供缩放电路用于产生具有与第一周期不同（通常但不一定长于）的第二周期的第二输出信号。

3. 发明申请

WO2010079503A2 METHOD AND SYSTEM FOR OPEN LOOP COMPENSATION OF DELAY VARIATIONS IN A DELAY LINE 审中-公开
标题翻译：一种延迟线中延迟变化开环补偿的方法和系统
公开(公告)号：WO2010079503A2
公开(公告)日：2010-07-15
申请号：PCT/IN2009/000273
申请日：2009-05-08
申请人： KPIT CUMMINS INFOSYSTEMS LTD. , SHINDE, Suhas, Vishwasrao
发明人： SHINDE, Suhas, Vishwasrao
IPC分类号： H01L27/24
CPC分类号： H03K5/133 , H03K2005/00039 , H03K2005/00123 , H03K2005/0013 , H03K2005/00143 , H03L7/0812
摘要： The present invention provides a method and system for open loop compensation of delay variations in a delay line. The method includes sensing the Process, Voltage, Temperature (PVT) variations in the delay line using a sensing circuit. A first and second sensitive current are generated based on the PVT variations. The first and second sensitive currents are mirrored currents from the sensing circuit. Then, a first compensation current is generated based on the first sensitive current and a first summing current. The first summing current is a reference current independent of the PVT variations. Further, the first compensation current is mirrored as a second summing current and a second compensation current is generated from the second sensitive current and the second summing current. The second compensation current compensates the delay variations and has a sensitivity based on the sensitivities of the first and second sensitive currents.
摘要翻译：本发明提供了用于延迟线中的延迟变化的开环补偿的方法和系统。该方法包括使用感测电路感测延迟线中的过程，电压，温度（PVT）变化。基于PVT变化生成第一和第二敏感电流。第一和第二敏感电流是来自感测电路的镜像电流。然后，基于第一灵敏电流和第一求和电流生成第一补偿电流。第一加法电流是独立于PVT变化的参考电流。此外，第一补偿电流被镜像为第二求和电流，并且第二补偿电流由第二灵敏电流和第二求和电流生成。第二补偿电流补偿延迟变化并具有基于第一和第二敏感电流的灵敏度的灵敏度。

4. 发明申请

WO2008079188A2 APPARATUS AND METHOD FOR CONTROLLING THE PROPAGATION DELAY OF A CIRCUIT BY CONTROLLING THE VOLTAGE APPLIED TO THE CIRCUIT 审中-公开
标题翻译：通过控制电路的电压来控制电路的传播延迟的装置和方法
公开(公告)号：WO2008079188A2
公开(公告)日：2008-07-03
申请号：PCT/US2007/024284
申请日：2007-11-21
申请人： FYRESTORM, Inc , KERNAHAN, Kent , LAMBERT, Craig, Norman , PAYSEO-DIAZ, Rafael , RIBEIRO, Milton, D. , SPANOCHE, Sorin, Andrei , CHEN, Jingquan , CALDWELL, Michael, W.
发明人： KERNAHAN, Kent , LAMBERT, Craig, Norman , PAYSEO-DIAZ, Rafael , RIBEIRO, Milton, D. , SPANOCHE, Sorin, Andrei , CHEN, Jingquan , CALDWELL, Michael, W.
IPC分类号： G05F1/10
CPC分类号： H03H11/265 , H03K3/0315 , H03K2005/00143
摘要： The voltage applied to an integrated circuit is controlled by a temporal process monitor formed as part of the integrated circuit. The temporal process monitor includes a voltage controlled oscillator for producing a first output signal having a first period. A comparator compares the first period to one or more reference values. Should the first period be greater than a first selected reference value the comparator sends a signal to increase the voltage being supplied to the integrated circuit. Should the first period be less than a second selected reference value, the comparator sends a signal to decrease the voltage applied to the integrated circuit. In some embodiments a scaling circuit is provided for producing a second output signal having a second period different from (typically but not necessarily longer than) the first period. By placing the temporal process monitor on an integrated circuit chip, process variations and environmental factors which affect the performance of the integrated circuit can be automatically compensated so that the integrated circuit performs within specifications. Two or more temporal process monitors can be placed on a single integrated circuit chip or on different integrated circuit chips and the longest period produced by the temporal process monitors can be used to control the voltage supplied to all the sections of the integrated circuit chip associated with the temporal process monitors or to all the integrated circuit chips associated with the temporal process monitors. In some embodiments voltages related to the frequency of a temporal process monitor signal and the frequency of a fixed frequency clock are provided to an error amplifier, which changes the voltage applied to the integrated circuit such that the two frequencies are the same.
摘要翻译：施加到集成电路的电压由作为集成电路的一部分形成的时间处理监视器来控制。时间处理监视器包括用于产生具有第一周期的第一输出信号的压控振荡器。比较器将第一周期与一个或多个参考值进行比较。如果第一周期大于第一选择的参考值，则比较器发送信号以增加提供给集成电路的电压。如果第一周期小于第二选择的参考值，则比较器发送信号以减小施加到集成电路的电压。在一些实施例中，提供缩放电路用于产生具有与第一周期不同（通常但不一定长于）的第二周期的第二输出信号。通过将时间过程监视器放置在集成电路芯片上，可以自动补偿影响集成电路性能的过程变化和环境因素，使得集成电路在规格内执行。可以将两个或更多个时间过程监视器放置在单个集成电路芯片上或不同的集成电路芯片上，并且由时间过程监视器产生的最长周期可以用于控制提供给与所述集成电路芯片相关联的集成电路芯片的所有部分的电压时间过程监视与与时间过程监视器相关联的所有集成电路芯片。在一些实施例中，与时间过程监视信号的频率和固定频率时钟的频率相关的电压被提供给误差放大器，该误差放大器改变施加到集成电路的电压，使得两个频率相同。

5. 发明申请

WO2008153777A3 LOW COST AND LOW VARIATION OSCILLATOR 审中-公开
标题翻译：低成本和低变化振荡器
公开(公告)号：WO2008153777A3
公开(公告)日：2009-06-11
申请号：PCT/US2008006664
申请日：2008-05-23
申请人： ATMEL CORP , FORT JIMMY , CUENCA MICHEL , PAYRARD DANIEL
发明人： FORT JIMMY , CUENCA MICHEL , PAYRARD DANIEL
IPC分类号： H03K3/354 , H03K3/011 , H03K3/0231
CPC分类号： H03K3/354 , H03K3/011 , H03K3/0231 , H03K5/133 , H03K5/1565 , H03K2005/0013 , H03K2005/00143 , H03K2005/00202
摘要： An oscillator circuit for use in integrated circuits. The oscillator circuit includes a delay generation circuit having a current mirror with at least a first current mirror branch and a second current mirror branch, a current source coupled to the first current mirror branch, a capacitive element coupled to the first current mirror branch; and a resistive element coupled to the second current mirror branch. The oscillator circuit further includes a plurality of inverting elements coupled in series with one another and a transconducting element coupled to an output of the plurality of inverting elements. The transconducting element is configured to discharge the capacitive element. A latching element is coupled to latch to an output signal of the plurality of inverting elements.
摘要翻译：用于集成电路的振荡电路。所述振荡器电路包括具有至少第一电流镜分支和第二电流镜分支的电流镜的延迟产生电路，耦合到所述第一电流镜分支的电流源，耦合到所述第一电流镜分支的电容元件; 以及耦合到第二电流镜分支的电阻元件。振荡器电路还包括彼此串联耦合的多个反相元件和耦合到多个反相元件的输出的跨导元件。跨导元件被配置为放电电容元件。锁存元件被耦合以锁存到多个反相元件的输出信号。

6. 发明申请

WO2008033809A2 SYSTEMS FOR IMPLEMENTING A TEMPERATURE AND PROCESS COMPENSATED TWO-STAGE RING OSCILLATOR 审中-公开
标题翻译：用于实现温度和工艺补偿的两级环形振荡器的系统
公开(公告)号：WO2008033809A2
公开(公告)日：2008-03-20
申请号：PCT/US2007078122
申请日：2007-09-11
申请人： CONEXANT SYSTEMS INC , LAKSHMIKUMAR KADABA , MUKUNDAGIRI VINOD
发明人： LAKSHMIKUMAR KADABA , MUKUNDAGIRI VINOD
IPC分类号： H03K3/03
CPC分类号： H03K3/0315 , H03K3/354 , H03K2005/0013 , H03K2005/00143
摘要： Systems and methods for implementing a temperature compensated two-stage ring oscillator are described. At least one embodiment includes a system for generating a clock signal comprising a self-starting oscillator comprising two delay stages in a ring configuration. The two-stage ring oscillator is configured to generate the clock signal, wherein the delay stages are configured such that the two-stage ring oscillator has a single right-half plane (RHP) pole in each of the two delay stages where feedback is always positive. For some embodiments, the system further comprises a compensation module configured to sense temperature and process variations and adjust a supply voltage for the two-stage ring oscillator to compensate for temperature and process variations in order to maintain a constant frequency clock signal. For such embodiments, the compensation module comprises a replica circuit configured to mirror operation of the n-channel devices within the two-stage ring oscillator. The compensation module further comprises a constant gm circuit configured to provide a biasing current to the replica circuit, wherein the replica circuit receives the biasing current to generate a reference voltage. The compensation module further comprises a voltage regulator configured to receive the reference voltage from the replica circuit, wherein the voltage regulator is further configured to provide a supply voltage to the two-stage ring oscillator.
摘要翻译：描述了用于实现温度补偿的两级环形振荡器的系统和方法。至少一个实施例包括用于产生时钟信号的系统，该系统包括具有环形配置中的两个延迟级的自起动振荡器。两级环形振荡器被配置为生成时钟信号，其中延迟级被配置成使得两级环形振荡器在两个延迟级中的每一个中具有单个右半平面（RHP）极，其中总是反馈正。对于一些实施例，该系统还包括补偿模块，该补偿模块被配置为感测温度和处理变化并且调整用于两级环形振荡器的电源电压以补偿温度和工艺变化以保持恒定频率时钟信号。对于这样的实施例，补偿模块包括被配置为镜像两级环形振荡器内的n沟道器件的操作的复制电路。补偿模块还包括恒定gm电路，其被配置为向复制电路提供偏置电流，其中复制电路接收偏置电流以生成参考电压。所述补偿模块进一步包括电压调节器，所述电压调节器被配置为从所述复制电路接收所述参考电压，其中所述电压调节器还被配置为向所述两级环形振荡器提供电源电压。

7. 发明申请

WO01078233A1 PROCESS STRENGTH INDICATOR 审中-公开
标题翻译：过程强度指示器
公开(公告)号：WO01078233A1
公开(公告)日：2001-10-18
申请号：PCT/US2001/010528
申请日：2001-03-28
IPC分类号： H03K5/00 , H03K5/13 , H03K5/12 , H03K3/00
CPC分类号： H03K5/13 , H03K2005/00032 , H03K2005/00123 , H03K2005/00143
摘要： A method and apparatus for dynamically evaluating the behavior of semiconductor devices in integrated circuit and for providing an adjusted output is disclosed. In one configuration (Fig. 5) the method and apparatus disclosed herein is configured as a compensation system and comprises a detection subsystem (202) and a switching subsystem (208). The detection subsystem (202, details in dashed box 202 in Fig. 6) is configured to receive a signal (Input 203) generated by one or more semiconductor devices and detect the magnitude of the received signal. Depending on desired system parameters, the magnitude of the received signal causes one or more semiconductor devices to conduct an output signal to a switching subsystem (208), details in box 208, Fig. 6). In one configuration, a plurality of signals travel from the detection subsystem to the switching subsystem. The switching subsystem is configured to receive the signals from the detection subsystem and generate a voltage or current (IT) having magnitude related to the input received for the detection subsystem.
摘要翻译：公开了用于动态地评估集成电路中的半导体器件的行为并提供调整的输出的方法和装置。在一种配置（图5）中，本文公开的方法和装置被配置为补偿系统，并且包括检测子系统（202）和交换子系统（208）。检测子系统（202，图6中虚线框202的细节）被配置为接收由一个或多个半导体器件产生的信号（输入203），并且检测接收信号的幅度。根据期望的系统参数，接收信号的幅度使得一个或多个半导体器件将输出信号传送到交换子系统（208），详细信息在图20的框208中。 6）。在一种配置中，多个信号从检测子系统传送到交换子系统。交换子系统被配置为从检测子系统接收信号，并产生具有与为检测子系统接收的输入相关的幅度的电压或电流（IT）。

8. 发明申请

WO2014007989A1 ACCURATE LOW-POWER DELAY CIRCUIT 审中-公开
标题翻译：精确的低功耗延迟电路
公开(公告)号：WO2014007989A1
公开(公告)日：2014-01-09
申请号：PCT/US2013/046547
申请日：2013-06-19
申请人： SANDISK TECHNOLOGIES INC. , BHUIYAN, Ekram H. , CHI, Steve X.
发明人： BHUIYAN, Ekram H. , CHI, Steve X.
IPC分类号： H03K5/13
CPC分类号： H03K5/133 , H03K2005/00143
摘要： Delay circuits are described for which the delay remains substantially constant within a desired range of variation of supply voltage and/or temperature.
摘要翻译：描述延迟电路，其延迟在电源电压和/或温度的变化的期望范围内基本上保持恒定。

9. 发明申请

WO2010079503A4 METHOD AND SYSTEM FOR OPEN LOOP COMPENSATION OF DELAY VARIATIONS IN A DELAY LINE 审中-公开
标题翻译：延迟线延迟变化的开环补偿方法与系统
公开(公告)号：WO2010079503A4
公开(公告)日：2010-12-02
申请号：PCT/IN2009000273
申请日：2009-05-08
申请人： KPIT CUMMINS INFOSYSTEMS LTD , SHINDE SUHAS VISHWASRAO
发明人： SHINDE SUHAS VISHWASRAO
IPC分类号： H03L7/00
CPC分类号： H03K5/133 , H03K2005/00039 , H03K2005/00123 , H03K2005/0013 , H03K2005/00143 , H03L7/0812
摘要： The present invention provides a method and system for open loop compensation of delay variations in a delay line. The method includes sensing the Process, Voltage, Temperature (PVT) variations in the delay line using a sensing circuit. A first and second sensitive current are generated based on the PVT variations. The first and second sensitive currents are mirrored currents from the sensing circuit. Then, a first compensation current is generated based on the first sensitive current and a first summing current. The first summing current is a reference current independent of the PVT variations. Further, the first compensation current is mirrored as a second summing current and a second compensation current is generated from the second sensitive current and the second summing current. The second compensation current compensates the delay variations and has a sensitivity based on the sensitivities of the first and second sensitive currents.
摘要翻译：本发明提供了延迟线中的延迟变化的开环补偿的方法和系统。该方法包括使用感测电路感测延迟线中的过程，电压，温度（PVT）变化。基于PVT变化产生第一和第二敏感电流。第一和第二敏感电流是来自感测电路的镜像电流。然后，基于第一敏感电流和第一求和电流产生第一补偿电流。第一个求和电流是独立于PVT变化的参考电流。此外，第一补偿电流被镜像为第二求和电流，并且从第二敏感电流和第二求和电流产生第二补偿电流。第二补偿电流补偿延迟变化，并且具有基于第一和第二敏感电流的灵敏度的灵敏度。

10. 发明申请

WO2010079503A3 METHOD AND SYSTEM FOR OPEN LOOP COMPENSATION OF DELAY VARIATIONS IN A DELAY LINE 审中-公开
标题翻译：一种延迟线中延迟变化开环补偿的方法和系统
公开(公告)号：WO2010079503A3
公开(公告)日：2010-10-14
申请号：PCT/IN2009000273
申请日：2009-05-08
申请人： KPIT CUMMINS INFOSYSTEMS LTD , SHINDE SUHAS VISHWASRAO
发明人： SHINDE SUHAS VISHWASRAO
IPC分类号： H03L7/00
CPC分类号： H03K5/133 , H03K2005/00039 , H03K2005/00123 , H03K2005/0013 , H03K2005/00143 , H03L7/0812
摘要： The present invention provides a method and system for open loop compensation of delay variations in a delay line. The method includes sensing the Process, Voltage, Temperature (PVT) variations in the delay line using a sensing circuit. A first and second sensitive current are generated based on the PVT variations. The first and second sensitive currents are mirrored currents from the sensing circuit. Then, a first compensation current is generated based on the first sensitive current and a first summing current. The first summing current is a reference current independent of the PVT variations. Further, the first compensation current is mirrored as a second summing current and a second compensation current is generated from the second sensitive current and the second summing current. The second compensation current compensates the delay variations and has a sensitivity based on the sensitivities of the first and second sensitive currents.
摘要翻译：本发明提供了用于延迟线中的延迟变化的开环补偿的方法和系统。该方法包括使用感测电路感测延迟线中的过程，电压，温度（PVT）变化。基于PVT变化生成第一和第二敏感电流。第一和第二敏感电流是来自感测电路的镜像电流。然后，基于第一灵敏电流和第一求和电流生成第一补偿电流。第一加法电流是独立于PVT变化的参考电流。此外，第一补偿电流被镜像为第二求和电流，并且第二补偿电流由第二灵敏电流和第二求和电流生成。第二补偿电流补偿延迟变化并具有基于第一和第二敏感电流的灵敏度的灵敏度。

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