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1. 发明申请

WO2017132583A2 MULTI-CHANNEL CINEMA AMPLIFIER WITH POWER-SHARING, MESSAGING AND MULTI-PHASE POWER SUPPLY 审中-公开
公开(公告)号：WO2017132583A2
公开(公告)日：2017-08-03
申请号：PCT/US2017/015459
申请日：2017-01-27
申请人： DOLBY LABORATORIES LICENSING CORPORATION
发明人： HEALY, Andrew , VOGEL, Erich H. , POULAIN, Andrew M. , LONG, Gregory J. , BUTLER, Joel A. , LUCE, Angela S. , REVELLI, Luca , NURMUKHANOV, Dossym , COOK, Tanner , TRAVERSO M., Marcelo
IPC分类号： H04R5/04
CPC分类号： H04R5/04 , H03F1/301 , H03F3/183 , H03F3/2173 , H03F3/45475 , H03F3/68 , H03F2200/03 , H03F2200/447 , H03F2200/468 , H03F2203/45512 , H03F2203/45522 , H03F2203/45528 , H03G3/3005 , H03G2201/208 , H03G2201/708 , H04R29/007 , H04R2420/05 , H04R2430/01 , H04S7/308 , H05B37/029
摘要： An integrated cinema amplifier a power supply stage that distributes power over a plurality of channels for rendering immersive audio content in a surround sound listening environment. The amplifier automatically detects maximum and net power availability and requirements based on audio content by decoding audio metadata and dynamically adjusts gains to each channel or sets of channels based on content and operational/environmental conditions. A power supply stage provides power to drive a plurality of channels corresponding to speaker feeds to a plurality of speakers. The amplifier has a front panel having an LED array with each LED associated with a respective channel or group of channels of the multi-channel amplifier, and a control unit configured to light the LEDs according to display patterns based on operating status or error conditions of the amplifier.

2. 发明申请

WO2017132594A2 MULTI-CHANNEL AMPLIFIER WITH CONTINUOUS CLASS-D MODULATOR AND EMBEDDED PLD AND RESONANT FREQUENCY DETECTOR 审中-公开
公开(公告)号：WO2017132594A2
公开(公告)日：2017-08-03
申请号：PCT/US2017/015476
申请日：2017-01-27
申请人： DOLBY LABORATORIES LICENSING CORPORATION
发明人： HEALY, Andrew , VOGEL, Erich H. , POULAIN, Andrew M. , LONG, Gregory J. , BUTLER, Joel A. , LUCE, Angela S. , REVELLI, Luca , NURMUKHANOV, Dossym , COOK, Tanner , TRAVERSO M., Marcelo
IPC分类号： H03F3/217
CPC分类号： H04R5/04 , H03F1/301 , H03F3/183 , H03F3/2173 , H03F3/45475 , H03F3/68 , H03F2200/03 , H03F2200/447 , H03F2200/468 , H03F2203/45512 , H03F2203/45522 , H03F2203/45528 , H03G3/3005 , H03G2201/208 , H03G2201/708 , H04R29/007 , H04R2420/05 , H04R2430/01 , H04S7/308 , H05B37/029
摘要： A continuous time Class-D modulator with an embedded programmable logic device in a forward path. The FPGA is configured to provide synchronization control by deriving a synchronization clock for the modulator and monitoring a 1-bit PWM signal for sync-lock status; monitoring the PWM duty cycle to detect overage conditions and lowering audio levels to eliminate hard-clipping events; implementing dead-band timing for subsequent output stages; dynamically controlling the net loop delay seen by the 1-bit PWM using programmable delay lines; monitoring amplifier output conditions to provide comparison with the 1-bit PWM or determine load characteristics; monitoring a front-end integrator to trim for optimal distortion (THD+N). An output circuit of an audio amplifier having an analog filter stage comprising an inductor/capacitor (LC) circuit, a physical connector for connecting a speaker, a tuned resonant circuit configured to provide a low-impedance load for the output circuit in the event of an open load on the output circuit by providing damping of a natural resonance of the LC circuit or of high-frequency oscillations in the output circuit, and a resonant frequency detection coupled to the output of the LCR circuit to detect one of a natural resonance oscillation or the high- frequency oscillation condition. The tuned resonant circuit provides modulation control to a closed-loop Class D amplifier with feedback after the output filter.

3. 发明申请

WO2005078939A1 送信電力制御装置审中-公开
标题翻译：变速箱动力控制装置
公开(公告)号：WO2005078939A1
公开(公告)日：2005-08-25
申请号：PCT/JP2005/001836
申请日：2005-02-08
申请人：松下電器産業株式会社 , 松本英徳
发明人：松本英徳
IPC分类号： H04B1/04
CPC分类号： H03G1/0088 , H03G3/3042 , H03G2201/103 , H03G2201/506 , H03G2201/702 , H03G2201/708 , H04B2001/0416
摘要：　送信電力制御装置の調整に要する工程数を削減し、広いダイナミックレンジで高精度な送信電力制御を行う送信電力制御装置。分解能が１ｄＢの第１可変増幅回路（１２２）と分解能が０．１ｄＢの第２可変増幅回路（１２３）とを備え、周波数特性及び温度特性といった環境の変化によって生じる送信電力精度の劣化を補償する補正値及び送信電力誤差を補償する補正値を補正値算出部（１０６）が算出し、送信電力算出部（１０７）が受信信号に基づいて通信相手に出力する指定送信電力を補正値した送信電力を算出し、第１設定値算出部（１０８）及び第２設定値算出部（１０９）が補正後の送信電力に基づいて、第１可変増幅回路（１２２）及び第２可変増幅回路（１２３）に設定するゲイン値を算出する。
摘要翻译：提供了一种发送功率控制装置，其能够减少调整发送功率控制装置所需的步数，并且以宽的动态范围和高精度进行发送功率控制。发送功率控制装置包括分辨率为1dB的第一可变放大电路（122）和分辨率为0.1dB的第二可变放大电路（123）。发送功率控制装置还包括：校正值计算单元，用于计算用于补偿由频率特性产生的发送功率精度的劣化的校正值和诸如温度特性的环境变化以及补偿发送功率误差的校正值 ; 发送功率计算单元，用于根据接收信号计算通过校正要输出给通信对方的规定发送功率而获得的发送功率; 以及第一设定值计算单元（108）和第二设定值计算单元（109），用于根据发送功率计算要设置到第一可变放大电路（122）和第二可变放大电路（123）的增益值修正后。

4. 发明申请

WO01050632A1 POWER CHARACTERISTIC OF A RADIO TRANSMITTER 审中-公开
标题翻译：无线电发射机的功率特性
公开(公告)号：WO01050632A1
公开(公告)日：2001-07-12
申请号：PCT/SE2000/002695
申请日：2000-12-29
IPC分类号： H03G3/00 , H03G3/30 , H04B7/005
CPC分类号： H03G3/001 , H03G3/3047 , H03G2201/708 , H04W52/50 , H04W52/52
摘要： The present invention relates to radio transmission of bursts in for example a TDMA cellular radio system. The burst starts with a ramping up period, ends with a corresponding ramping down ramping down period and with the pay-load information therebetween. The ramp form is created in a ramp generator (13) which gives a multiplication value to multiply the digital information to be transmitted in multipliers (15, 16). The multiplied values are converted into analogue form and amplified before being transferred to the antenna (21). Output power and temperature of the transmitting equipment are measured (22, 23) and used to update the output power levels during the next burst.
摘要翻译：本发明涉及例如TDMA蜂窝无线电系统中的脉冲串的无线电传输。突发从加速期开始，以相应的斜坡下降周期结束，并且其间的付费信息。在斜坡发生器（13）中创建斜坡形式，斜坡发生器（13）给出乘法值乘以要在乘法器（15,16）中发送的数字信息。相乘的值被转换成模拟形式，并在被传送到天线（21）之前被放大。测量发射设备的输出功率和温度（22,23），用于在下一个脉冲串期间更新输出功率电平。

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