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    • 5. 发明申请
    • ENHANCED DOHERTY AMPLIFIER
    • 增强型DOHERTY放大器
    • WO2012125279A3
    • 2013-01-03
    • PCT/US2012026850
    • 2012-02-28
    • CREE INC
    • PENGELLY RAYMOND SYDNEY
    • H03F1/02H03F1/42H03F3/21
    • H03F3/68H03F1/0288H03F1/42H03F3/189H03F3/20H03F3/211H03F2200/111H03F2200/36H03F2200/39H03F2200/429H03F2200/451H03F2203/20
    • The disclosure relates to an enhanced Doherty amplifier that provides significant performance improvements over conventional Doherty amplifiers. The enhanced Doherty amplifier includes a power splitter, combining node, a carrier path, and a peaking path. The power splitter is configured to receive an input signal and split the input signal into a carrier signal provided at a carrier splitter output and a peaking signal provided at a peaking splitter output. The carrier path includes carrier power amplifier circuitry, a carrier input network coupled between the carrier splitter output and the carrier power amplifier circuitry, and a carrier output network coupled between the carrier power amplifier circuitry and the Doherty combining node. The peaking path includes peaking power amplifier circuitry, a peaking input network coupled between the peaking splitter output and the peaking power amplifier circuitry, and a carrier output network coupled between the power amplifier circuitry and the Doherty combining node.
    • 本公开涉及一种增强型Doherty放大器,与传统的Doherty放大器相比,提供了显着的性能改进。 增强型Doherty放大器包括功率分配器,组合节点,载波路径和峰值路径。 功率分配器被配置为接收输入信号并将输入信号分割成在载波分离器输出处提供的载波信号和在峰值分离器输出处提供的峰值信号。 载波路径包括载波功率放大器电路,耦合在载波分离器输出和载波功率放大器电路之间的载波输入网络,以及耦合在载波功率放大器电路和Doherty组合节点之间的载波输出网络。 峰化路径包括峰值功率放大器电路,耦合在峰值分配器输出和峰化功率放大器电路之间的峰值输入网络,以及耦合在功率放大器电路和多赫蒂组合节点之间的载波输出网络。
    • 7. 发明申请
    • POWER AMPLIFIER CIRCUIT AND FRONT END CIRCUIT
    • 功率放大器电路和前端电路
    • WO2011066861A1
    • 2011-06-09
    • PCT/EP2009/066355
    • 2009-12-03
    • EPCOS AGSPITS, ErwinVAN DEN OEVER, Léon C. M.
    • SPITS, ErwinVAN DEN OEVER, Léon C. M.
    • H03F3/24H03F3/72H04B1/00H03F1/02H03F3/60H01P1/213H04B1/04
    • H03F3/24H03F1/0277H03F3/602H03F3/72H03F2200/111H03F2200/429H03F2200/543H03F2203/7209H03F2203/7239H04B1/0483H04B2001/0408
    • A power amplifier circuit (DIPPA), comprising a driver stage (DR) which is applicable to provide a preamplified driver signal (S DR) dependent on a predetermined transmit signal. The power amplifier circuit (DIPPA) comprises also a frequency selector (DIP) which is electrically coupled to the driver stage (DR) and which is applicable to separate the driver signal (S DR) into a first and second signal (S 1,S_2). The first signal (S_l) is associated to a first predetermined and the second signal (S_2) is associated to a second predetermined frequency band. The power amplifier circuit (DIPPA) comprises at least a first and second power amplifier stage (PA1, PA2). The first and second power amplifier stage (PA1, PA2) are electrically coupled to the frequency selector (DIP). The first and second power amplifier stage (PA1, PA2) is operable to provide a first and second amplified signal (S_A1, S_2), respectively, dependent on the first and second signal (S_1, S_2), respectively.
    • 一种功率放大器电路(DIPPA),包括驱动级(DR),其可应用于提供取决于预定发射信号的预放大驱动信号(S DR)。 功率放大器电路(DIPPA)还包括电耦合到驱动器级(DR)的频率选择器(DIP),并且可应用于将驱动器信号(S DR)分离成第一和第二信号(S1,S2) )。 第一信号(S_1)与第一预定相关联,第二信号(S_2)与第二预定频带相关联。 功率放大器电路(DIPPA)至少包括第一和第二功率放大器级(PA1,PA2)。 第一和第二功率放大器级(PA1,PA2)电耦合到频率选择器(DIP)。 第一和第二功率放大器级(PA1,PA2)可分别根据第一和第二信号(S_1,S_2)分别提供第一和第二放大信号(S_A1,S_2)。