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    • 2. 发明申请
    • SYSTEM FOR IMPLEMENTING RUN LENGTH LIMITED CODES
    • 执行运行长度有限编码的系统
    • WO1998006181A1
    • 1998-02-12
    • PCT/US1997013650
    • 1997-08-05
    • SEAGATE TECHNOLOGY, INC.
    • SEAGATE TECHNOLOGY, INC.TSANG, Kinhing, Paul
    • H03M07/46
    • G11B20/1426G06T9/005G11B2020/1446H03M5/145
    • An apparatus encodes data blocks into code blocks, each code block containing more symbols than its respective data block. The apparatus includes a data block latch (30) for receiving individual data blocks and for dividing each data block into two sub-blocks. An encoder (32) receives one of the data sub-blocks and encodes the first data sub-block as a code sub-block. An interleaver (34, 36), coupled to the encoder (32) and the data block latch (30), combines the code sub-block with the second data sub-block to produce a code block, such that when the code blocks are concatenated with each other to produce a string of code symbols no more than five consecutive occurrences of a particular code symbol are present in the string of code symbols.
    • 一种装置将数据块编码为码块,每个码块包含比其相应数据块更多的码元。 该装置包括用于接收各个数据块并用于将每个数据块划分成两个子块的数据块锁存器(30)。 编码器(32)接收数据子块中的一个,并将第一数据子块编码为码子块。 耦合到编码器(32)和数据块锁存器(30)的交织器(34,36)将代码子块与第二数据子块组合以产生代码块,使得当代码块为 相互串联以产生一串代码符号,在代码符号串中不存在不超过五个特定代码符号的连续出现次数。
    • 5. 发明申请
    • METHOD AND APPARATUS FOR ENCODING A BINARY SIGNAL
    • 用于编码二进制信号的方法和设备
    • WO9917456A9
    • 1999-06-17
    • PCT/US9820360
    • 1998-09-28
    • DATAPATH SYSTEMS INCSHIH MING SHIHTHAPAR HEMANT
    • SHIH-MING SHIHTHAPAR HEMANT
    • G06F11/10G11B20/10G11B20/14G11B20/18H03M5/14H03M13/31H03M13/41H03M13/12
    • G11B20/1426G11B20/10009G11B2020/1434G11B2020/1446H03M5/145H03M13/31
    • A system and method for avoiding catastophic error sequences in a media code sequence of symbols for data storage on a storage medium according to EPRML. The system and method include modulation encoding user data which is to be stored on the storage medium using a modulation encoder (602). The modulation encoder (602) outputs a channel code modulation output symbol sequence. The modulation code is defined according to a modulation criteria wherein the set of all possible modulation output symbol sequences is constrained in a manner which excludes certain excluded modulation output symbol sequences. A precoder (604) precodes the channel code modulation output symbol sequence to a precoding transfer function. The precoding transfer function transforms the channel code modulation output symbol sequence into a media code sequence of symboles and the precoding transfer function is defined so that when modulation encoding is performed according to the modulation criteria, the media code sequence of symbols is constrained to exclude EPRML catastrophic error sequeces of greater than a determined length.
    • 一种用于根据EPRML避免用于存储介质上的数据存储的符号的媒体码序列中的突变错误序列的系统和方法。 该系统和方法包括使用调制编码器对要存储在存储介质上的用户数据进行调制编码(602)。 调制编码器(602)输出信道码调制输出码元序列。 根据调制准则来定义调制码,其中所有可能的调制输出码元序列的集合以排除某些排除的调制输出码元序列的方式被约束。 预编码器(604)将信道编码调制输出符号序列预编码为预编码传递函数。 预编码传递函数将信道码调制输出码元序列变换为码元的媒体码序列,并且定义预编码传递函数,使得当根据调制准则执行调制编码时,码元的媒体码序列被约束以排除EPRML 大于确定长度的灾难性错误后果。
    • 9. 发明申请
    • HIGH RATE CODING FOR MEDIA NOISE
    • 媒体噪声的高速编码
    • WO2004029955A1
    • 2004-04-08
    • PCT/EP2003/010635
    • 2003-09-24
    • INFINEON TECHNOLOGIES AG
    • BLISS, William, G.KARABED, RazmikVITYAEV, Andrei
    • G11B20/10
    • G11B20/1426G11B20/10009G11B20/1833G11B2020/1446H03M5/145H03M13/093
    • An apparatus has a conversion circuit, a precoder circuit, and a selection circuit. The conversion circuit converts user data b1, b2, b3 . . . bk to a coded sequence c0, c1, c2 . . . cq. The selection circuit selects c0 in the coded sequence c0, c1, c2 . . . cq such that the output of the precoder circuit has less than a maximum number q of transitions. The conversion circuit may include an encoder circuit to convert user data b1, b2, b3 . . . bk to a sequence c1, c2 . . . cq, and a transition minimization circuit to add c0 to the sequence c1, c2 . . . cq. The apparatus may have a circuit to add at least one additional bit, which may be a parity bit, to the coded sequence c0, c1, c2 . . . cq.
    • 一种装置具有转换电路,预编码器电路和选择电路。 转换电路转换用户数据b1,b2,b3。 。 。 bk到编码序列c0,c1,c2。 。 。 CQ。 选择电路以编码序列c0,c1,c2选择c0。 。 。 cq,使得预编码器电路的输出具有小于转换的最大数量q。 转换电路可以包括用于转换用户数据b1,b2,b3的编码器电路。 。 。 bk到序列c1,c2。 。 。 cq,以及将c0加到序列c1,c2的转移最小化电路。 。 。 CQ。 该装置可以具有向编码序列c0,c1,c2添加至少一个附加位(可以是奇偶校验位)的电路。 。 。 CQ。
    • 10. 发明申请
    • PARTIAL RESPONSE CHANNEL HAVING COMBINED MTR AND PARITY CONSTRAINTS
    • 具有组合地铁和部分限制的部分响应通道
    • WO01003304A1
    • 2001-01-11
    • PCT/US1999/031199
    • 1999-12-31
    • G11B20/10G11B20/14H03M5/14H03M7/14H03M13/09H03M13/31H03M13/41
    • G11B20/10055G11B20/10009G11B20/1426G11B2020/1446H03M5/145H03M13/31H03M13/41H03M13/4107H03M13/6331H03M13/6343
    • A data storage channel encoder (150) includes a data word input (152), a code word output (153) and an encoder. The encoder (150) is coupled between the data word input (152) and the code word output (153) and is adapted to encode successive data words (Xm) received on the data word input (152) into sucessive code words (Yn) on the code word output (153) according to a selected code having combined maximum transition run and parity constraints. The maximum transition run constraint constrains the successive code words (Yn) such that, when the successive code words (Yn) are concatenated to form an encoded bit stream (260), the encoded bit stream (260) has a maximum of one consecutive transition beginning at either odd or even indexed bit positions (268) in the encoded bit stream (260) and a maximum of two consecutive transitions beginning at the other of the odd or even indexed bit positions (268).
    • 数据存储通道编码器(150)包括数据字输入(152),代码字输出(153)和编码器。 编码器(150)耦合在数据字输入(152)和代码字输出(153)之间,并且适于将在数据字输入(152)上接收的连续数据字(Xm)编码为成功的代码字(Yn) 根据具有组合的最大转换运行和奇偶校验约束的所选代码,在码字输出(153)上。 最大过渡运行约束约束连续码字(Yn),使得当连续码字(Yn)被级联以形成编码比特流(260)时,编码比特流(260)具有最大一个连续转换 在编码比特流(260)中的奇数或偶数索引比特位置(268)开始,并且从奇数或偶数索引比特位置(268)中的另一个开始的最大两个连续转换开始。