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1. 发明申请

WO2011048522A2 NEIGHBORHOOD OPERATIONS FOR PARALLEL PROCESSING 审中-公开
标题翻译：用于平行加工的邻域操作
公开(公告)号：WO2011048522A2
公开(公告)日：2011-04-28
申请号：PCT/IB2010/054526
申请日：2010-10-06
申请人： ZIKBIT LTD. , AKERIB, Avidan , EHRMAN, Eli , AGAM, Oren , MEYASSED, Moshe , MEIR, Yehoshua , FUKUZO, Yukio
发明人： AKERIB, Avidan , EHRMAN, Eli , AGAM, Oren , MEYASSED, Moshe , MEIR, Yehoshua , FUKUZO, Yukio
IPC分类号： H01L27/108
CPC分类号： G11C7/1006
摘要： A memory device includes a plurality of storage units in which to store data of a bank, wherein the data has a logical order prior to storage and a physical order different than the logical order within the plurality of storage units and a within-device reordering unit to reorder the data of a bank into the logical order prior to performing on-chip processing. In another embodiment, the memory device includes an external device interface connectable to an external device communicating with the memory device, an internal processing element to process data stored on the device and multiple banks of storage. Each bank includes a plurality of storage units and each storage unit has two ports, an external port connectable to the external device interface and an internal port connected to the internal processing element.
摘要翻译：一种存储器装置包括多个存储单元，在所述多个存储单元中存储存储体的数据，其中所述数据具有存储之前的逻辑顺序和与所述多个存储器内的逻辑顺序不同的物理顺序单元和设备内重新排序单元，以在执行片上处理之前将银行的数据重新排序为逻辑顺序。在另一个实施例中，存储装置包括可连接到与存储装置通信的外部装置的外部装置接口，处理存储在装置上的数据和多个存储库的内部处理元件。每个存储体包括多个存储单元，并且每个存储单元具有两个端口，可连接到外部装置接口的外部端口和连接到内部处理单元的内部端口。

2. 发明申请

WO2011048572A2 AN IN-MEMORY PROCESSOR 审中-公开
标题翻译：内存处理器
公开(公告)号：WO2011048572A2
公开(公告)日：2011-04-28
申请号：PCT/IB2010/054780
申请日：2010-10-21
申请人： ZIKBIT LTD. , AGAM, Oren , MEYASSED, Moshe , FUKUZO, Yukio
发明人： AGAM, Oren , MEYASSED, Moshe , FUKUZO, Yukio
IPC分类号： H01L27/108
CPC分类号： G11C7/1006
摘要： A memory device includes at least two memory banks storing data and an internal processor. The at least two memory banks are accessible by a host processor. The internal processor receives a timeslot from the host processor and processes a portion of the data from an indicated one of the at least two banks of the memory array during the timeslot while the remaining banks are available to the host processor during the timeslot. A method of operating a memory device having banks storing data includes a host processor issuing per bank timeslots to an internal processor of a memory device, the internal processor operating on an indicated bank of the memory device during the timeslot and the host processor not accessing the indicated bank during the timeslot.
摘要翻译：存储器件包括至少两个存储数据的存储体和内部处理器。至少两个存储体可由主处理器访问。内部处理器从主机处理器接收时隙，并且在时隙期间处理来自存储器阵列的至少两个存储体组中指定的一个的数据的一部分，而在时隙期间剩余的存储体可用于主机处理器。一种操作具有存储数据的存储器的存储器件的方法包括：主处理器，每个存储体时隙向存储器件的内部处理器发出，所述内部处理器在时隙期间在存储器件的指示库上操作，并且主机处理器不访问存储器在时间段内指定银行。

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