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1. 发明申请

WO2012162692A3 HIGH IMPEDANCE SURFACE 审中-公开
公开(公告)号：WO2012162692A3
公开(公告)日：2012-11-29
申请号：PCT/US2012/039801
申请日：2012-05-29
申请人： TEXAS INSTRUMENTS INCORPORATED , TEXAS INSTRUMENTS JAPAN LIMITED , MURDOCK, James, N. , SEOK, Eunyoung , GINSBURG, Brian, P. , RENTALA, Vijay, B. , RAMASWAMY, Srinath , HAROUN, Baher
发明人： MURDOCK, James, N. , SEOK, Eunyoung , GINSBURG, Brian, P. , RENTALA, Vijay, B. , RAMASWAMY, Srinath , HAROUN, Baher
IPC分类号： H01Q1/24 , H01Q9/04
摘要： An apparatus for emitting radiation has an antenna formed on a substrate (104) and a high impedance surface (HIS). The HIS has a plurality of multi-layer vertically stacked cells (304) arranged to form an array that substantially surrounds at least a portion of the antenna. Each cell (304) includes a ground plane (106) formed on the substrate (104), a first plate (306) formed over and coupled to the ground plane, and a second plate (310) formed over and coupled through an interconnect (308) to the first plate. Example first and second substrates are parallel and substantially rectangular, with first and second plates of multiple cells arranged to form respective first and second checkered patterns for the array.

2. 发明申请

WO2012166897A2 WIDE BANDWIDTH CLASS C AMPLIFIER WITH COMMON-MODE FEEDBACK 审中-公开
标题翻译：带通用模式反馈的宽带级C放大器
公开(公告)号：WO2012166897A2
公开(公告)日：2012-12-06
申请号：PCT/US2012/040178
申请日：2012-05-31
申请人： TEXAS INSTRUMENTS INCORPORATED , TEXAS INSTRUMENTS JAPAN LIMITED , GINSBURG, Brian, P. , RENTALA, Vijay, B. , RAMASWAMY, Srinath , HAROUN, Baher , SEOK, Eunyoung
发明人： GINSBURG, Brian, P. , RENTALA, Vijay, B. , RAMASWAMY, Srinath , HAROUN, Baher , SEOK, Eunyoung
CPC分类号： H03F3/45179 , H03F3/45645 , H03F2200/462 , H03F2203/45306 , H03F2203/45418 , H03F2203/45424 , H03F2203/45431 , H03F2203/45442 , H03F2203/45446 , H03F2203/45696 , H03F2203/45702
摘要： In a class C amplifier (100), a common-mode current is applied to a common-gate amplifier (100) and the common-mode current is sensed. In response to the sensed common-mode current, a control voltage is generated. A first feedback current (FBI) generated in response to the control voltage is applied to a differential ground of the common-gate amplifier (110) if the common- mode current is less than a predetermined threshold. Additionally, a second feedback current (FB2) generated in response to the control voltage is applied to input terminals (IN) of the common-gate amplifier (110) if the common-mode current is greater than the predetermined threshold.
摘要翻译：在C类放大器（100）中，共模电流被施加到共门放大器（100），并感测到共模电流。响应感测的共模电流，产生控制电压。如果共模电流小于预定阈值，则响应于控制电压产生的第一反馈电流（FBI）被施加到共栅放大器（110）的差分接地。另外，如果共模电流大于预定阈值，则响应于控制电压产生的第二反馈电流（FB2）被施加到共门放大器（110）的输入端（IN）。

3. 发明申请

WO2013016536A2 CROSS-LOOP ANTENNA 审中-公开
标题翻译：交叉天线
公开(公告)号：WO2013016536A2
公开(公告)日：2013-01-31
申请号：PCT/US2012/048342
申请日：2012-07-26
申请人： TEXAS INSTRUMENTS INCORPORATED , TEXAS INSTRUMENTS JAPAN LIMITED , SEOK, Eunyoung , RAMASWAMY, Srinath , GINSBURG, Brian, P. , RENTALA, Vijay, B. , HAROUN, Baher
发明人： SEOK, Eunyoung , RAMASWAMY, Srinath , GINSBURG, Brian, P. , RENTALA, Vijay, B. , HAROUN, Baher
IPC分类号： H01Q7/00
CPC分类号： H01L31/08 , H01L2224/73204 , H05K3/3436 , H05K2201/10098
摘要： An antenna is contained within a package (104) that is secured to an integrated circuit (IC 106) (which allows radiation to propagated away for a printed circuit board (PCB) so as to reduce interference), and this antenna includes two loop antennas that are shorted to ground and that "overlap" and includes a "via wall." The IC 106 has a protective overcoat (406) that covers the IC), including metallization layer 404 and IC substrate 402, and stud bumps (302-1) are secured between the IC and antenna package (104). The antenna package (104) can then be secured to the PCB. With the disclosed configuration, circular polarization can be achieved by varying the relative phases of the input signals, and the "via wall" improves efficiency by reducing surface waves.
摘要翻译：天线包含在固定到集成电路（IC 106）的封装（104）内（其允许辐射传播到印刷电路板（PCB）以减少干扰），并且该天线包括两个环形天线它们与地面短路，并且“重叠”，并包括“通孔墙”。 IC 106具有覆盖IC的保护外涂层（406），包括金属化层404和IC基板402，并且柱状突起（302-1）固定在IC和天线封装（104）之间。然后可以将天线封装（104）固定到PCB。利用所公开的配置，可以通过改变输入信号的相对相位来实现圆偏振，并且“通孔壁”通过减小表面波来提高效率。

4. 发明申请

WO2013016293A9 LOOP ANTENNA 审中-公开
公开(公告)号：WO2013016293A9
公开(公告)日：2013-01-31
申请号：PCT/US2012/047868
申请日：2012-07-23
申请人： TEXAS INSTRUMENTS INCORPORATED , TEXAS INSTRUMENTS JAPAN LIMITED , SEOK, Eunyoung , GINSBURG, Brian, P. , HAROUN, Baher , RAMASWAMY, Srinath , RENTALA, Vijay, B.
发明人： SEOK, Eunyoung , GINSBURG, Brian, P. , HAROUN, Baher , RAMASWAMY, Srinath , RENTALA, Vijay, B.
IPC分类号： H01Q7/00
摘要： A loop antenna (206) is provided. The apparatus comprises a substrate (302), a first metallization layer (308), and a second metallization layer. The substrate has first and second feed terminals and a ground terminal. The first metallization layer is disposed over the substrate and includes a first window conductive region (408), a first conductive region (404), a second conductive region (406), and a third conductive region (402). The first conductive region (404) is disposed over and is in electrical contact with the first feed terminal (310-1); it is also is substantially circular and located within the first window region (408). The second conductive region (406) is disposed over and is in electrical contact with the second feed terminal (310-2); it is also substantially circular and is located within the first window region (408). The third conductive region (402) is disposed over and is in electrical contact with the ground terminal, and the third conductive region (402) substantially surrounds the first window region (408). The second metallization layer is disposed over and is in electrical contact with the first, second, and third conductive regions (404, 406, 402) of the first metallization layer (308), and the second metallization layer includes a second window region that is at least partially aligned with the first window region.

5. 发明申请

WO2012158993A2 FEEDFORWARD ACTIVE DECOUPLING 审中-公开
标题翻译：主动拆卸
公开(公告)号：WO2012158993A2
公开(公告)日：2012-11-22
申请号：PCT/US2012/038486
申请日：2012-05-18
申请人： TEXAS INSTRUMENTS INCORPORATED , TEXAS INSTRUMENTS JAPAN LIMITED , GINSBURG, Brian, P. , RENTALA, Vijay, B. , RAMASWAMY, Srinath , HAROUN, Baher , SEOK, Eunyoung
发明人： GINSBURG, Brian, P. , RENTALA, Vijay, B. , RAMASWAMY, Srinath , HAROUN, Baher , SEOK, Eunyoung
CPC分类号： G06F1/26 , H03F1/305 , H03F3/195 , H03F3/72 , H03F2200/294 , H03F2200/453 , H03F2200/456 , H03F2200/459 , H03F2203/7215
摘要： Apparatus and methods are provided to compensate for parasitic inductances and resistance (such as from package bonding wires) that affect current in duty cycle systems, such as low noise amplifiers (LNAs), that have large varying current consumption. A boost circuit supplies current from a supply VBSTDC to compensate for voltage changes due to a package inductance 204 and resistive voltage drops. To accomplish this, a replica circuit (i.e., transistor Q2) is able to source a current from current source 206-1 (which can be a generally constant current source) that is a replica IRPL of the current ICKT sourced by the input circuit (i.e., LNA 108).
摘要翻译：提供装置和方法来补偿影响具有大变化电流消耗的占空比系统（例如低噪声放大器（LNA））中的电流的寄生电感和电阻（例如来自封装接合线）。升压电路从电源VBSTDC提供电流以补偿由于封装电感204和电阻性电压降引起的电压变化。为了实现这一点，复制电路（即，晶体管Q2）能够从电流源206-1（其可以是大体上恒定的电流源）获得电流，该电流源是由输入电路来源的当前ICKT的副本IRPL（即LNA 108）。

6. 发明申请

WO2020139778A1 ULTRASONIC ECHO PROCESSING IN PRESENCE OF DOPPLER SHIFT 审中-公开
公开(公告)号：WO2020139778A1
公开(公告)日：2020-07-02
申请号：PCT/US2019/068037
申请日：2019-12-20
申请人： TEXAS INSTRUMENTS INCORPORATED , TEXAS INSTRUMENTS JAPAN LIMITED
发明人： DING, Lei , RAMASWAMY, Srinath , DABAK, Anand
IPC分类号： G01S15/52
摘要： An ultrasound detect circuit (210) includes a decimator (314) that decimates a transmit signal to be transmitted through an ultrasonic transducer. The transmit signal is decimated to generate first and second template signals. The decimator (314) uses a different decimation ratio to generate the first template signal than the second template signal. The circuit (210) also includes a first correlator (306) to correlate a signal derived from the ultrasonic transducer with the first template signal, a second correlator (308) to correlate the signal derived from the ultrasonic transducer with the second template signal, and a Doppler shift determination circuit (325) to determine a Doppler frequency shift based on an output from the first correlator (306) and an output from the second correlator (308).

7. 发明申请

WO2017219037A2 HIGH BANDWIDTH HALL SENSOR 审中-公开
标题翻译：高带宽霍尔传感器
公开(公告)号：WO2017219037A2
公开(公告)日：2017-12-21
申请号：PCT/US2017/038180
申请日：2017-06-19
申请人： TEXAS INSTRUMENTS INCORPORATED , TEXAS INSTRUMENTS JAPAN LIMITED
发明人： POLLEY, Arup , RAMASWAMY, Srinath , HAROUN, Baher, S. , MUKHOPADHYAY, Rajarshi
IPC分类号： G01R33/00 , G01R33/07
CPC分类号： G01R33/0029 , G01R33/075 , H03F3/38 , H03F3/45995
摘要： In described examples, a high bandwidth Hall sensor (500) includes a high bandwidth path (510, 530, 550, 560) and a low bandwidth path (520, 540). The relatively high offset (from sensor offset) of the high bandwidth path (510, 530, 550, 560) is estimated using a relatively low offset generated by the low bandwidth path (520, 540). The relatively high offset of the high bandwidth path (510, 530, 550, 560) is substantially reduced by combining (570) the output of the high bandwidth path (510, 530, 550, 560) with the output of the low bandwidth path (520, 540) to generate a high bandwidth, low offset output. The offset can be further reduced by including transimpedance amplifiers (540) in the high bandwidth sensors to optimize the frequency response of high bandwidth Hall sensor (500).
摘要翻译：在所描述的示例中，高带宽霍尔传感器（500）包括高带宽路径（510,530,550,560）和低带宽路径（520,540）。使用由低带宽路径（520,540）产生的相对低的偏移来估计高带宽路径（510,530,550,560）的相对高的偏移量（来自传感器偏移量）。通过组合（570）高带宽路径（510,530,550,560）的输出与低带宽路径（510,530,550,560）的输出来大幅减少高带宽路径（510,530,550,560）的相对高偏移（520,540）以产生高带宽，低偏移输出。通过在高带宽传感器中包括互阻抗放大器（540）以优化高带宽霍尔传感器（500）的频率响应，可以进一步降低偏移。

8. 发明申请

WO2017219037A3 HIGH BANDWIDTH HALL SENSOR 审中-公开
公开(公告)号：WO2017219037A3
公开(公告)日：2017-12-21
申请号：PCT/US2017/038180
申请日：2017-06-19
申请人： TEXAS INSTRUMENTS INCORPORATED , TEXAS INSTRUMENTS JAPAN LIMITED
发明人： POLLEY, Arup , RAMASWAMY, Srinath , HAROUN, Baher, S. , MUKHOPADHYAY, Rajarshi
IPC分类号： G01R33/07 , H03F3/45
摘要： In described examples, a high bandwidth Hall sensor (500) includes a high bandwidth path (510, 530, 550, 560) and a low bandwidth path (520, 540). The relatively high offset (from sensor offset) of the high bandwidth path (510, 530, 550, 560) is estimated using a relatively low offset generated by the low bandwidth path (520, 540). The relatively high offset of the high bandwidth path (510, 530, 550, 560) is substantially reduced by combining (570) the output of the high bandwidth path (510, 530, 550, 560) with the output of the low bandwidth path (520, 540) to generate a high bandwidth, low offset output. The offset can be further reduced by including transimpedance amplifiers (540) in the high bandwidth sensors to optimize the frequency response of high bandwidth Hall sensor (500).

9. 发明申请

WO2017106831A1 MISMATCH CORRECTION OF ATTENUATION CAPACITOR IN A SAR ADC 审中-公开
标题翻译： SAR ADC衰减电容器的不匹配校正
公开(公告)号：WO2017106831A1
公开(公告)日：2017-06-22
申请号：PCT/US2016/067505
申请日：2016-12-19
申请人： TEXAS INSTRUMENTS INCORPORATED , TEXAS INSTRUMENTS JAPAN LIMITED
发明人： LEE, Seung, Bae , SHARMA, Ajit , RAMASWAMY, Srinath
IPC分类号： H03M1/06 , H03M1/10
CPC分类号： H03M1/1061 , H03M1/468 , H03M1/687
摘要： In described examples, a multi-segment capacitive successive approximation analog to digital converter (SAR ADC) is calibrated by determining an error voltage (702) for each of a plurality of most significant bit (MSB) capacitors in a first segment using a calibration DAC. The first segment is connected to the second segment by an attenuation capacitor. Each of the error voltages corresponding to the MSB capacitors is digitized (704) to form a set of digitized error voltages. An error voltage for each of a plurality of less significant bit (LSB) capacitors in at least the second segment is calculated (706) by summing the set of digitized error voltages to form a sum of error voltages (sum(e)) and assigning a percentage of sum(e) as the error voltage for each of the LSB capacitors, such that a mismatch in the attenuation capacitor is mitigated.
摘要翻译：在所描述的示例中，通过为多个最高有效位（MSB）电容器中的每一个确定误差电压（702）来校准多段电容逐次逼近模数转换器（SAR ADC）在使用校准DAC的第一段中。第一段通过衰减电容器连接到第二段。对应于MSB电容器的每个误差电压被数字化（704）以形成一组数字化的误差电压。至少在第二段中的多个较低有效位（LSB）电容器中的每一个的误差电压通过对该组数字化误差电压进行求和以形成误差电压的总和（sum（e））和分配（e）的百分比作为每个LSB电容器的误差电压，从而减轻衰减电容器中的失配。

10. 发明申请

WO2016179309A1 ERROR CORRECTION CODE MANAGEMENT OF WRITE-ONCE MEMORY CODES 审中-公开
标题翻译：一般存储器代码的错误校正代码管理
公开(公告)号：WO2016179309A1
公开(公告)日：2016-11-10
申请号：PCT/US2016/030822
申请日：2016-05-04
申请人： TEXAS INSTRUMENTS INCORPORATED , TEXAS INSTRUMENTS JAPAN LIMITED
发明人： ZHANG, Sai , ZHU, Yuming , BITTLESTONE, Clive , RAMASWAMY, Srinath
IPC分类号： G06F11/08 , G11C29/52 , H03M13/00
CPC分类号： G06F11/08 , G06F3/0619 , G06F3/064 , G06F3/0673 , G06F11/1004 , G06F11/1016 , G06F11/1048 , G06F11/1072 , G06F11/1076 , G06F12/0246 , G11C29/52 , H03M13/13
摘要： In described examples, a system for error correction code (ECC) management of write-once memory (WOM) codes includes a host processor arranged to send a data word that is to be stored in a WOM (write-only memory) device. A host interface is arranged to receive (710) the first data word for processing by a WOM controller and an ECC controller. The WOM controller is for generating (720) a first WOM-encoded word in response to an original symbol of the first data word, while the ECC controller is for generating (730) a first set of ECC bits in response to the original symbol of the first data word. A memory device interface is for writing (740) the first WOM-encoded word and the first set of ECC bits to the WOM device in accordance with the memory address associated with the first data word.
摘要翻译：在所描述的示例中，一次写入存储器（WOM）代码的纠错码（ECC）管理系统包括主机处理器，其被布置为发送要存储在WOM（只写存储器）设备中的数据字。主机接口被布置为接收（710）第一数据字以供WOM控制器和ECC控制器处理。 WOM控制器用于响应于第一数据字的原始符号产生（720）第一WOM编码字，而ECC控制器用于响应于原始符号的第一组ECC位产生（730）第一组ECC位第一个数据字。存储器件接口用于根据与第一数据字相关联的存储器地址将第一WOM编码字和第一组ECC位写入（740）到WOM器件。

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