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    • 1. 发明申请
    • ALL OPTICAL PROCESSING CIRCUIT FOR CONFLICT RESOLUTION AND SWITCH CONFIGURATION IN A 2X2 OPTICAL NODE
    • 所有用于2X2光学节点中的冲突分辨率和开关配置的光学处理电路
    • WO2008131802A1
    • 2008-11-06
    • PCT/EP2007/054234
    • 2007-05-01
    • TELEFONAKTIEBOLAGET LM ERICSSON (PUBL)BOGONI, AntonellaPOTI, LucaSCAFFARDI, Micro
    • BOGONI, AntonellaPOTI, LucaSCAFFARDI, Micro
    • H04Q11/00
    • H04Q11/0005G02F3/00H04Q11/0066H04Q2011/0015H04Q2011/002H04Q2011/0039H04Q2011/0041H04Q2011/005H04Q2011/0052H04Q2011/0058
    • An optical processing circuit, such as a combinatorial network, comprises an arrangement of optical logic gates suitable for use in combination with a switched optical node of the kind having at least first and second input ports and two output ports, the node being configurable into either a cross or a bar configuration, and in which the optical processing circuit is arranged so as to receive at least three optical input signals which respectively comprise a packet identifier signal PIH which identifies whether or not a first input signal is present at the first input port of the switched optical node, the first input port being assigned a higher priority than the second input port, a first destination address AH indicating the output port of the switched optical node to which a first information carrying signal, received at the first input port, is intended to be passed, and a second destination address AL indicating the output port of the switched optical node to which a second information carrying signal, received at the second input port, is intended to be passed, and in which the processing circuit is configured to generate from these three optical input signals the following optical output signals: a contention resolution control (CRC) signal which has a first value if a routing conflict is present and a second if it is not; and a switch control generation (SCG) signal indicating whether the associated switched optical node is to be set in a cross or bar configuration.
    • 诸如组合网络的光学处理电路包括适于与具有至少第一和第二输入端口和两个输出端口的类型的交换光学节点组合使用的光学逻辑门的布置,该节点可配置为 交叉或条形配置,并且其中所述光学处理电路被布置为接收至少三个光学输入信号,所述至少三个光学输入信号分别包括分组标识符信号PIH,所述分组标识符信号表示第一输入信号是否存在于所述第一输入端口 所述第一输入端口被分配比所述第二输入端口更高的优先级;第一目的地地址AH,其指示在所述第一输入端口处接收到的第一信息携带信号的所述交换光节点的输出端口, 以及第二目的地地址AL,其指示切换的光节点的输出端口,其中具有第二信息 旨在通过在第二输入端口接收的定位承载信号,并且其中处理电路被配置为从这三个光学输入信号产生以下光学输出信号:竞争解决控制(CRC)信号,其具有 如果存在路由冲突,则为第一个值,如果不存在路由冲突则为第二个值; 以及指示是否将相关联的交换光节点设置为交叉或条形配置的开关控制产生(SCG)信号。
    • 3. 发明申请
    • ALL OPTICAL LOGIC GATE IMPLEMENTING NOR FUNCTION AND CASCADED NOR/AND FUNCTION
    • 所有光学逻辑门实现非功能和非标准功能
    • WO2008131803A1
    • 2008-11-06
    • PCT/EP2007/054235
    • 2007-05-01
    • TELEFONAKTIEBOLAGET LM ERICSSON (PUBL)BOGONI, AntonellaPOTI, LucaSCAFFARDI, Micro
    • BOGONI, AntonellaPOTI, LucaSCAFFARDI, Micro
    • G02F3/00
    • G02F3/00G02F2203/70
    • An optical logic element arranged to combine two input signals A and B and provide an output 'signal out comprise a semiconductor optical amplifier (SOA) having a first end and a second end, a first input port (100) connected to a first end of the SOA for receiving the first input signal A, a second input port (101) also connected to the first end of the SOA for receiving the second input signal B, a third input port (105) connected to the second, opposite, end of the SOA for receiving and optional counter propagating CW signal, a fourth input port (102) also connected to the second end of the SOA for receiving a probe signal, and an output port (1-4) connected to the first end of the SOA which receives an output signal from the first end of the SOA, which signal when read during the application of the probe signal is representative of the logical output C of the logic gate.
    • 布置成组合两个输入信号A和B并提供输出信号的光逻辑元件包括具有第一端和第二端的半导体光放大器(SOA),第一输入端口(100),连接到第一端 用于接收第一输入信号A的SOA,还连接到用于接收第二输入信号B的SOA的第一端的第二输入端口(101),连接到第二输入端 用于接收的SOA和可选的反传播CW信号,还连接到用于接收探测信号的SOA的第二端的第四输入端口(102)以及连接到SOA的第一端的输出端口(1-4) 其接收来自SOA的第一端的输出信号,当在探测信号的应用期间读取信号时,该信号代表逻辑门的逻辑输出C.