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1. 发明申请

WO2010067698A1 THIN FILM TRANSISTOR AND DISPLAY DEVICE 审中-公开
标题翻译：薄膜晶体管和显示器件
公开(公告)号：WO2010067698A1
公开(公告)日：2010-06-17
申请号：PCT/JP2009/069752
申请日：2009-11-17
申请人： SEMICONDUCTOR ENERGY LABORATORY CO., LTD. , GODO, Hiromichi , KOBAYASHI, Satoshi , MIYAIRI, Hidekazu , ISA, Toshiyuki , YAMAZAKI, Shunpei
发明人： GODO, Hiromichi , KOBAYASHI, Satoshi , MIYAIRI, Hidekazu , ISA, Toshiyuki , YAMAZAKI, Shunpei
IPC分类号： H01L29/786
CPC分类号： H01L29/78696 , H01L27/12 , H01L29/04
摘要： Off current of a bottom gate thin film transistor in which a semiconductor layer is shielded from light by a gate electrode is reduced. A thin film transistor includes a gate electrode layer; a first semiconductor layer; a second semiconductor layer, provided on and in contact with the first semiconductor layer; a gate insulating layer between and in contact with the gate electrode layer and the first semiconductor layer; impurity semiconductor layers in contact with the second semiconductor layer; and source and drain electrode layers partially in contact with the impurity semiconductor layers and the first and second semiconductor layers. The entire surface of the first semiconductor layer on the gate electrode layer side is covered by the gate electrode layer; and a potential barrier at a portion where the first semiconductor layer is in contact with the source or drain electrode layer is 0.5 eV or more.
摘要翻译：其中半导体层被栅极电极遮挡光的底栅薄膜晶体管的截止电流减小。薄膜晶体管包括栅电极层; 第一半导体层; 第二半导体层，设置在第一半导体层上并与第一半导体层接触; 在栅极电极层和第一半导体层之间并与之接触的栅极绝缘层; 与第二半导体层接触的杂质半导体层; 以及与杂质半导体层和第一和第二半导体层部分接触的源极和漏极电极层。栅极电极层侧的第一半导体层的整个表面被栅电极层覆盖; 并且在第一半导体层与源极或漏极电极层接触的部分处的势垒为0.5eV以上。

2. 发明申请

WO2009157574A1 THIN FILM TRANSISTOR 审中-公开
标题翻译：薄膜晶体管
公开(公告)号：WO2009157574A1
公开(公告)日：2009-12-30
申请号：PCT/JP2009/061795
申请日：2009-06-22
申请人： SEMICONDUCTOR ENERGY LABORATORY CO., LTD. , ISA, Toshiyuki , JINBO, Yasuhiro , TEZUKA, Sachiaki , DAIRIKI, Koji , MIYAIRI, Hidekazu , YAMAZAKI, Shunpei , HIROHASHI, Takuya
发明人： ISA, Toshiyuki , JINBO, Yasuhiro , TEZUKA, Sachiaki , DAIRIKI, Koji , MIYAIRI, Hidekazu , YAMAZAKI, Shunpei , HIROHASHI, Takuya
IPC分类号： H01L21/336 , H01L29/786
CPC分类号： H01L27/1288 , H01L27/1214 , H01L29/04 , H01L29/66765 , H01L29/78696
摘要： A thin film transistor includes, as a buffer layer, a semiconductor layer which contains nitrogen and includes crystal regions in an amorphous structure between a gate insulating layer and source and drain regions, at least on the source and drain regions side. As compared to a thin film transistor in which an amorphous semiconductor is included in a channel formation region, on-current of a thin film transistor can be increased. In addition, as compared to a thin film transistor in which a microcrystalline semiconductor is included in a channel formation region, off-current of a thin film transistor can be reduced.
摘要翻译：至少在源区和漏区侧，薄膜晶体管包括作为缓冲层的半导体层，该半导体层含有氮并且包括在栅极绝缘层和源极和漏极区之间的非晶结构中的晶体区域。与在沟道形成区域中包含非晶半导体的薄膜晶体管相比，可以提高薄膜晶体管的导通电流。此外，与在沟道形成区域中包含微晶半导体的薄膜晶体管相比，可以减小薄膜晶体管的截止电流。

3. 发明申请

WO2009157573A1 THIN FILM TRANSISTOR, SEMICONDUCTOR DEVICE AND ELECTRONIC DEVICE 审中-公开
标题翻译：薄膜晶体管，半导体器件和电子器件
公开(公告)号：WO2009157573A1
公开(公告)日：2009-12-30
申请号：PCT/JP2009/061794
申请日：2009-06-22
申请人： SEMICONDUCTOR ENERGY LABORATORY CO., LTD. , ISA, Toshiyuki , JINBO, Yasuhiro , TEZUKA, Sachiaki , DAIRIKI, Koji , MIYAIRI, Hidekazu , YAMAZAKI, Shunpei
发明人： ISA, Toshiyuki , JINBO, Yasuhiro , TEZUKA, Sachiaki , DAIRIKI, Koji , MIYAIRI, Hidekazu , YAMAZAKI, Shunpei
IPC分类号： H01L29/786 , H01L21/336
CPC分类号： H01L27/1288 , H01L27/1214 , H01L29/04 , H01L29/66765 , H01L29/78696
摘要： A thin film transistor includes, as a buffer layer, an amorphous semiconductor layer having nitrogen or an NH group between a gate insulating layer and source and drain regions and at least on the source and drain regions side. As compared to a thin film transistor in which an amorphous semiconductor is included in a channel formation region, on-current of a thin film transistor can be increased. In addition, as compared to a thin film transistor in which a microcrystalline semiconductor is included in a channel formation region, off-current of a thin film transistor can be reduced.
摘要翻译：薄膜晶体管包括作为缓冲层的至少在源极和漏极区域上具有氮或NH基的非晶半导体层，栅极绝缘层与源极和漏极区之间。与在沟道形成区域中包含非晶半导体的薄膜晶体管相比，可以提高薄膜晶体管的导通电流。此外，与在沟道形成区域中包含微晶半导体的薄膜晶体管相比，可以减小薄膜晶体管的截止电流。

4. 发明申请

WO2009060922A1 THIN FILM TRANSISTOR AND DISPLAY DEVICE HAVING THE THIN FILM TRANSISTOR 审中-公开
标题翻译：薄膜晶体管和具有薄膜晶体管的显示器件
公开(公告)号：WO2009060922A1
公开(公告)日：2009-05-14
申请号：PCT/JP2008/070254
申请日：2008-10-30
申请人： SEMICONDUCTOR ENERGY LABORATORY CO., LTD. , YAMAZAKI, Shunpei , KOBAYASHI, Satoshi , KUROKAWA, Yoshiyuki , GODO, Hiromichi
发明人： YAMAZAKI, Shunpei , KOBAYASHI, Satoshi , KUROKAWA, Yoshiyuki , GODO, Hiromichi
IPC分类号： H01L29/786
CPC分类号： H01L29/04 , H01L21/02532 , H01L21/0262 , H01L29/41733 , H01L29/66765 , H01L29/78696
摘要： A thin film transistor includes a gate electrode, a gate insulating layer covering the gate electrode, a microcrystalline semiconductor layer over the gate insulating layer, an amorphous semiconductor layer over the microcrystalline semiconductor layer, source and drain regions over the amorphous semiconductor layer, source and drain electrodes in contact with and over the source and drain regions, and a part of the amorphous semiconductor layer overlapping with the source and drain regions is thicker than a part of the amorphous semiconductor layer overlapping with a channel formation region. The side face of the source and drain regions and the side face of the amorphous semiconductor form a tapered shape together with an outmost surface of the amorphous semiconductor layer. The taper angle of the tapered shape is such an angle that decrease electric field concentration around a junction portion between the source and drain regions and the amorphous semiconductor layer.
摘要翻译：薄膜晶体管包括栅电极，覆盖栅电极的栅极绝缘层，栅极绝缘层上的微晶半导体层，微晶半导体层上的非晶半导体层，非晶半导体层上的源极和漏极区，源极和与源极和漏极区域接触和超过的漏极电极，与源极和漏极区域重叠的部分非晶半导体层比与沟道形成区域重叠的非晶半导体层的一部分更厚。源极和漏极区域的侧面和非晶半导体的侧面与非晶半导体层的最外表面一起形成锥形形状。锥形形状的锥角是减小源极和漏极区域与非晶半导体层之间的接合部周围的电场浓度的角度。

5. 发明申请

WO2010058746A1 SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF 审中-公开
标题翻译：半导体器件及其制造方法
公开(公告)号：WO2010058746A1
公开(公告)日：2010-05-27
申请号：PCT/JP2009/069407
申请日：2009-11-09
申请人： SEMICONDUCTOR ENERGY LABORATORY CO., LTD. , MIYAIRI, Hidekazu , OSADA, Takeshi , YAMAZAKI, Shunpei
发明人： MIYAIRI, Hidekazu , OSADA, Takeshi , YAMAZAKI, Shunpei
IPC分类号： H01L29/786 , G02F1/1345 , G02F1/1368 , H01L21/28 , H01L29/417 , H01L29/423 , H01L29/49 , H01L51/50
CPC分类号： H01L27/1225 , G02F1/1362 , H01L27/124 , H01L27/1251 , H01L27/1255 , H01L27/3262 , H01L29/42384 , H01L29/4908 , H01L29/78606 , H01L29/78645 , H01L29/78648 , H01L29/7869
摘要： As a display device has higher definition, the number of pixels is increased and thus, the number of gate lines and signal lines is increased. When the number of gate lines and signal lines is increased, it is difficult to mount IC chips including driver circuits for driving the gate lines and the signal lines by bonding or the like, whereby manufacturing cost is increased. A pixel portion and a driver circuit for driving the pixel portion are provided on the same substrate, and at least part of the driver circuit comprises a thin film transistor including an oxide semiconductor sandwiched between gate electrodes. A channel protective layer is provided between the oxide semiconductor and a gate electrode provided over the oxide semiconductor. The pixel portion and the driver circuit are provided on the same substrate, which leads to reduction of manufacturing cost.
摘要翻译：由于显示装置具有更高的清晰度，因此像素数量增加，因此栅极线和信号线的数量增加。当栅极线和信号线的数量增加时，难以通过结合等安装包括用于驱动栅极线和信号线的驱动电路的IC芯片，由此增加制造成本。用于驱动像素部分的像素部分和驱动电路设置在同一基板上，并且驱动电路的至少一部分包括薄膜晶体管，该薄膜晶体管包括夹在栅电极之间的氧化物半导体。在氧化物半导体和设置在氧化物半导体上的栅电极之间设置沟道保护层。像素部分和驱动电路设置在相同的基板上，这导致制造成本的降低。

6. 发明申请

WO2010047217A1 SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME 审中-公开
标题翻译：半导体器件及其制造方法
公开(公告)号：WO2010047217A1
公开(公告)日：2010-04-29
申请号：PCT/JP2009/067289
申请日：2009-09-28
申请人： SEMICONDUCTOR ENERGY LABORATORY CO., LTD. , MIYAIRI, Hidekazu , OSADA, Takeshi , YAMAZAKI, Shunpei
发明人： MIYAIRI, Hidekazu , OSADA, Takeshi , YAMAZAKI, Shunpei
IPC分类号： H01L29/786 , G02F1/1345 , G02F1/1368 , H01L51/50
CPC分类号： H01L29/7869 , H01L21/02565 , H01L21/47635 , H01L21/477 , H01L27/1225 , H01L27/1251 , H01L27/1259 , H01L29/24 , H01L29/41733 , H01L29/42356 , H01L29/42384 , H01L29/45 , H01L29/66969 , H01L29/78621 , H01L29/78645 , H01L29/78648
摘要： As a display device has a higher definition, the number of pixels, gate lines, and signal lines are increased. When the number of the gate lines and the signal lines are increased, a problem of higher manufacturing cost, because it is difficult to mount an IC chip including a driver circuit for driving of the gate and signal lines by bonding or the like. A pixel portion and a driver circuit for driving the pixel portion are provided over the same substrate, and at least part of the driver circuit includes a thin film transistor using an oxide semiconductor interposed between gate electrodes provided above and below the oxide semiconductor. Therefore, when the pixel portion and the driver portion are provided over the same substrate, manufacturing cost can be reduced.
摘要翻译：作为显示装置具有更高的清晰度，像素数，栅极线和信号线的数量增加。当栅极线和信号线的数量增加时，由于难以通过接合等安装包括用于驱动栅极和信号线的驱动电路的IC芯片，所以制造成本更高。用于驱动像素部分的像素部分和驱动电路设置在相同的基板上，驱动电路的至少一部分包括薄膜晶体管，该薄膜晶体管使用介于氧化物半导体上方和下方的栅电极之间的氧化物半导体。因此，当像素部分和驱动器部分设置在相同的基板上时，可以降低制造成本。

7. 发明申请

WO2011068022A1 SEMICONDUCTOR DEVICE 审中-公开
标题翻译：半导体器件
公开(公告)号：WO2011068022A1
公开(公告)日：2011-06-09
申请号：PCT/JP2010/070161
申请日：2010-11-05
申请人： SEMICONDUCTOR ENERGY LABORATORY CO., LTD. , YAMAZAKI, Shunpei , TSUJI, Takahiro , OCHIAI, Teruaki , KUSUNOKI, Koji , MIYAIRI, Hidekazu
发明人： YAMAZAKI, Shunpei , TSUJI, Takahiro , OCHIAI, Teruaki , KUSUNOKI, Koji , MIYAIRI, Hidekazu
IPC分类号： H01L29/786 , G02F1/1368 , H01L21/28 , H01L21/336 , H01L29/417
CPC分类号： H01L29/7869 , H01L29/45
摘要： An object is to provide a highly reliable transistor and a semiconductor device including the transistor. A semiconductor device including a gate electrode; a gate insulating film over the gate electrode; an oxide semiconductor film over the gate insulating film; and a source electrode and a drain electrode over the oxide semiconductor film, in which activation energy of the oxide semiconductor film obtained from temperature dependence of a current (on-state current) flowing between the source electrode and the drain electrode when a voltage greater than or equal to a threshold voltage is applied to the gate electrode is greater than or equal to 0 meV and less than or equal to 25 meV, is provided.
摘要翻译：目的是提供一种高度可靠的晶体管和包括晶体管的半导体器件。一种包括栅电极的半导体器件; 栅电极上的栅极绝缘膜; 栅极绝缘膜上的氧化物半导体膜; 以及氧化物半导体膜上方的源电极和漏电极，其中，当电压大于电压时，源电极和漏电极之间的电流（导通电流）的温度依赖性获得氧化物半导体膜的活化能或等于施加到栅电极的阈值电压大于或等于0meV且小于或等于25meV。

8. 发明申请

WO2011068016A1 SEMICONDUCTOR DEVICE 审中-公开
标题翻译：半导体器件
公开(公告)号：WO2011068016A1
公开(公告)日：2011-06-09
申请号：PCT/JP2010/070061
申请日：2010-11-04
申请人： SEMICONDUCTOR ENERGY LABORATORY CO., LTD. , YAMAZAKI, Shunpei , KAWAE, Daisuke , GODO, Hiromichi
发明人： YAMAZAKI, Shunpei , KAWAE, Daisuke , GODO, Hiromichi
IPC分类号： H01L29/786 , H01L21/28 , H01L21/8238 , H01L27/08 , H01L27/092 , H01L29/417
CPC分类号： H01L29/45 , H01L27/1225 , H01L29/7869
摘要： One object is to provide a p-channel transistor including an oxide semiconductor. Another object is to provide a complementary metal oxide semiconductor (CMOS) structure of an n-channel transistor including an oxide semiconductor and a p-channel transistor including an oxide semiconductor. A p-channel transistor including an oxide semiconductor includes a gate electrode layer, a gate insulating layer, an oxide semiconductor layer, and a source and drain electrode layers in contact with the oxide semiconductor layer. When the electron affinity and the band gap of an oxide semiconductor used for the oxide semiconductor layer in the semiconductor device, respectively, are ϰ (eV) and E g (eV), the work function ( ϕ m ) of the conductor used for the source electrode layer and the drain electrode layer satisfies ϕ m >ϰ+E g /2 and the barrier for holes ( ϕ Bp ) represented by ( ϰ+E g - ϕ m ) is less than 0.25 eV.
摘要翻译：一个目的是提供一种包括氧化物半导体的p沟道晶体管。另一个目的是提供包括氧化物半导体的n沟道晶体管和包括氧化物半导体的p沟道晶体管的互补金属氧化物半导体（CMOS）结构。包括氧化物半导体的p沟道晶体管包括与氧化物半导体层接触的栅极电极层，栅极绝缘层，氧化物半导体层以及源极和漏极电极层。当半导体器件中用于氧化物半导体层的氧化物半导体的电子亲和力和带隙分别为（eV）和Eg（eV）时，用于源电极层和漏电极层的导体的功函数（Δm）满足θ m +β+ Eg / 2，由（α+ Eg-Δm）表示的空穴阻挡层（ΔBp）小于0.25eV。

9. 发明申请

WO2012102182A1 SEMICONDUCTOR DEVICE 审中-公开
标题翻译：半导体器件
公开(公告)号：WO2012102182A1
公开(公告)日：2012-08-02
申请号：PCT/JP2012/051136
申请日：2012-01-13
申请人： SEMICONDUCTOR ENERGY LABORATORY CO., LTD. , YAMAZAKI, Shunpei , GODO, Hiromichi
发明人： YAMAZAKI, Shunpei , GODO, Hiromichi
IPC分类号： H01L21/8242 , H01L21/8247 , H01L27/10 , H01L27/108 , H01L27/115 , H01L29/786 , H01L29/788 , H01L29/792
CPC分类号： H01L29/78 , G11C11/403 , H01L27/0688 , H01L27/10873 , H01L27/11526 , H01L27/11551 , H01L27/1156 , H01L27/1207 , H01L27/1225 , H01L28/60 , H01L29/7833
摘要： A conventional DRAM needs to be refreshed at an interval of several tens of milliseconds to hold data, which results in large power consumption. In addition, a transistor therein is frequently turned on and off; thus, deterioration of the transistor is also a problem. These problems become significant as the memory capacity increases and transistor miniaturization advances. Another problem is that an increase in memory capacity leads to an increase in the area, despite an attempt at integration through advancement of transistor miniaturization. A transistor is provided which includes an oxide semiconductor and has a trench structure including a trench for a gate electrode and a trench for element isolation. In addition, a plurality of memory elements each including the transistor having a trench structure and including an oxide semiconductor is stacked in a semiconductor device, whereby the circuit area of the semiconductor device can be reduced.
摘要翻译：需要以几十毫秒的间隔刷新常规DRAM以保持数据，这导致大的功耗。此外，其中的晶体管经常被打开和关闭; 因此，晶体管的劣化也是一个问题。随着存储器容量的增加和晶体管的小型化进一步发展，这些问题变得越来越重要。另一个问题是，尽管尝试通过提高晶体管小型化进行集成，但存储器容量的增加导致面积的增加。提供了一种晶体管，其包括氧化物半导体并且具有包括用于栅电极的沟槽和用于元件隔离的沟槽的沟槽结构。此外，在半导体器件中堆叠包括具有沟槽结构并且包括氧化物半导体的晶体管的多个存储元件，由此可以减小半导体器件的电路面积。

10. 发明申请

WO2011142371A1 SEMICONDUCTOR DEVICE 审中-公开
标题翻译：半导体器件
公开(公告)号：WO2011142371A1
公开(公告)日：2011-11-17
申请号：PCT/JP2011/060791
申请日：2011-04-28
申请人： SEMICONDUCTOR ENERGY LABORATORY CO., LTD. , YAMAZAKI, Shunpei , KATO, Kiyoshi , SHIONOIRI, Yutaka , SEKINE, Yusuke , FURUTANI, Kazuma , GODO, Hiromichi
发明人： YAMAZAKI, Shunpei , KATO, Kiyoshi , SHIONOIRI, Yutaka , SEKINE, Yusuke , FURUTANI, Kazuma , GODO, Hiromichi
IPC分类号： H01L21/8242 , G11C11/405 , H01L21/336 , H01L21/8247 , H01L27/108 , H01L27/115 , H01L29/786 , H01L29/788 , H01L29/792
CPC分类号： H01L29/7869 , G11C16/0433 , G11C16/26 , H01L27/11521 , H01L27/1156 , H01L27/1225 , H01L28/40 , H01L29/41733 , H01L29/78621
摘要： A semiconductor device including a first transistor and a second transistor and a capacitor which are over the first transistor is provided. A semiconductor layer of the second transistor includes an offset region. In the second transistor provided with an offset region, the off-state current of the second transistor can be reduced. Thus, a semiconductor device which can hold data for a long time can be provided.
摘要翻译：提供了包括在第一晶体管之上的第一晶体管和第二晶体管和电容器的半导体器件。第二晶体管的半导体层包括偏移区域。在设置有偏移区域的第二晶体管中，可以减小第二晶体管的截止电流。因此，可以提供能够长时间保持数据的半导体器件。

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