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1. 发明申请

WO2017158466A1 SEMICONDUCTOR DEVICE AND SYSTEM USING THE SAME 审中-公开
标题翻译：半导体器件和使用该器件的系统
公开(公告)号：WO2017158466A1
公开(公告)日：2017-09-21
申请号：PCT/IB2017/051281
申请日：2017-03-06
申请人： SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
发明人： KUROKAWA, Yoshiyuki
IPC分类号： G11C7/12 , G06G7/60 , G11C11/405
摘要： To provide a semiconductor device which can execute the product-sum operation. The semiconductor device includes a first memory cell, a second memory cell, and an offset circuit. First analog data is stored in the first memory cell, and reference analog data is stored in the second memory cell. The first memory cell and the second memory cell supply a first current and a second current, respectively, when a reference potential is applied as a selection signal. The offset circuit has a function of supplying a third current corresponding to a differential current between the first current and the second current. In the semiconductor device, the first memory and the second memory supply a fourth current and a fifth current, respectively, when a potential corresponding to second analog data is applied as a selection signal. By subtracting the third current from a differential current between the fourth current and the fifth current, a current that depends on the sum of products of the first analog data and the second analog data is obtained.
摘要翻译：为了提供可以执行乘积和操作的半导体器件。该半导体器件包括第一存储单元，第二存储单元和偏移电路。第一模拟数据存储在第一存储单元中，并且参考模拟数据存储在第二存储单元中。当施加参考电位作为选择信号时，第一存储单元和第二存储单元分别提供第一电流和第二电流。偏移电路具有提供与第一电流和第二电流之间的差分电流对应的第三电流的功能。在半导体器件中，当施加与第二模拟数据相对应的电势作为选择信号时，第一存储器和第二存储器分别提供第四电流和第五电流。通过从第四电流和第五电流之间的差分电流中减去第三电流，获得取决于第一模拟数据和第二模拟数据的乘积之和的电流。

2. 发明申请

WO2017153864A1 SEMICONDUCTOR DEVICE 审中-公开
标题翻译：半导体器件
公开(公告)号：WO2017153864A1
公开(公告)日：2017-09-14
申请号：PCT/IB2017/051116
申请日：2017-02-27
申请人： SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
发明人： KUROKAWA, Yoshiyuki
IPC分类号： G11C11/405 , G06F12/00 , G11C11/56
CPC分类号： G06F7/00 , G06F17/00 , G11C5/063
摘要： The circuit scale of a semiconductor device that can perform arithmetic processing of analog data is reduced. In the semiconductor device, a memory cell is configured to generate a first current corresponding to first analog data and to generate a second current corresponding to the first analog data and second analog data. A reference memory cell is configured to generate a reference current corresponding to reference data. A first circuit is configured to generate and hold a third current corresponding to the difference between the first current and the reference current when the first current is lower than the reference current. A second circuit is configured to generate and hold a fourth current corresponding to the difference between the first current and the reference current when the first current is higher than the reference current. One of the first circuit and the second circuit is configured to generate a fifth current corresponding to third analog data.
摘要翻译：能够执行模拟数据的算术处理的半导体器件的电路规模减小。在半导体器件中，存储器单元被配置为生成对应于第一模拟数据的第一电流并且生成对应于第一模拟数据和第二模拟数据的第二电流。参考存储器单元被配置为生成对应于参考数据的参考电流。第一电路被配置为当第一电流低于参考电流时，生成并保持与第一电流和参考电流之间的差相对应的第三电流。第二电路被配置为当第一电流高于参考电流时，生成并保持与第一电流和参考电流之间的差相对应的第四电流。第一电路和第二电路中的一个被配置为生成对应于第三模拟数据的第五电流。

3. 发明申请

WO2017068490A1 SEMICONDUCTOR DEVICE AND ELECTRONIC DEVICE 审中-公开
标题翻译：半导体器件和电子器件
公开(公告)号：WO2017068490A1
公开(公告)日：2017-04-27
申请号：PCT/IB2016/056240
申请日：2016-10-18
申请人： SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
发明人： KUROKAWA, Yoshiyuki
IPC分类号： G06N3/063
CPC分类号： H04N19/423 , G06N3/04 , G06T9/002 , G11C27/005 , G11C27/024 , H01L27/1225 , H01L29/24 , H01L29/78642 , H01L29/78648 , H01L29/7869 , H01L29/78696 , H04N19/43 , H04N19/527 , H04N19/543 , H04N19/90
摘要： A semiconductor device with a novel structure is provided. Input neuron circuits, hidden neuron circuits, and output neuron circuits are hierarchically connected to one another through plural synapse circuits. Each synapse circuit includes an analog memory which stores data corresponding to a connection strength between the input neuron circuit and the hidden neuron circuit or between the hidden neuron circuit and the output neuron circuit, a writing circuit which changes the data in the analog memory, and a weighting circuit which outputs an output signal obtained by weighting an input signal in accordance with data in the analog memory. The analog memory is formed using a transistor including an oxide semiconductor having extremely low off-state current. It is not necessary to mount a large-scale capacitor for holding data and to recover analog data by regular refresh operation; thus, reduction in a chip area and reduction in power consumption are possible.
摘要翻译：提供了具有新颖结构的半导体器件。输入神经元电路，隐藏神经元电路和输出神经元电路通过多个突触电路相互分层连接。每个突触电路包括：模拟存储器，其存储与输入神经元电路和隐藏神经元电路之间或隐藏神经元电路和输出神经元电路之间的连接强度对应的数据;写入电路，其改变模拟存储器中的数据;以及加权电路，其根据模拟存储器中的数据输出通过对输入信号进行加权而获得的输出信号。模拟存储器使用包括具有极低关态电流的氧化物半导体的晶体管形成。没有必要安装大容量电容器来保存数据并通过定期刷新操作来恢复模拟数据; 因此可以减小芯片面积并降低功耗。

4. 发明申请

WO2016166631A1 DECODER, RECEIVER, AND ELECTRONIC DEVICE 审中-公开
标题翻译：解码器，接收器和电子设备
公开(公告)号：WO2016166631A1
公开(公告)日：2016-10-20
申请号：PCT/IB2016/051812
申请日：2016-03-31
申请人： SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
发明人： KUROKAWA, Yoshiyuki
IPC分类号： H04N21/426 , G06F1/08 , G06F15/78 , H04N19/42 , H04N19/44
CPC分类号： H04N19/44 , H04N19/42 , H04N19/436
摘要： Power consumption of a decoder is reduced. The decoder includes an FPGA. The FPGA performs at least one processing to decode the data. In the case where the data has first resolution, an input data signal of the FPGA is a binary signal and a clock frequency of the FPGA is a first frequency. In the case where the resolution of the data is lower than the first resolution, the input data signal of the FPGA is a pulse signal and the FPGA operates at a second frequency which is lower than the first frequency. The FPGA operates at the first clock frequency in the case of decoding 8K data and the FPGA operates at the second clock frequency in the case of decoding 4K or 2K data.
摘要翻译：解码器的功耗降低。解码器包括一个FPGA。 FPGA至少执行一个处理来解码数据。在数据具有第一分辨率的情况下，FPGA的输入数据信号是二进制信号，并且FPGA的时钟频率是第一频率。在数据分辨率低于第一分辨率的情况下，FPGA的输入数据信号是脉冲信号，并且FPGA以低于第一频率的第二频率操作。在解码8K数据的情况下，FPGA以第一时钟频率工作，并且在解码4K或2K数据的情况下，FPGA以第二时钟频率工作。

5. 发明申请

WO2016046685A1 IMAGING DEVICE 审中-公开
标题翻译：成像装置
公开(公告)号：WO2016046685A1
公开(公告)日：2016-03-31
申请号：PCT/IB2015/056953
申请日：2015-09-11
申请人： SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
发明人： IKEDA, Takayuki , KUROKAWA, Yoshiyuki
IPC分类号： H01L27/146 , H01L21/8234 , H01L27/08 , H01L27/088 , H01L27/14 , H01L29/786 , H01L31/10 , H04N5/374
CPC分类号： H01L27/14612 , H01L27/14621 , H01L27/14627 , H01L27/14634 , H01L27/14645 , H01L27/14659 , H01L27/14663 , H01L29/24 , H01L29/7869 , H01L31/0272 , H01L31/0322 , H02S40/44
摘要： An imaging device which offers an image with high quality and is suitable for high-speed operation is provided. The imaging device includes a first region to an n -th region ( n is a natural number of 2 or more and 16 or less) each including a first circuit, a second circuit, a third circuit, and a fourth circuit. The first to third circuits each include a transistor in which silicon is used in an active layer or an active region. The fourth circuit includes a photoelectric conversion element and a transistor in which an oxide semiconductor is used in an active layer. The first circuit includes a region overlapping with the fourth circuit. The third circuit includes a region overlapping with the fourth circuit.
摘要翻译：提供了一种提供高品质图像并适合于高速操作的成像装置。成像装置包括第一区域到第n区域（n为2以上且16以下的自然数），每个区域包括第一电路，第二电路，第三电路和第四电路。第一至第三电路各自包括在有源层或有源区中使用硅的晶体管。第四电路包括光电转换元件和在有源层中使用氧化物半导体的晶体管。第一电路包括与第四电路重叠的区域。第三电路包括与第四电路重叠的区域。

6. 发明申请

WO2016034983A1 IMAGING DEVICE AND ELECTRONIC DEVICE 审中-公开
标题翻译：成像装置和电子装置
公开(公告)号：WO2016034983A1
公开(公告)日：2016-03-10
申请号：PCT/IB2015/056414
申请日：2015-08-25
申请人： SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
发明人： INOUE, Hiroki , KUROKAWA, Yoshiyuki , IKEDA, Takayuki , OKAMOTO, Yuki
IPC分类号： H04N5/365 , H01L27/146 , H01L29/786 , H04N5/374
CPC分类号： H01L27/14612 , H01L27/14614 , H01L27/14689 , H01L27/14692 , H01L29/24 , H01L29/7869
摘要： An imaging device capable of obtaining high-quality imaging data is provided. The imaging device includes a first circuit, a second circuit and a third circuit. The first circuit includes a photoelectric conversion element, a plurality of transistors including an amplifier transistor, and a plurality of capacitors. The second circuit includes a transistor. The third circuit includes a resistor and a transistor for controlling a current flowing in the resistor. The output signal of the imaging device is determined in accordance with the current flowing in the resistor. Variations in electrical characteristics of the amplifier transistor included in the first circuit can be compensated.
摘要翻译：提供能够获得高质量成像数据的成像装置。成像装置包括第一电路，第二电路和第三电路。第一电路包括光电转换元件，包括放大器晶体管的多个晶体管和多个电容器。第二电路包括晶体管。第三电路包括用于控制在电阻器中流动的电流的电阻器和晶体管。成像装置的输出信号根据电阻中流过的电流来确定。可以补偿包括在第一电路中的放大器晶体管的电特性的变化。

7. 发明申请

WO2014125979A1 PROGRAMMABLE LOGIC DEVICE AND SEMICONDUCTOR DEVICE 审中-公开
标题翻译：可编程逻辑器件和半导体器件
公开(公告)号：WO2014125979A1
公开(公告)日：2014-08-21
申请号：PCT/JP2014/052709
申请日：2014-01-30
申请人： SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
发明人： KOZUMA, Munehiro , KUROKAWA, Yoshiyuki , IKEDA, Takayuki , AOKI, Takeshi
IPC分类号： H03K19/177
CPC分类号： H03K19/0013 , H01L27/1225 , H01L27/124 , H01L29/24 , H01L29/7869 , H03K19/09441 , H03K19/1737 , H03K19/17728 , H03K19/17748 , H03K19/1776
摘要： A programmable logic device includes a plurality of programmable logic elements (PLE) whose electrical connection is controlled by first configuration data. Each of The PLEs includes an LUT in which a relationship between a logic level of an input signal and a logic level of an output signal is determined by second configuration data, an FF to which the output signal of the LUT is input, and an MUX. The MUX includes at least two switches each including first and second transistor. A signal including third configuration data is input to a gate of the second transistor through the first transistor. The output signal of the LUT or an output signal of the FF is input to one of a source and a drain of the second transistor.
摘要翻译：可编程逻辑器件包括多个可编程逻辑元件（PLE），其电连接由第一配置数据控制。每个PLE包括LUT，其中输入信号的逻辑电平和输出信号的逻辑电平之间的关系由第二配置数据确定，输入LUT的输出信号的FF和MUX 。 MUX包括至少两个开关，每个开关包括第一和第二晶体管。包括第三配置数据的信号通过第一晶体管输入到第二晶体管的栅极。 LUT的输出信号或FF的输出信号被输入到第二晶体管的源极和漏极之一。

8. 发明申请

WO2011111529A1 SEMICONDUCTOR DEVICE 审中-公开
标题翻译：半导体器件
公开(公告)号：WO2011111529A1
公开(公告)日：2011-09-15
申请号：PCT/JP2011/054052
申请日：2011-02-17
申请人： SEMICONDUCTOR ENERGY LABORATORY CO., LTD. , KUROKAWA, Yoshiyuki , IKEDA, Takayuki , TAMURA, Hikaru , KOZUMA, Munehiro
发明人： KUROKAWA, Yoshiyuki , IKEDA, Takayuki , TAMURA, Hikaru , KOZUMA, Munehiro
IPC分类号： H01L27/146 , H01L29/786 , H01L31/10
CPC分类号： H01L27/14643 , G02F1/1362 , G02F2001/13312 , H01L27/1225 , H01L27/14632 , H01L27/1464 , H04N5/378
摘要： An object is to achieve low-power consumption by reducing the off-state current of a transistor in a photosensor. A semiconductor device including a photosensor having a photodiode, a first transistor, and a second transistor; and a read control circuit including a read control transistor, in which the photodiode has a function of supplying charge based on incident light to a gate of the first transistor; the first transistor has a function of storing charge supplied to its gate and converting the charge stored into an output signal; the second transistor has a function of controlling reading of the output signal; the read control transistor functions as a resistor converting the output signal into a voltage signal; and semiconductor layers of the first transistor, the second transistor, and the read control transistor are formed using an oxide semiconductor.
摘要翻译：目的是通过降低光电传感器中的晶体管的截止电流来实现低功耗。一种半导体器件，包括具有光电二极管的光传感器，第一晶体管和第二晶体管; 以及包括读取控制晶体管的读取控制电路，其中光电二极管具有基于入射光向第一晶体管的栅极提供电荷的功能; 第一晶体管具有存储提供给其栅极的电荷并将存储的电荷转换为输出信号的功能; 第二晶体管具有控制输出信号的读取的功能; 读控制晶体管用作将输出信号转换成电压信号的电阻器; 并且使用氧化物半导体形成第一晶体管，第二晶体管和读控制晶体管的半导体层。

9. 发明申请

WO2011111504A1 ELECTRONIC DEVICE AND ELECTRONIC SYSTEM 审中-公开
标题翻译：电子设备和电子系统
公开(公告)号：WO2011111504A1
公开(公告)日：2011-09-15
申请号：PCT/JP2011/053590
申请日：2011-02-14
申请人： SEMICONDUCTOR ENERGY LABORATORY CO., LTD. , KUROKAWA, Yoshiyuki , IKEDA, Takayuki , TAMURA, Hikaru , YAMAZAKI, Shunpei
发明人： KUROKAWA, Yoshiyuki , IKEDA, Takayuki , TAMURA, Hikaru , YAMAZAKI, Shunpei
IPC分类号： G06F3/041 , G02F1/1333 , G02F1/1368 , G06F3/042
CPC分类号： G06F3/0412 , G06F3/042
摘要： One object of an embodiment is to provide a novel electronic device which is configured so that a user can read data regardless of a location, input data by directly touching a keyboard displayed on a screen or indirectly touching the keyboard with a stylus pen or the like, and use the input data. The electronic device includes a first transistor electrically connected to a reflective electrode and a photo sensor over a flexible substrate. A touch-input button is displayed as a still image on a first screen region of a display portion, and a video signal is output so that a moving image is displayed on a second screen region of the display portion. A video signal processing portion supplying different signals between the case where a still image is displayed on the display portion and the case where a moving image is displayed on the display portion is provided. After writing of a still image is performed, a display element control circuit is put in a non-operation state, whereby power consumption can be reduced.
摘要翻译：实施例的一个目的是提供一种新颖的电子设备，其被配置为使得用户可以无论位置如何读取数据，通过直接触摸屏幕上显示的键盘或用触笔等间接触摸键盘来输入数据，并使用输入数据。电子器件包括电连接到反射电极的第一晶体管和柔性基板上的光电传感器。在显示部分的第一屏幕区域上将触摸输入按钮显示为静止图像，并且输出视频信号，使得在显示部分的第二屏幕区域上显示运动图像。提供了在显示部分上显示静止图像的情况与在显示部分上显示运动图像的情况之间提供不同信号的视频信号处理部分。在执行静止图像的写入之后，显示元件控制电路处于非操作状态，从而能够降低功耗。

10. 发明申请

WO2010074011A1 TOUCH PANEL, DISPLAY DEVICE, AND ELECTRONIC DEVICE 审中-公开
标题翻译：触摸屏，显示设备和电子设备
公开(公告)号：WO2010074011A1
公开(公告)日：2010-07-01
申请号：PCT/JP2009/071199
申请日：2009-12-15
申请人： SEMICONDUCTOR ENERGY LABORATORY CO., LTD. , KUROKAWA, Yoshiyuki
发明人： KUROKAWA, Yoshiyuki
IPC分类号： G06F3/041 , G02F1/133 , G06F3/042 , G09G3/20 , G09G5/00
CPC分类号： G06F3/0412 , G02F1/13338 , G02F2001/13312 , G06F3/042 , G09G3/3406 , G09G2310/0235 , G09G2320/0626 , G09G2360/144
摘要： It is an object to provide a touch panel with high precision, high-speed operation, and low power consumption, which is caused by reduction of power consumption in an A/D converter circuit is reduced. In the touch panel in which a photo sensor is included in a pixel and an A/D converter circuit is provided every one column or a plurality of columns of the pixels, a control signal of the A/D converter circuit is sequentially supplied by a shift register included in an ADC (A/D converter circuit) control circuit, and respective periods when the plurality of A/D converter circuits operates are not overlap with each other. Accordingly, the number of A/D converter circuits which operate at the same time is decreased, and instantaneous power consumption in the A/D converter circuit is decreased.
摘要翻译：本发明的目的是提供一种具有高精度，高速运行和低功耗的触摸面板，这是由于减少A / D转换电路中的功耗降低而引起的。在像素中包括光电传感器的触摸面板和每一列或多列像素提供A / D转换器电路的情况下，A / D转换电路的控制信号由包括在ADC（A / D转换器电路）控制电路中的移位寄存器以及多个A / D转换器电路操作的各个周期彼此不重叠。因此，同时工作的A / D转换器电路的数量减少，并且A / D转换器电路中的瞬时功耗降低。

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