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1. 发明申请

WO2011008356A3 TECHNIQUES FOR ADJUSTING CLOCK SIGNALS TO COMPENSATE FOR NOISE 审中-公开
标题翻译：调整时钟信号以补偿噪声的技术
公开(公告)号：WO2011008356A3
公开(公告)日：2011-03-17
申请号：PCT/US2010036792
申请日：2010-05-31
申请人： RAMBUS INC , ZERBE JARED , BATRA PRADEEP , LEIBOWITZ BRIAN
发明人： ZERBE JARED , BATRA PRADEEP , LEIBOWITZ BRIAN
IPC分类号： H03K19/0175 , H03K5/1252 , H04L25/02
CPC分类号： H04L25/0264 , G06F1/10 , H03K5/1252
摘要： A first integrated circuit (IC) has an adjustable delay circuit and a first interface circuit. A first clock signal is provided to the adjustable delay circuit to produce a delayed clock signal provided to the first interface circuit. A second IC has a supply voltage sense circuit and a second interface circuit that transfers data with the first IC. The supply voltage sense circuit provides a noise signal to the first IC that is indicative of noise in a supply voltage of the second IC. The adjustable delay circuit adjusts a delay of the delayed clock signal based on the noise signal. In other embodiments, edge-colored clock signals reduce the effects of high frequency jitter in the transmission of data between integrated circuits (ICs) by making the high frequency jitter common between the ICs. In other embodiments, a supply voltage is used to generate clocks signals on multiple ICs.
摘要翻译：第一集成电路（IC）具有可调延迟电路和第一接口电路。第一时钟信号被提供给可调延迟电路以产生提供给第一接口电路的延迟时钟信号。第二IC具有电源电压感测电路和与第一IC传输数据的第二接口电路。电源电压感测电路向第一IC提供噪声信号，其指示第二IC的电源电压中的噪声。可调延迟电路基于噪声信号来调整延迟时钟信号的延迟。在其他实施例中，通过使IC间的高频抖动相同，边缘彩色时钟信号减少了集成电路（IC）之间数据传输中高频抖动的影响。在其他实施例中，电源电压被用于在多个IC上产生时钟信号。

2. 发明申请

WO2011059842A3 TECHNIQUES FOR PHASE DETECTION 审中-公开
标题翻译：相位检测技术
公开(公告)号：WO2011059842A3
公开(公告)日：2011-08-18
申请号：PCT/US2010054900
申请日：2010-10-31
申请人： RAMBUS INC , LEIBOWITZ BRIAN , LEE HAE-CHANG , ARYANFAR FARSHID , CHANG KUN-YUNG , SHEN JIE
发明人： LEIBOWITZ BRIAN , LEE HAE-CHANG , ARYANFAR FARSHID , CHANG KUN-YUNG , SHEN JIE
IPC分类号： H03L7/087 , G11C11/407
CPC分类号： H03D13/00 , H03L7/08 , H03L7/0814 , H03L7/0816 , H03L7/085
摘要： A phase detection circuit can include two phase detectors that each generate a non-zero output in response to input signals being aligned in phase. The input signals are based on two periodic signals. The phase detection circuit subtracts the output signal of one phase detector from the output signal of the other phase detector to generate a signal having a zero value when the periodic signals are in phase. Alternatively, a phase detector generates a phase comparison signal indicative of a phase difference between periodic signals. The phase comparison signal has a non-zero value in response to input signals to the phase detector being aligned in phase. The input signals are based on the periodic signals. An output circuit receives the phase comparison signal and generates an output having a zero value in response to the periodic signals being aligned in phase.
摘要翻译：相位检测电路可以包括两个相位检测器，每个相位检测器响应于同相对准的输入信号而产生非零输出。输入信号基于两个周期信号。相位检测电路从另一相位检测器的输出信号中减去一相位检测器的输出信号，当周期信号同相时产生具有零值的信号。或者，相位检测器产生指示周期信号之间的相位差的相位比较信号。相位比较信号响应于相位检测器的相位输入信号具有非零值。输入信号基于周期信号。输出电路接收相位比较信号，并响应于同相对齐的周期信号产生具有零值的输出。

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