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    • 1. 发明申请
    • CLASS AB AMPLIFIER WITH RESISTIVE LEVEL-SHIFTING CIRCUITRY
    • 具有电阻式电平转换电路的AB类放大器
    • WO2010071876A1
    • 2010-06-24
    • PCT/US2009/068942
    • 2009-12-21
    • QUALCOMM IncorporatedWANG, Cheng-HanPAN, Tzu-WangBROCKENBROUGH, Roger
    • WANG, Cheng-HanPAN, Tzu-WangBROCKENBROUGH, Roger
    • H03F1/30H03F3/45
    • H03F3/45183H03F1/307
    • A class AB amplifier with resistive level-shifting circuitry is described. In one exemplary design, the class AB amplifier includes an input stage, a resistive level-shifting stage, a class AB output stage, and a bias circuit. The input stage receives an input signal and provides a first drive signal. The resistive level-shifting stage receives the first drive signal and provides a second drive signal. The output stage receives the first and second drive signals and provides an output signal. The bias circuit generates a bias voltage for the resistive level-shifting stage to obtain a desired quiescent current for the output stage. In one exemplary design, the resistive level-shifting stage includes a transistor and a resistor. The transistor receives the bias voltage and provides the second drive signal. The resistor is coupled to the transistor and provides a voltage drop between the first and second drive signals.
    • 描述了具有阻性电平移位电路的AB类放大器。 在一个示例性设计中,AB类放大器包括输入级,电阻电平转换级,AB类输出级和偏置电路。 输入级接收输入信号并提供第一驱动信号。 电阻电平转换级接收第一驱动信号并提供第二驱动信号。 输出级接收第一和第二驱动信号并提供输出信号。 偏置电路产生用于电阻电平移位级的偏置电压,以获得用于输出级的期望的静态电流。 在一个示例性设计中,电阻电平移位级包括晶体管和电阻器。 晶体管接收偏置电压并提供第二驱动信号。 电阻器耦合到晶体管并且在第一和第二驱动信号之间提供电压降。
    • 2. 发明申请
    • TUNABLE FILTERS WITH LOWER RESIDUAL SIDEBAND
    • 具有较低残留边的TUNABLE过滤器
    • WO2010048232A1
    • 2010-04-29
    • PCT/US2009/061385
    • 2009-10-20
    • QUALCOMM INCORPORATEDWANG, Cheng-HanBROCKENBROUGH, RogerPAN, Tzu-wang
    • WANG, Cheng-HanBROCKENBROUGH, RogerPAN, Tzu-wang
    • H03H11/12H03F3/45H04B1/10
    • H03H11/1291
    • An apparatus includes first (220a) and second (220b) filters and a bandwidth control circuit (270). The first filter (220a) operates as part of a first oscillator in a first mode and filters a first input signal and provides a first output signal in a second mode. The second filter (220b) operates as part of a second oscillator in the first mode and filters a second input signal and provides a second output signal in the second mode. The bandwidth control circuit (270) adjusts the bandwidth of the first and second filters (220a, 220b) in the first mode, e.g., adjusts the oscillation frequency of each oscillator to obtain a target bandwidth for an associated filter. The apparatus may further include first and second gain control circuits (250a, 250b). Each gain control circuit (250a, 250b) may vary the amplitude of an oscillator signal from an associated oscillator and/or set a gain of an associated filter in the first mode.
    • 一种装置包括第一(220a)和第二(220b)滤波器和带宽控制电路(270)。 第一滤波器(220a)在第一模式中作为第一振荡器的一部分进行操作,并且对第一输入信号进行滤波并在第二模式中提供第一输出信号。 第二滤波器(220b)在第一模式中作为第二振荡器的一部分工作,并且对第二输入信号进行滤波并在第二模式中提供第二输出信号。 带宽控制电路(270)在第一模式中调整第一和第二滤波器(220a,220b)的带宽,例如调整每个振荡器的振荡频率以获得相关滤波器的目标带宽。 该装置还可以包括第一和第二增益控制电路(250a,250b)。 每个增益控制电路(250a,250b)可以改变来自相关振荡器的振荡器信号的幅度和/或在第一模式中设置相关联的滤波器的增益。
    • 5. 发明申请
    • CLOCK CLEAN-UP PHASE-LOCKED LOOP (PLL)
    • 时钟清除锁相环(PLL)
    • WO2010042763A1
    • 2010-04-15
    • PCT/US2009/060062
    • 2009-10-08
    • QUALCOMM INCORPORATEDLIN, I-HsiangBROCKENBROUGH, Roger
    • LIN, I-HsiangBROCKENBROUGH, Roger
    • H03L7/22H04B1/00
    • H03L7/07H03L7/081H03L7/0995H03L7/197H03L7/22H03L7/23H04B1/0039
    • A clock clean-up phase-locked loop (PLL) that may reduce spurs and improve performance of a receiver is described. In one exemplary design, an integrated circuit includes a PLL and an analog-to-digital converter (ADC). The PLL receives a first clock signal generated with a fractional divider ratio and having spurs due to abrupt frequency jumps. The first clock signal may be generated by a fractional-N frequency synthesizer external to the integrated circuit. The PLL generates a second clock signal with an integer divider ratio and having reduced spurs. The ADC digitizes an analog baseband signal based on the second clock signal and provides digital samples. The integrated circuit may further include a low noise amplifier (LNA), which may observe less spurs coupled via the substrate of the integrated circuit due to the use of the PLL to clean up the first clock signal.
    • 描述了可以减少杂散并提高接收机性能的时钟清理锁相环(PLL)。 在一个示例性设计中,集成电路包括PLL和模数转换器(ADC)。 PLL接收以分数除数比产生的第一个时钟信号,并且由于突然的跳频而产生杂散。 第一时钟信号可以由集成电路外部的分数N频率合成器产生。 PLL产生具有整数分频比的第二个时钟信号,并具有减少的杂散。 ADC根据第二个时钟信号数字化模拟基带信号,并提供数字采样。 集成电路还可以包括低噪声放大器(LNA),由于使用PLL来清理第一时钟信号,可以观察到较小的经由集成电路的衬底耦合的杂散。
    • 9. 发明申请
    • WIRELESS DEVICE WITH 3-D ANTENNA SYSTEM
    • 具有3-D天线系统的无线设备
    • WO2013033650A1
    • 2013-03-07
    • PCT/US2012/053545
    • 2012-08-31
    • QUALCOMM INCORPORATEDLEE, Cheol-WoongTASSOUDJI, Mohammad A.BROCKENBROUGH, Roger
    • LEE, Cheol-WoongTASSOUDJI, Mohammad A.BROCKENBROUGH, Roger
    • H01Q3/24H01Q3/30H01Q9/04H01Q1/22
    • H01Q3/30H01Q1/2291H01Q1/243H01Q3/24H01Q9/0407
    • Techniques for improving coverage of an antenna system are disclosed. In an aspect, a wireless device (310) includes a 3-D antenna system (320) to improve coverage and enhance performance. The 3-D antenna system (320) includes antenna elements (332, 342) formed on multiple planes pointing in different spatial directions. Antenna elements formed on the multiple planes are associated with different antenna beams (350, 360), which can provide a larger line-of-sight (LOS, 352, 362) coverage for the wireless device. Beamforming may be performed for the antennas on a given plane to further improve LOS coverage (352, 362). Non-LOS (NLOS, 354) coverage may also improve since antenna beams pointing in different spatial directions may result in reflected signals of higher power levels due to better signal reflection for some antenna beams. The antenna system may be used for 60 GHz mm-waves in IEEE 802. 11ad WPANs.
    • 公开了一种改善天线系统覆盖范围的技术。 在一方面,无线设备(310)包括用于改善覆盖并提高性能的3-D天线系统(320)。 3-D天线系统(320)包括形成在指向不同空间方向的多个平面上的天线元件(332,342)。 形成在多个平面上的天线元件与不同的天线波束(350,360)相关联,这可以为无线设备提供更大的视距(LOS,352,362)覆盖。 可以对给定平面上的天线执行波束成形以进一步改善LOS覆盖(352,362)。 非LOS(NLOS,354)的覆盖范围也可能得到改善,因为指向不同空间方向的天线波束可能导致较高功率电平的反射信号,这是由于某些天线波束的信号反射更好。 天线系统可用于IEEE 802.11a WPA中的60 GHz毫米波。