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1. 发明申请

WO2010148407A2 POWER AND IMPEDANCE MEASUREMENT CIRCUITS FOR A WIRELESS COMMUNICATION DEVICE 审中-公开
标题翻译：无线通信设备的功率和阻抗测量电路
公开(公告)号：WO2010148407A2
公开(公告)日：2010-12-23
申请号：PCT/US2010/039376
申请日：2010-06-21
申请人： QUALCOMM INCORPORATED , SEE, Puay Hoe , BALLANTYNE, Gary John , SAHOTA, Gurkanwal Singh , HADJICHRISTOS, Aristotele , CICALINI, Alberto
发明人： SEE, Puay Hoe , BALLANTYNE, Gary John , SAHOTA, Gurkanwal Singh , HADJICHRISTOS, Aristotele , CICALINI, Alberto
IPC分类号： H04B1/04
CPC分类号： H04B1/0458 , H03H7/40
摘要： Exemplary embodiments disclosed are directed to power and impedance measurement circuits that may be used to measure power and/or impedance are described. A measurement circuit may include a sensor and a computation unit. The sensor may sense (i) a first voltage signal across a series circuit coupled to a load to obtain a first sensed signal and (ii) a second voltage signal at a designated end of the series circuit to obtain a second sensed signal. The sensor may mix (i) a first version of the first sensed signal with a first version of the second sensed signal to obtain a first sensor output and (ii) a second version of the first sensed signal with a second version of the second sensed signal to obtain a second sensor output. The computation unit may determine the impedance and/or delivered power at the designated end of the series circuit based on the sensor outputs.
摘要翻译：所公开的示例性实施例涉及可用于测量功率和/或阻抗的功率和阻抗测量电路。测量电路可以包括传感器和计算单元。传感器可以感测（i）跨耦合到负载的串联电路的第一电压信号以获得第一感测信号，以及（ii）串联电路的指定端的第二电压信号以获得第二感测信号。传感器可以将（i）第一感测信号的第一版本与第二感测信号的第一版本混合以获得第一传感器输出，以及（ii）第一感测信号的第二版本，具有第二感测的第二版本信号以获得第二传感器输出。计算单元可以基于传感器输出来确定串联电路的指定端处的阻抗和/或传递功率。

2. 发明申请

WO2010141774A2 TUNABLE MATCHING CIRCUITS FOR POWER AMPLIFIERS 审中-公开
标题翻译：功率放大器的可调匹配电路
公开(公告)号：WO2010141774A2
公开(公告)日：2010-12-09
申请号：PCT/US2010/037322
申请日：2010-06-03
申请人： QUALCOMM Incorporated , SEE, Puay Hoe , HADJICHRISTOS, Aristotele , SAHOTA, Gurkanwal Singh
发明人： SEE, Puay Hoe , HADJICHRISTOS, Aristotele , SAHOTA, Gurkanwal Singh
IPC分类号： H04B1/04
CPC分类号： H04B1/0458 , H03F1/565 , H03F3/24 , H03F3/72 , H03F2200/111 , H03F2200/378 , H03F2200/387 , H03F2203/7209
摘要： Tunable matching circuits for power amplifiers are described. In an exemplary design, an apparatus may include a power amplifier and a tunable matching circuit. The power amplifier may amplify an input RF signal and provide an amplified RF signal. The tunable matching circuit may provide output impedance matching for the power amplifier, may receive the amplified RF signal and provide an output RF signal, and may be tunable based on at least one parameter effecting the operation of the power amplifier. The parameter(s) may include an envelope signal for the amplified RF signal, an average output power level of the output RF signal, a power supply voltage for the power amplifier, IC process variations, etc. The tunable matching circuit may include a series variable capacitor and/or a shunt variable capacitor. Each variable capacitor may be tunable based on a control generated based on the parameter(s).
摘要翻译：描述了用于功率放大器的可调谐匹配电路。在示例性设计中，设备可以包括功率放大器和可调谐匹配电路。功率放大器可以放大输入RF信号并提供放大的RF信号。可调谐匹配电路可以为功率放大器提供输出阻抗匹配，可以接收放大的RF信号并提供输出RF信号，并且可以基于影响功率放大器的操作的至少一个参数来调节。该参数可以包括放大的RF信号的包络信号，输出RF信号的平均输出功率电平，功率放大器的电源电压，IC处理变化等。可调谐匹配电路可以包括一系列可变电容器和/或分流可变电容器。每个可变电容器可以基于基于参数产生的控制来调节。

3. 发明申请

WO2007035738A2 BASEBAND COMPENSATION OF AN OFFSET PHASE LOCKED LOOP 审中-公开
标题翻译：一种失调相位锁定环的基带补偿
公开(公告)号：WO2007035738A2
公开(公告)日：2007-03-29
申请号：PCT/US2006/036490
申请日：2006-09-15
申请人： QUALCOMM INCORPORATED , SEE, Puay Hoe Andrew , BALLANTYNE, Gary John , JAFFEE, James , SAHOTA, Gurkanwal Singh
发明人： SEE, Puay Hoe Andrew , BALLANTYNE, Gary John , JAFFEE, James , SAHOTA, Gurkanwal Singh
IPC分类号： H04L27/00
CPC分类号： H04L27/361 , H03C3/0966 , H03C3/0983
摘要： A phase modulator faithfully reproduces higher frequency modulation using an offset phase-locked loop (OPLL) without passing excessive noise through an increased bandwidth of the OPLL. A quadrature modulator modulates information from a baseband signal onto a passband IF signal and, after a limiter strips away amplitude variations, the OPLL reproduces the phase modulation on an RF signal. The OPLL introduces a group delay that does not vary linearly with the modulation frequency and that consequently causes distortion when uncompensated. A baseband filter filters the amplitude of the baseband signal and introduces a complementary group delay that compensates for the OPLL group delay and results in a combined group delay of the baseband filter, quadrature modulator, limiter and OPLL that remains substantially constant as modulation frequency varies. Compensating for the OPLL group delay reduces distortion and the spectral energy at offset frequencies from the carrier frequency of the RF signal.
摘要翻译：相位调制器使用偏移锁相环（OPLL）忠实地再现较高频率调制，而不会通过OPLL的增加的带宽传递过多的噪声。正交调制器将来自基带信号的信息调制到通带IF信号上，并且在限幅器去除幅度变化之后，OPLL再现RF信号上的相位调制。 OPLL引入了群延迟，该群延迟不随调制频率线性变化，并因此在未补偿时导致失真。基带滤波器对基带信号的幅度进行滤波并引入互补群延迟，以补偿OPLL群延迟，并导致基带滤波器，正交调制器，限幅器和OPLL的组合群延迟，其随着调制频率的变化基本保持不变。补偿OPLL群时延可以减小RF信号载波频率偏移频率处的失真和频谱能量。

4. 发明申请

WO2009039444A1 MULTI-MODE AND MULTI-BAND TRANSMITTERS FOR WIRELESS COMMUNICATION 审中-公开
标题翻译：用于无线通信的多模和多带发射机
公开(公告)号：WO2009039444A1
公开(公告)日：2009-03-26
申请号：PCT/US2008/077121
申请日：2008-09-19
申请人： QUALCOMM INCORPORATED , SEE, Puay Hoe Andrew , SAHOTA, Gurkanwal Singh , SUN, Bo , BALLANTYNE, Gary, John , PANTON, William, Ronald , CHOI, Zae Yong
发明人： SEE, Puay Hoe Andrew , SAHOTA, Gurkanwal Singh , SUN, Bo , BALLANTYNE, Gary, John , PANTON, William, Ronald , CHOI, Zae Yong
IPC分类号： H04L27/00 , H04L27/36 , H04B1/00
CPC分类号： H04L27/0008 , H03C3/0916 , H03C3/0975 , H03C5/00 , H03F1/3241 , H03F1/3252 , H04B1/0483 , H04B2001/0425 , H04L27/361 , H04L27/362
摘要： Transmitters supporting multiple modulation modes and/or multiple frequency bands are described. A transmitter may perform large signal polar modulation, small signal polar modulation, and/or quadrature modulation, which may support different modulation schemes and systems. Circuit blocks may be shared by the different modulation modes to reduce cost and power. For example, a single modulator (160) and a single power amplifier (170) may be used for small signal polar modulation and quadrature modulation. The transmitter may apply pre-distortion (124,142) to improve performance, to allow a power amplifier to support multiple frequency bands, to allow the power amplifier to operate at higher output power levels, etc. Envelope and phase distortions due to non-linearity of the power amplifier may be characterized for different input levels and different bands and stored at the transmitter. Thereafter, envelope and phase signals may be pre-distorted based on the stored characterizations to compensate for non-linearity of the power amplifier.
摘要翻译：描述了支持多个调制模式和/或多个频带的发射机。发射机可以执行大信号极性调制，小信号极化调制和/或正交调制，其可以支持不同的调制方案和系统。电路块可以由不同的调制模式共享以降低成本和功率。例如，单个调制器（160）和单个功率放大器（170）可用于小信号极性调制和正交调制。发射机可以应用预失真（124,142）来提高性能，以允许功率放大器支持多个频带，以允许功率放大器在较高的输出功率电平下工作等。由于非线性的包络和相位失真功率放大器可以被表征为不同的输入电平和不同的频带并存储在发射机。此后，包络和相位信号可以基于存储的特征来预失真，以补偿功率放大器的非线性。

5. 发明申请

WO2013025953A1 LOW NOISE AMPLIFIERS WITH COMBINED OUTPUTS 审中-公开
标题翻译：具有组合输出的低噪声放大器
公开(公告)号：WO2013025953A1
公开(公告)日：2013-02-21
申请号：PCT/US2012/051237
申请日：2012-08-16
申请人： QUALCOMM INCORPORATED , HADJICHRISTOS, Aristotele , SAHOTA, Gurkanwal Singh
发明人： HADJICHRISTOS, Aristotele , SAHOTA, Gurkanwal Singh
IPC分类号： H04B1/00 , H04B1/40 , H03F3/45
CPC分类号： H04B1/0057 , H03F1/0277 , H03F1/223 , H03F1/56 , H03F3/211 , H03F3/45179 , H03F3/68 , H03F3/72 , H03F2200/222 , H03F2200/294 , H03F2200/429 , H03F2203/7203 , H03F2203/7236 , H04B1/406
摘要： Multiple low noise amplifiers (LNAs) with combined outputs are disclosed. In an exemplary design, an apparatus includes a front-end module and an integrated circuit (IC). The front-end module includes a plurality of LNAs having outputs that are combined. The IC includes receive circuits coupled to the plurality of LNAs via a single interconnection. In an exemplary design, each of the plurality of LNAs may be enabled or disabled via a respective control signal for that LNA. The front-end module may also include receive filters coupled to the plurality of LNAs and a switchplexer coupled to the receive filters. The front-end module may further include at least one power amplifier, and the IC may further include transmit circuits coupled to the at least one power amplifier.
摘要翻译：公开了具有组合输出的多个低噪声放大器（LNA）。在示例性设计中，装置包括前端模块和集成电路（IC）。前端模块包括具有组合的输出的多个LNA。 IC包括经由单个互连耦合到多个LNA的接收电路。在示例性设计中，可以经由用于该LNA的相应控制信号来启用或禁用多个LNA中的每一个。前端模块还可以包括耦合到多个LNA的接收滤波器和耦合到接收滤波器的交换器。前端模块还可以包括至少一个功率放大器，并且IC还可以包括耦合到至少一个功率放大器的发射电路。

6. 发明申请

WO2009049014A1 DUAL BAND RADIO FREQUENCY TRANSMITTER 审中-公开
标题翻译：双频无线电频率发射机
公开(公告)号：WO2009049014A1
公开(公告)日：2009-04-16
申请号：PCT/US2008/079293
申请日：2008-10-09
申请人： QUALCOMM INCORPORATED , DENG, Junxiong , BHAGAT, Maulin Pareshbhai , SAHOTA, Gurkanwal Singh
发明人： DENG, Junxiong , BHAGAT, Maulin Pareshbhai , SAHOTA, Gurkanwal Singh
IPC分类号： H04B1/00 , H04B1/04 , H03H7/42
CPC分类号： H04B1/0067 , H04B1/0458 , H04B1/0483
摘要： A transmitter includes a transformer and a transformer tuning circuit. The transformer transforms a differential radio frequency (RF) signal to a single-ended RF signal. The transformer tuning circuit tunes the transformer to permit the transmitter to transmit the single-ended RF signal in a first frequency band (e.g., cellular frequency band) or a second frequency band (e.g., PCS frequency band).
摘要翻译：变送器包括变压器和变压器调谐电路。变压器将差分射频（RF）信号转换为单端RF信号。变压器调谐电路调谐变压器以允许发射机在第一频带（例如，蜂窝频带）或第二频带（例如，PCS频带）中发送单端RF信号。

7. 发明申请

WO2009088790A1 DIGITAL PHASE-LOCKED LOOP WITH GATED TIME-TO-DIGITAL CONVERTER 审中-公开
标题翻译：数字锁相环与定位的时间到数字转换器
公开(公告)号：WO2009088790A1
公开(公告)日：2009-07-16
申请号：PCT/US2008/088263
申请日：2008-12-24
申请人： QUALCOMM Incorporated , SUN, Bo , SAHOTA, Gurkanwal Singh , YANG, Zixiang
发明人： SUN, Bo , SAHOTA, Gurkanwal Singh , YANG, Zixiang
IPC分类号： H03L7/08 , H03L7/087
CPC分类号： H03L7/0802 , H03L7/087
摘要： A digital PLL (DPLL) includes a time-to-digital converter (TDC) and a control unit. The TDC is periodically enabled for a short duration to quantize phase information and disabled for the remaining time to reduce power consumption. The TDC receives a first clock signal and a first reference signal and provides a TDC output indicative of the phase difference between the first clock signal and the first reference signal. The control unit generates an enable signal based on a main reference signal and enables and disables the TDC with the enable signal. In one design, the control unit delays the main reference signal to obtain the first reference signal and a second reference signal, generates the enable signal based on the main reference signal and the second reference signal, and gates a main clock signal with the enable signal to obtain the first clock signal for the TDC.
摘要翻译：数字PLL（DPLL）包括时间 - 数字转换器（TDC）和控制单元。定期启用TDC以持续短时间量化相位信息，并在剩余时间内禁用TDC以降低功耗。 TDC接收第一时钟信号和第一参考信号，并提供指示第一时钟信号和第一参考信号之间的相位差的TDC输出。控制单元基于主参考信号生成使能信号，并使能和禁止具有使能信号的TDC。在一种设计中，控制单元延迟主参考信号以获得第一参考信号和第二参考信号，基于主参考信号和第二参考信号产生使能信号，并且将主时钟信号与使能信号以获得TDC的第一个时钟信号。

8. 发明申请

WO2012166556A1 TUNABLE MULTI-BAND RECEIVER 审中-公开
标题翻译： TUNABLE多带接收器
公开(公告)号：WO2012166556A1
公开(公告)日：2012-12-06
申请号：PCT/US2012/039455
申请日：2012-05-24
申请人： QUALCOMM Incorporated , SAHOTA, Gurkanwal Singh , CICCARELLI, Steven C. , PARK, Sang-June , PERSICO, Charles J.
发明人： SAHOTA, Gurkanwal Singh , CICCARELLI, Steven C. , PARK, Sang-June , PERSICO, Charles J.
IPC分类号： H04B1/52 , H04B1/10 , H04B1/00
CPC分类号： H04B1/525 , H03H2007/013 , H04B1/006 , H04B1/1036
摘要： A tunable multi-band receiver supporting operation on a plurality of frequency bands is disclosed. In an exemplary design, the tunable multi-band receiver includes an antenna tuning network, a tunable notch filter, and at least one low noise amplifier (LNA). The antenna tuning network tunes an antenna (e.g., a diversity antenna) to a receive band in a plurality of receive bands. The tunable notch filter is tunable to a transmit band in a plurality of transmit bands and attenuates signal components in the transmit band. One LNA among the at least one LNA amplifies an output signal from the tunable notch filter. The tunable multi-band receiver may further include one or more additional tunable notch filters to further attenuate the signal components in the transmit band.
摘要翻译：公开了一种在多个频带上支持操作的可调谐多频带接收机。在示例性设计中，可调谐多频带接收机包括天线调谐网络，可调谐陷波滤波器和至少一个低噪声放大器（LNA）。天线调谐网络将天线（例如，分集天线）调谐到多个接收频带中的接收频带。可调陷波滤波器可调谐到多个发射频带中的发射频带，并衰减发射频带中的信号分量。至少一个LNA中的一个LNA放大来自可调陷波滤波器的输出信号。可调谐多频带接收机还可以包括一个或多个附加可调陷波滤波器，以进一步衰减发射频带中的信号分量。

9. 发明申请

WO2009073581A1 HIGH-LINEARITY COMPLEMENTARY AMPLIFIER 审中-公开
标题翻译：高线性互补放大器
公开(公告)号：WO2009073581A1
公开(公告)日：2009-06-11
申请号：PCT/US2008/085085
申请日：2008-11-29
申请人： QUALCOMM INCORPORATED , DENG, Junxiong , SAHOTA, Gurkanwal Singh , PENG, Solti
发明人： DENG, Junxiong , SAHOTA, Gurkanwal Singh , PENG, Solti
IPC分类号： H03F1/32 , H03F3/45 , H03F1/02 , H03F1/08 , H03F1/56 , H03F3/19 , H03F3/30
CPC分类号： H03F1/3205 , H03F1/0261 , H03F1/086 , H03F1/3211 , H03F1/56 , H03F3/19 , H03F3/3022 , H03F3/45179 , H03F2200/18 , H03F2200/294 , H03F2200/354 , H03F2200/451
摘要： A complementary amplifier (400) includes an NMOS transistor (412) coupled to a PMOS transistor (422) in a stacked configuration. The NM(via). The NMOS and PMOS transistors (412/422) operate as a linear complementary amplifier and provide an output signal (vat). The NMOS and PMOS transistors (412/422) may have separate bias voltages, which may be selected to overlap the low- to-high and high-to-low transitions of the transconductances of these transistors (412/422). The width and length dimensions of the NMOS and PMOS transistors may be selected to match the change in input capacitance and the change in transconductance of the NMOS transistor (412) in moderate inversion region with the change in input capacitance and the change in transconductance of the PMOS transistor (422) in moderate inversion region. The complementary amplifier may have an approximately constant total input capacitance and an approximately constant total transconductance over a range of voltages.
摘要翻译：互补放大器（400）包括以堆叠配置耦合到PMOS晶体管（422）的NMOS晶体管（412）。 NM（via）。 NMOS和PMOS晶体管（412/422）作为线性互补放大器工作并提供输出信号（大桶）。 NMOS和PMOS晶体管（412/422）可以具有单独的偏置电压，其可以被选择为与这些晶体管的跨导的低到高和高到低的跃迁重叠（412/422）。可以选择NMOS和PMOS晶体管的宽度和长度尺寸以匹配输入电容的变化和NMOS晶体管（412）在中等反转区域中的跨导的变化，随着输入电容的变化和跨导的变化 PMOS晶体管（422）。互补放大器可以具有近似恒定的总输入电容和在一定范围的电压上的近似恒定的总跨导。

10. 发明申请

WO2009055622A3 DYNAMIC BIASING OF A VCO IN A PHASE-LOCKED LOOP 审中-公开
公开(公告)号：WO2009055622A3
公开(公告)日：2009-04-30
申请号：PCT/US2008/081033
申请日：2008-10-23
申请人： QUALCOMM Incorporated , SUN, Bo , SAHOTA, Gurkanwal Singh , WU, Yue
发明人： SUN, Bo , SAHOTA, Gurkanwal Singh , WU, Yue
IPC分类号： H03L7/10 , H03L7/107 , H03L7/093 , H03L7/08
摘要： A local oscillator includes a phase-locked loop. The phase-locked loop includes voltage controlled oscillator (VCO) and a novel VCO control circuit. The VCO control circuit may be programmable and configurable. In one example, an instruction is received onto the VCO control circuit to change the power state of the VCO. The instruction is issued by other circuitry in response to a detected change in RF channel conditions (for example, a change in a signal-to-noise determination) in a cellular telephone. In response, the VCO control circuit outputs control signals that gradually widen the loop bandwidth of the PLL, then gradually change the VCO bias current to change the VCO power state, and then narrow the loop bandwidth of the PLL back to its original bandwidth. The entire process of widening the PLL bandwidth, changing the VCO power state, and narrowing the PLL bandwidth occurs while the PLL remains locked.

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