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    • 2. 发明申请
    • HIGH-PERFORMANCE FET DEVICES AND METHODS
    • 高性能FET器件和方法
    • WO2006081262A2
    • 2006-08-03
    • PCT/US2006/002534
    • 2006-01-25
    • MOXTRONICS, INC.LEE, Tae-seokRYU, YungryelWHITE, Henry
    • LEE, Tae-seokRYU, YungryelWHITE, Henry
    • H01L29/30
    • H01L29/808H01L29/1608H01L29/22H01L29/267H01L29/45H01L29/47H01L29/78H01L29/812
    • An epitaxially layered structure with gate voltage bias supply circuit element for improvement in performance for semiconductor field effect transistor (FET) devices utilizes a structure comprised of a substrate, a first layer semiconductor film of either an n-type or a p-type grown epitaxially on the substrate, with the possibility of a buffer layer between the substrate and first layer film, an active semiconductor layer grown epitaxially on the first semiconductor layer with the conductivity type of the active layer being opposite that of the first semiconductor layer, with the active layer having a gate region and a drain region and a source region with electrical contacts to gate, drain and source regions sufficient to form a FET, an electrical contact on either the substrate or the first semiconductor layer, and a gate voltage bias supply circuit element electrically connected to gate contact and to substrate or first semiconductor layer with voltage polarity and magnitude sufficient to increase device performance. This epitaxially layered structure with gate voltage bias supply circuit element can be employed for improving the function and high frequency performance of semiconductor FET devices.
    • 具有用于提高半导体场效应晶体管(FET)器件的性能的栅极电压偏置电路元件的外延层结构利用了由衬底,n型或p型生长外延的第一层半导体膜构成的结构 在衬底上,具有在衬底和第一层膜之间的缓冲层的可能性;在第一半导体层上外延生长的有源半导体层,其中有源层的导电类型与第一半导体层相反, 具有栅极区域和漏极区域的源极区域和与足以形成FET的栅极,漏极和源极区域的电接触的源极区域,在基板或第一半导体层上的电接触以及栅极电压偏置电路元件 电连接到栅极接触和电压极性和幅度足够的衬底或第一半导体层 以提高设备性能。 可以采用具有栅极电压偏置电路元件的外延层结构来提高半导体FET器件的功能和高频性能。
    • 3. 发明申请
    • HIGH-PERFORMANCE HETEROSTRUCTURE LIGHT EMITTING DEVICES AND METHODS
    • 高性能结构发光装置和方法
    • WO2009089198A1
    • 2009-07-16
    • PCT/US2009/030186
    • 2009-01-06
    • MOXTRONICS, INC.RYU, YungryelLEE, Tae-seokWHITE, Henry
    • RYU, YungryelLEE, Tae-seokWHITE, Henry
    • H01L29/06
    • H01L33/32H01L33/14H01L33/28H01L33/405
    • A layered heterostructure light emitting device comprises at least a substrate, an n-type gallium nitride-based semiconductor cladding layer region, a p-type gallium nitride-based semiconductor cladding layer region, a p-type zinc oxide-based hole injection layer region, and an ohmic contact layer region. Alternatively, the device may also comprise a capping layer region, or may also comprise a reflective layer region and a protective capping layer region. The device may also comprise one or more buried insertion layers adjacent to the ohmic contact layer region. The ohmic contact layer region may be comprised of materials such as indium tin oxide, gallium tin oxide, or indium tin oxide material. An n-electrode pad is formed that is in electrical contact with the n-type gallium nitride based cladding layer region. A p-type pad is formed that is in electrical contact with the p-type region.
    • 分层异质结构发光器件至少包括衬底,n型氮化镓基半导体覆层区域,p型氮化镓基半导体覆层区域,p型氧化锌基空穴注入层区域 ,以及欧姆接触层区域。 或者,该装置还可以包括覆盖层区域,或者也可以包括反射层区域和保护覆盖层区域。 该器件还可以包括与欧姆接触层区域相邻的一个或多个掩埋插入层。 欧姆接触层区域可以由诸如氧化铟锡,氧化锡锡或氧化铟锡材料的材料构成。 形成与n型氮化镓基覆层区域电接触的n电极焊盘。 形成与p型区域电接触的p型焊盘。