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1. 发明申请

WO2005088468A2 INTEGRATED CIRCUIT AND METHOD FOR MEMORY ACCESS CONTROL 审中-公开
标题翻译：集成电路和存储器访问控制方法
公开(公告)号：WO2005088468A2
公开(公告)日：2005-09-22
申请号：PCT/IB2005050816
申请日：2005-03-04
申请人： KONINKL PHILIPS ELECTRONICS NV , BURCHARD ARTUR T , HARMSZE FRANCOISE J
发明人： BURCHARD ARTUR T , HARMSZE FRANCOISE J
IPC分类号： G06F13/14 , G06F13/16
CPC分类号： G06F13/1694 , Y02D10/14
摘要： An integrated circuit comprising at least one processing module (PROC) for processing an application (APL) requiring specific communication parameter, at least one dynamic random access memory means (MM) for storing data, wherein the memory means (MM) is operable by a plurality of predefined operating modes, is provided. Additionally, at least one memory access selection means (SM) for selecting one of said plurality of predefined operating modes based on said communication parameters and at least one memory controller (MC) for controlling the access of said at least one dynamic random access memory means (MM) according to said predefined operating modes selected by said memory access selecting means (SM) is provided. Each of said memory controller (MC) are associated to one of the dynamic random access means (MM). An interconnect means (IM) couples the processing modules (PROC) and the memory controller (MC), such that the communication over the interconnect means (IM) is achieved.
摘要翻译：一种集成电路，包括用于处理需要特定通信参数的应用（APL）的至少一个处理模块（PROC），用于存储数据的至少一个动态随机存取存储器装置（MM），其中存储装置（MM）可由提供了多种预定义的操作模式。另外，至少一个用于基于所述通信参数选择所述多个预定操作模式之一的存储器访问选择装置（SM）以及用于控制所述至少一个动态随机存取存储器装置的访问的至少一个存储器控制器（MC）（MM）根据由所述存储器访问选择装置（SM）选择的所述预定义的操作模式提供。所述存储器控制器（MC）中的每一个与动态随机存取装置（MM）之一相关联。互连装置（IM）耦合处理模块（PROC）和存储器控制器（MC），从而实现通过互连装置（IM）的通信。

2. 发明申请

WO2008007273A3 A DEVICE AND A METHOD FOR MANAGING POWER CONSUMPTION OF A PLURALITY OF DATA PROCESSING UNITS 审中-公开
标题翻译：一种用于管理数据处理单元的大量功耗的设备和方法
公开(公告)号：WO2008007273A3
公开(公告)日：2008-04-10
申请号：PCT/IB2007052463
申请日：2007-06-26
申请人： KONINKL PHILIPS ELECTRONICS NV , YERMALAYEU SIARHEI , MESUT OZCAN , LUITJENS STEVEN B , VAN GASSEL JOZEF P , BURCHARD ARTUR T , DE NIJS GILEIN
发明人： YERMALAYEU SIARHEI , MESUT OZCAN , LUITJENS STEVEN B , VAN GASSEL JOZEF P , BURCHARD ARTUR T , DE NIJS GILEIN
IPC分类号： G06F1/32
CPC分类号： G06F1/3203 , G06F1/329 , Y02D10/24
摘要： A device and a method for managing power consumption of a plurality of data processing units. A scheduler (280) schedules a first process step for a first data processing unit (200) consuming a high power within a first deadline and a second process step for a second data processing unit (240) also consuming a high power within a second deadline. The scheduler further schedules the first process step and the second process step such that the two process steps do not occur concurrently thereby reducing the peak power draw from a power supply whilst preserving deadlines. This is particularly beneficial in battery-operated equipment, such as portable electronic multimedia devices, since peak power drain has been found to be an important factor in determining the battery capacity.
摘要翻译：一种用于管理多个数据处理单元的功耗的装置和方法。调度器（280）为在第一期限内消耗大功率的第一数据处理单元（200）和第二数据处理单元（240）的第二处理步骤调度第一处理步骤，所述第二数据处理单元还在第二截止期间内消耗高功率。调度器进一步调度第一处理步骤和第二处理步骤，使得两个处理步骤不同时发生，从而减少从电源的峰值功率消耗，同时保留最后期限。这在诸如便携式电子多媒体设备的电池供电设备中特别有益，因为已经发现峰值功率消耗是确定电池容量的重要因素。

3. 发明申请

WO2008129461A2 ELECTRONIC DEVICE AND METHOD OF PERFORMING A POWER MANAGEMENT IN AN ELECTRONIC DEVICE 审中-公开
标题翻译：电子设备和在电子设备中执行电源管理的方法
公开(公告)号：WO2008129461A2
公开(公告)日：2008-10-30
申请号：PCT/IB2008051440
申请日：2008-04-15
申请人： NXP BV , BURCHARD ARTUR T , MEIJER RINZE I M P
发明人： BURCHARD ARTUR T , MEIJER RINZE I M P
IPC分类号： G06F1/32
CPC分类号： G06F1/3203 , G06F1/324 , G06F1/3287 , G06F1/3296 , Y02D10/126 , Y02D10/171 , Y02D10/172
摘要： An electronic device is provided which comprises at least one functional unit (HB) for performing a processing. The functional unit (HB) receives a supply current (Isupply). The electronic device furthermore comprises a supply current monitor (SCM) for monitoring the supply current (Isupply) in order to determine an average supply current (Iavg). The electronic device furthermore comprises a characterization unit (CU) for determining a relation between the average supply current (Iavg) and an operating frequency of the functional unit. Furthermore, a slope calculation unit (SCU) is provided to determine the slope of the relation. Moreover, a power management unit (PMU) is provided to control the operation of the functional unit (HB) according to the results of the slope calculation unit (SCU) in order to control the power dissipation of the functional unit (HB).
摘要翻译：提供了一种电子设备，其包括用于执行处理的至少一个功能单元（HB）。功能单元（HB）接收电源电流（Isupply）。电子设备还包括用于监视电源电流（Isupply）的电源电流监视器（SCM），以便确定平均电源电流（Iavg）。电子设备还包括用于确定平均电源电流（Iavg）与功能单元的工作频率之间的关系的表征单元（CU）。此外，提供斜率计算单元（SCU）以确定关系的斜率。此外，提供功率管理单元（PMU），以根据斜率计算单元（SCU）的结果来控制功能单元（HB）的操作，以便控制功能单元（HB）的功率耗散。

4. 发明申请

WO2005088468B1 Integrated circuit and method for memory access control 审中-公开
标题翻译：用于存储器访问控制的集成电路和方法
公开(公告)号：WO2005088468B1
公开(公告)日：2006-06-29
申请号：PCT/IB2005050816
申请日：2005-03-04
申请人： KONINKL PHILIPS ELECTRONICS NV
发明人： BURCHARD ARTUR T , HARMSZE FRANCOISE J
IPC分类号： G06F13/14 , G06F13/16
CPC分类号： G06F13/1694 , Y02D10/14
摘要： An integrated circuit comprising at least one processing module (PROC) for processing an application (APL) requiring specific communication parameter, at least one dynamic random access memory means (MM) for storing data, wherein the memory means (MM) is operable by a plurality of predefined operating modes, is provided. Additionally, at least one memory access selection means (SM) for selecting one of said plurality of predefined operating modes based on said communication parameters and at least one memory controller (MC) for controlling the access of said at least one dynamic random access memory means (MM) according to said predefined operating modes selected by said memory access selecting means (SM) is provided. Each of said memory controller (MC) are associated to one of the dynamic random access means (MM). An interconnect means (IM) couples the processing modules (PROC) and the memory controller (MC), such that the communication over the interconnect means (IM) is achieved.
摘要翻译：一种集成电路，包括用于处理需要特定通信参数的应用（APL）的至少一个处理模块（PROC），用于存储数据的至少一个动态随机存取存储器装置（MM），其中存储装置（MM）可由提供了多种预定义的操作模式。另外，至少一个用于基于所述通信参数选择所述多个预定操作模式之一的存储器访问选择装置（SM）以及用于控制所述至少一个动态随机存取存储器装置的访问的至少一个存储器控制器（MC）（MM）根据由所述存储器访问选择装置（SM）选择的所述预定义的操作模式提供。所述存储器控制器（MC）中的每一个与动态随机存取装置（MM）之一相关联。互连装置（IM）耦合处理模块（PROC）和存储器控制器（MC），从而实现通过互连装置（IM）的通信。

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