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1. 发明申请

WO2005038883A2 MANUFACTURING METHOD OF SEMICONDUCTOR DEVICE 审中-公开
标题翻译：半导体器件的制造方法
公开(公告)号：WO2005038883A2
公开(公告)日：2005-04-28
申请号：PCT/JP2004/014284
申请日：2004-09-22
申请人： KABUSHIKI KAISHA TOSHIBA , INFINEON TECHNOLOGIES AG , IMAI, Keitaro , YAMAKAWA, Koji , ITOKAWA, Hiroshi , NATORI, Katsuaki , ARISUMI, Osamu , NAKAZAWA, Keisuke , MOON, Bum-ki
发明人： IMAI, Keitaro , YAMAKAWA, Koji , ITOKAWA, Hiroshi , NATORI, Katsuaki , ARISUMI, Osamu , NAKAZAWA, Keisuke , MOON, Bum-ki
IPC分类号： H01L21/00
CPC分类号： H01L28/60 , H01L21/76838 , H01L27/11502 , H01L27/11507 , H01L28/55
摘要： There is disclosed a method of manufacturing a semiconductor device, comprising forming an underlying region including an interlevel insulating film on a semiconductor substrate , forming an alumina film on the underlying region, forming a hole in the alumina film , filling the hole with a bottom electrode film , forming a dielectric film on the bottom electrode film, and forming a top electrode film on the dielectric film.
摘要翻译：公开了一种制造半导体器件的方法，包括在半导体衬底上形成包括层间绝缘膜的下面的区域，在下面的区域上形成氧化铝膜，在氧化铝膜上形成孔，用底部电极填充孔膜，在底部电极膜上形成电介质膜，并在电介质膜上形成顶部电极膜。

2. 发明申请

WO2003100824A3 FERROELECTRIC CAPACITOR AND METHOD OF MANUFACTURING THE SAME 审中-公开
公开(公告)号：WO2003100824A3
公开(公告)日：2003-12-04
申请号：PCT/JP2003/006671
申请日：2003-05-28
申请人： KABUSHIKI KAISHA TOSHIBA , INFINEON TECHNOLOGIES AG , ARISUMI, Osamu , IMAI, Keitaro , YAMAKAWA, Koji , MOON, Bum-ki
发明人： ARISUMI, Osamu , IMAI, Keitaro , YAMAKAWA, Koji , MOON, Bum-ki
IPC分类号： H01L29/92
摘要： semiconductor device comprises a bottom electrode, a top electrode, and a dielectric film provided between the bottom electrode and the top electrode and made of a perovskite type ferroelectrics containing Pb, Zr, Ti and O, the dielectric film comprising a first portion formed of a plurality of crystal grains partitioned by grain boundaries having a plurality of directions.

3. 发明申请

WO2003100824A2 SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME 审中-公开
标题翻译：半导体器件及其制造方法
公开(公告)号：WO2003100824A2
公开(公告)日：2003-12-04
申请号：PCT/JP2003/006671
申请日：2003-05-28
申请人： KABUSHIKI KAISHA TOSHIBA , INFINEON TECHNOLOGIES AG , ARISUMI, Osamu , IMAI, Keitaro , YAMAKAWA, Koji , MOON, Bum-ki
发明人： ARISUMI, Osamu , IMAI, Keitaro , YAMAKAWA, Koji , MOON, Bum-ki
IPC分类号： H01L
CPC分类号： H01L28/56 , H01L28/55
摘要： semiconductor device comprises a bottom electrode, a top electrode, and a dielectric film provided between the bottom electrode and the top electrode and made of a perovskite type ferroelectrics containing Pb, Zr, Ti and O, the dielectric film comprising a first portion formed of a plurality of crystal grains partitioned by grain boundaries having a plurality of directions.
摘要翻译：半导体器件包括底电极，顶电极和设置在底电极和顶电极之间并由包含Pb，Zr，Ti和O的钙钛矿型铁电体制成的电介质膜，该电介质膜包括由由具有多个方向的晶界划分的多个晶粒。

4. 发明申请

WO2003060955A3 BARRIER STACK WITH IMPROVED BARRIER PROPERTIES 审中-公开
公开(公告)号：WO2003060955A3
公开(公告)日：2003-07-24
申请号：PCT/EP2003/000114
申请日：2003-01-08
申请人： INFINEON TECHNOLOGIES AG , KABUSHIKI KAISHA TOSHIBA
发明人： NAGEL, Nicolas , IMAI, Keitaro , BEITEL, Gerhard, Adolf , HILLIGER, Andreas , MOON, Bum-Ki , YAMAKAWA, Koji
IPC分类号： H01L21/02
摘要： An improved barrier stack (390) for inhibiting diffusion of atoms or molecules, such as O 2 is disclosed. The barrier stack is particularly useful in capacitor over plug structures to prevent plug oxidation which can adversely impact the reliability of the structures. The barrier stack includes first and second barrier layers (347, 348) having mismatched grain boundaries. The barrier layers are selected from, for example, Ir, Ru, Pd, Rh, or alloys thereof. By providing mismatched grain boundaries, the interface of the layers block the diffusion path of oxygen. To further enhance the barrier properties, the first barrier layer is passivated with O 2 using, for example, a rapid thermal oxidation. The RTO forms a thin oxide layer on the surface of the first barrier layer. The oxide layer can advantageously promote mismatching of the grain boundaries of the first and second barrier layer.

5. 发明申请

WO2003060955A2 BARRIER STACK WITH IMPROVED BARRIER PROPERTIES 审中-公开
标题翻译：具有改进障碍物质的障碍物堆叠
公开(公告)号：WO2003060955A2
公开(公告)日：2003-07-24
申请号：PCT/EP2003/000114
申请日：2003-01-08
申请人： INFINEON TECHNOLOGIES AG , KABUSHIKI KAISHA TOSHIBA
发明人： NAGEL, Nicolas , IMAI, Keitaro , BEITEL, Gerhard, Adolf , HILLIGER, Andreas , MOON, Bum-Ki , YAMAKAWA, Koji
IPC分类号： H01L
CPC分类号： H01L27/11502 , H01L21/28568 , H01L27/11507 , H01L28/55 , H01L28/75
摘要： An improved barrier stack for inhibiting diffusion of atoms or molecules, such as O2 is disclosed. The barrier stack is particularly useful in capacitor over plug structures to prevent plug oxidation which can adversely impact the reliability of the structures. The barrier stack includes first and second barrier layers having mismatched grain boundaries. The barrier layers are selected from, for example, Ir, Ru, Pd, Rh, or alloys thereof. By providing mismatched grain boundaries, the interface of the layers block the diffusion path of oxygen. To further enhance the barrier properties, the first barrier layer is passivated with O2 using, for example, a rapid thermal oxidation. The RTO forms a thin oxide layer on the surface of the first barrier layer. The oxide layer can advantageously promote mismatching of the grain boundaries of the first and second barrier layer.
摘要翻译：公开了用于抑制诸如O 2的原子或分子扩散的改进的阻挡层。势垒堆叠在电容器超过插塞结构中特别有用，以防止插塞氧化，这可能不利地影响结构的可靠性。阻挡层包括具有不匹配晶界的第一和第二阻挡层。阻挡层选自例如Ir，Ru，Pd，Rh或其合金。通过提供错配的晶界，这些层的界面阻挡了氧的扩散路径。为了进一步增强阻挡性能，使用例如快速热氧化，用O 2钝化第一阻挡层。 RTO在第一阻挡层的表面上形成薄的氧化物层。氧化物层可有利地促进第一和第二阻挡层的晶界的失配。

6. 发明申请

WO2005041311A1 LIQUID CRYSTAL DISPLAY DEVICE AND METHOD FOR MANUFACTURING THE SAME, AND LIQUID CRYSTAL TELEVISION RECIEVER 审中-公开
标题翻译：液晶显示装置及其制造方法及液晶电视接收机
公开(公告)号：WO2005041311A1
公开(公告)日：2005-05-06
申请号：PCT/JP2004/016183
申请日：2004-10-25
申请人： SEMICONDUCTOR ENERGY LABORATORY CO., LTD. , YAMAZAKI, Shunpei , MAEKAWA, Shinji , FURUNO, Makoto , NAKAMURA, Osamu , IMAI, Keitaro
发明人： YAMAZAKI, Shunpei , MAEKAWA, Shinji , FURUNO, Makoto , NAKAMURA, Osamu , IMAI, Keitaro
IPC分类号： H01L29/786
CPC分类号： H01L33/08 , G02F1/1368 , G02F2001/136295 , H01L21/76838 , H01L27/12 , H01L27/1285 , H01L27/1292 , H01L29/66765 , H01L2924/0002 , Y10T428/24421 , H01L2924/00
摘要： At least one or more of a conductive layer which forms a wiring or an electrode and a pattern necessary for manufacturing a display panel such as a mask for forming a predetermined pattern is formed by a method capable of selectively forming a pattern to manufacture a liquid crystal display device. A droplet discharge method capable of forming a predetermined pattern by selectively discharging a droplet of a composition in accordance with a particular object is used as a method capable of selectively forming a pattern in forming a conductive layer, an insulating layer, or the like.
摘要翻译：通过能够选择性地形成图案以制造液晶的方法形成至少一个或多个形成布线或电极的导电层和制造用于形成预定图案的掩模等显示面板所需的图案显示设备。使用能够通过根据特定目的选择性地排出组合物的液滴来形成预定图案的液滴喷射方法作为能够在形成导电层，绝缘层等中选择性地形成图案的方法。

7. 发明申请

WO2012014952A1 SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME 审中-公开
标题翻译：半导体器件及其制造方法
公开(公告)号：WO2012014952A1
公开(公告)日：2012-02-02
申请号：PCT/JP2011/067174
申请日：2011-07-21
申请人： SEMICONDUCTOR ENERGY LABORATORY CO., LTD. , SASAKI, Toshinari , SATO, Hitomi , NODA, Kosei , ENDO, Yuta , IGARASHI, Mizuho , IMAI, Keitaro , ISOBE, Atsuo , OKAZAKI, Yutaka
发明人： SASAKI, Toshinari , SATO, Hitomi , NODA, Kosei , ENDO, Yuta , IGARASHI, Mizuho , IMAI, Keitaro , ISOBE, Atsuo , OKAZAKI, Yutaka
IPC分类号： H01L29/786 , H01L21/336
CPC分类号： H01L29/7869 , H01L29/66969 , H01L29/78603 , H01L29/78606
摘要： It is an object to manufacture a semiconductor device in which a transistor including an oxide semiconductor has normally-off characteristics, small fluctuation in electric characteristics, and high reliability. First, first heat treatment is performed on a substrate, a base insulating layer is formed over the substrate, an oxide semiconductor layer is formed over the base insulating layer, and the step of performing the first heat treatment to the step of forming the oxide semiconductor layer are performed without exposure to the air. Next, after the oxide semiconductor layer is formed, second heat treatment is performed. An insulating layer from which oxygen is released by heating is used as the base insulating layer.
摘要翻译：本发明的目的是制造其中包括氧化物半导体的晶体管具有常态特性，电特性波动小，可靠性高的半导体器件。首先，在基板上进行第一热处理，在基板上形成基极绝缘层，在基底绝缘层上形成氧化物半导体层，对形成氧化物半导体的工序进行第一热处理的工序在不暴露于空气的情况下执行层。接下来，在形成氧化物半导体层之后，进行第二热处理。使用通过加热而释放氧的绝缘层作为基底绝缘层。

8. 发明申请

WO2005022496A2 DISPLAY DEVICE AND METHOD FOR MANUFACTURING THE SAME 审中-公开
标题翻译：显示装置及其制造方法
公开(公告)号：WO2005022496A2
公开(公告)日：2005-03-10
申请号：PCT/JP2004/012599
申请日：2004-08-25
申请人： SEMICONDUCTOR ENERGY LABORATORY CO., LTD. , IMAI, Keitaro , ANZAI, Aya , WATANABE, Yasuko
发明人： IMAI, Keitaro , ANZAI, Aya , WATANABE, Yasuko
IPC分类号： G09G
CPC分类号： H01L27/3276 , H01L23/564 , H01L27/1222 , H01L27/3258 , H01L51/0005 , H01L51/5246 , H01L2924/0002 , H01L2924/00
摘要： It is an object of the present invention to provide a display device preventing the external invasion of water and/or oxygen and preventing the deterioration of a luminous element due to these invading substances and to provide a production method including simple production steps for producing the display device. The invention provides a display device having a sealing material on the rim of an exposed interlayer insulator for preventing the invasion of water and/or oxygen from the interlayer insulator. Further, the invention provides a display device having a barrier body on an exposed interlayer insulator for preventing the invasion of water and/or oxygen from the interlayer insulator. Furthermore, the application of droplet discharge technique in production steps for producing the display device can eliminate a photolithography step such as exposing and developing. Thus, a method of producing a display device having an improved yield is provided.
摘要翻译：本发明的目的是提供一种防止水和/或氧的外部侵入并防止由这些侵入物质引起的发光元件的劣化的显示装置，并且提供一种制造方法包括用于制造显示装置的简单生产步骤。本发明提供了一种显示装置，其在暴露的层间绝缘体的边缘上具有密封材料，用于防止来自层间绝缘体的水和/或氧的侵入。此外，本发明提供了一种显示装置，该显示装置在暴露的层间绝缘体上具有阻挡体，用于防止来自层间绝缘体的水和/或氧的侵入。此外，在用于制造显示装置的制造步骤中应用液滴排放技术可以消除诸如曝光和显影的光刻步骤。因此，提供了一种生产具有提高的成品率的显示装置的方法。

9. 发明申请

WO2011152286A1 SEMICONDUCTOR DEVICE 审中-公开
标题翻译：半导体器件
公开(公告)号：WO2011152286A1
公开(公告)日：2011-12-08
申请号：PCT/JP2011/062144
申请日：2011-05-20
申请人： SEMICONDUCTOR ENERGY LABORATORY CO., LTD. , ISOBE, Atsuo , IEDA, Yoshinori , IMAI, Keitaro , KATO, Kiyoshi , YAKUBO, Yuto , HATA, Yuki
发明人： ISOBE, Atsuo , IEDA, Yoshinori , IMAI, Keitaro , KATO, Kiyoshi , YAKUBO, Yuto , HATA, Yuki
IPC分类号： H01L21/8242 , H01L21/02 , H01L21/20 , H01L21/265 , H01L21/324 , H01L21/8234 , H01L21/8247 , H01L27/08 , H01L27/088 , H01L27/108 , H01L27/115 , H01L27/12 , H01L29/786 , H01L29/788 , H01L29/792
CPC分类号： H01L27/105 , H01L27/1052 , H01L27/108 , H01L27/1156 , H01L27/1225 , H01L28/60
摘要： The semiconductor device is provided in which a plurality of memory cells each including a first transistor, a second transistor, and a capacitor is arranged in matrix and a wiring (also referred to as a bit line) for connecting one of the memory cells and another one of the memory cells and a source or drain region in the first transistor are electrically connected through a conductive layer and a source or drain electrode in the second transistor provided therebetween. With this structure, the number of wirings can be reduced in comparison with a structure in which the source or drain electrode in the first transistor and the source or drain electrode in the second transistor are connected to different wirings. Thus, the integration degree of a semiconductor device can be increased.
摘要翻译：提供了一种半导体器件，其中包括第一晶体管，第二晶体管和电容器的多个存储单元被布置成矩阵，并且布线（也称为位线）用于连接其中一个存储单元和另一个第一晶体管中的一个存储单元和源极或漏极区域通过导电层和设置在其间的第二晶体管中的源极或漏极电连接。利用这种结构，与第一晶体管中的源极或漏极以及第二晶体管中的源极或漏极连接到不同布线的结构相比，可以减少布线的数量。因此，可以提高半导体器件的集成度。

10. 发明申请

WO2011052351A1 SEMICONDUCTOR DEVICE 审中-公开
标题翻译：半导体器件
公开(公告)号：WO2011052351A1
公开(公告)日：2011-05-05
申请号：PCT/JP2010/067496
申请日：2010-09-29
申请人： SEMICONDUCTOR ENERGY LABORATORY CO., LTD. , YAMAZAKI, Shunpei , IMAI, Keitaro , KOYAMA, Jun
发明人： YAMAZAKI, Shunpei , IMAI, Keitaro , KOYAMA, Jun
IPC分类号： H01L21/8234 , H01L21/8238 , H01L27/00 , H01L27/06 , H01L27/08 , H01L27/088 , H01L27/092 , H01L29/786 , H03K19/20
CPC分类号： H01L27/10802 , G11C11/404 , G11C11/405 , G11C16/02 , H01L21/8258 , H01L27/0688 , H01L27/088 , H01L27/0922 , H01L27/105 , H01L27/1156 , H01L27/12 , H01L27/1225 , H01L29/7869
摘要： The semiconductor device includes: a transistor having an oxide semiconductor layer; and a logic circuit formed using a semiconductor material other than an oxide semiconductor. One of a source electrode and a drain electrode of the transistor is electrically connected to at least one input of the logic circuit, and at least one input signal is applied to the logic circuit through the transistor. The off-current of the transistor is preferably 1 x 10 -13 A or less.
摘要翻译：半导体器件包括：具有氧化物半导体层的晶体管; 以及使用除了氧化物半导体之外的半导体材料形成的逻辑电路。晶体管的源电极和漏电极中的一个电连接到逻辑电路的至少一个输入端，并且至少一个输入信号通过晶体管施加到逻辑电路。晶体管的截止电流优选为1×10-13A以下。

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