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1. 发明申请

WO2006025999A1 A METHOD AND APPARATUS FOR CONTROLLING POWER MANAGEMENT STATE TRANSITIONS 审中-公开
标题翻译：一种用于控制电力管理状态转换的方法和装置
公开(公告)号：WO2006025999A1
公开(公告)日：2006-03-09
申请号：PCT/US2005/026941
申请日：2005-07-29
申请人： INTEL CORPORATION , KURTS, Tsvika , NAVEH, Alon , ROTEM, Efraim , DENDINGER, Brad , RODRIGUEZ, Jorge , KNOLL, Ernest , POISNER, David
发明人： KURTS, Tsvika , NAVEH, Alon , ROTEM, Efraim , DENDINGER, Brad , RODRIGUEZ, Jorge , KNOLL, Ernest , POISNER, David
IPC分类号： G06F1/32
CPC分类号： G06F1/324 , G06F1/3203 , G06F1/3296 , Y02D10/126 , Y02D10/172
摘要： An integrated circuit device, such as a processor initiates a transition to a first power management state. The device then receives a request to exit the first power management state and, in response exits the first power management state at the highest of a reference operating voltage, such as a minimum operating voltage, and a current voltage. For one aspect, an analog to digital converter may be used to determine the current voltage level. Further, for one aspect the first power management state may be a deeper sleep (C4) state, and the processor may quickly exit to a C2 state in response to a bus event such as a bus snoop.
摘要翻译：诸如处理器的集成电路器件启动向第一电源管理状态的转变。然后，设备接收到退出第一电源管理状态的请求，并且响应于退出基准工作电压（例如最小工作电压）和当前电压的最高处的第一电源管理状态。一方面，可以使用模数转换器来确定当前的电压电平。此外，对于一个方面，第一功率管理状态可以是更深的睡眠（C4）状态，并且处理器可以响应于总线事件（例如总线监听）而快速退出到C2状态。

2. 发明申请

WO2003090051A3 PROTECTION AGAINST MEMORY ATTACKS FOLLOWING RESET 审中-公开
公开(公告)号：WO2003090051A3
公开(公告)日：2003-10-30
申请号：PCT/US2003/011346
申请日：2003-04-10
申请人： INTEL CORPORATION
发明人： GRAWROCK, David , POISNER, David , SUTTON, James, II
IPC分类号： G06F1/00
摘要： Methods, apparatus and computer readable medium are described that attempt to protect secrets from system reset attacks. In some embodiments, the memory is locked after a system reset and secrets removed from the memory before the memory is unlocked.

3. 发明申请

WO2003090051A2 PROTECTION AGAINST MEMORY ATTACKS FOLLOWING RESET 审中-公开
标题翻译：防止重置存储器触发的保护
公开(公告)号：WO2003090051A2
公开(公告)日：2003-10-30
申请号：PCT/US2003/011346
申请日：2003-04-10
申请人： INTEL CORPORATION
发明人： GRAWROCK, David , POISNER, David , SUTTON, James, II
IPC分类号： G06F1/00
CPC分类号： G06F21/62 , G06F12/1433 , G06F2221/2143
摘要： Methods, apparatus and computer readable medium are described that attempt to protect secrets from system reset attacks. In some embodiments, the memory is locked after a system reset and secrets removed from the memory before the memory is unlocked.
摘要翻译：描述了尝试保护秘密免受系统重置攻击的方法，装置和计算机可读介质。在一些实施例中，在系统复位之后，存储器被锁定，并且在存储器被解锁之前秘密地从存储器移除。

4. 发明申请

WO2015077978A1 CONTROLLING A CAMERA WITH FACE DETECTION 审中-公开
标题翻译：控制摄像机与脸部检测
公开(公告)号：WO2015077978A1
公开(公告)日：2015-06-04
申请号：PCT/CN2013/088145
申请日：2013-11-29
申请人： INTEL CORPORATION , CHENG, Liang , MA, Lili , HAN, Hemin , POISNER, David , QUIET, Duane
发明人： CHENG, Liang , MA, Lili , HAN, Hemin , POISNER, David , QUIET, Duane
IPC分类号： G03B17/00 , G06K9/00
CPC分类号： H04N5/23219 , G06F3/011 , G06F3/012 , G06F3/017 , G06K9/00221 , G06K9/00255 , G06K9/00335 , G06K9/6202 , H04N5/23216 , H04N5/247
摘要： An electronic device (100) with a first camera (114) and a second camera (116) is described. The first camera (114) receives a first image stream, and the second camera (116) receives a second image stream that includes a face of a user of the electronic device (100). The electronic device (100) also includes a camera control module (122) that identifies gesture based on a change in the second image stream, identifies a camera control feature of the first camera based on the gesture, and activates the camera control feature for the first camera.
摘要翻译：描述了具有第一相机（114）和第二相机（116）的电子设备（100）。第一相机（114）接收第一图像流，并且第二相机（116）接收包括电子设备（100）的用户面部的第二图像流。电子设备（100）还包括基于第二图像流的改变来识别手势的相机控制模块（122），基于手势识别第一相机的相机控制特征，并激活相机控制特征第一台相机

5. 发明申请

WO2006060237A2 PREVENTION OF DATA LOSS DUE TO POWER FAILURE 审中-公开
标题翻译：防止由于电力故障导致的数据丢失
公开(公告)号：WO2006060237A2
公开(公告)日：2006-06-08
申请号：PCT/US2005/042314
申请日：2005-11-17
申请人： INTEL CORPORATION , POISNER, David , STEVENS, William
发明人： POISNER, David , STEVENS, William
CPC分类号： G06F11/1441 , G06F12/0804
摘要： In some embodiment, an arrangement is provided to prevent a loss of data in a memory due to a power failure for a computing system. When the power failure occurs, any pending memory write operations may be completed and dirty cache lines may be flushed back to the memory. Subsequently, the computing system may be put into a loss-prevention state, under which power may be turned off for all components in the computing system except the memory. The memory is powered by a battery pack which includes batteries and is in a self refresh state. When the power returns, applications and operating systems running in the computing system may resume what is left out when the power supply failure occurs, based at least in part on data retained in the memory. Other embodiments are described and claimed.
摘要翻译：在一些实施例中，提供一种布置以防止由于计算系统的电力故障而导致存储器中的数据丢失。发生电源故障时，可能会完成任何挂起的内存写入操作，并且脏高速缓存行可能会被刷新回内存。随后，计算系统可以进入防止丢失状态，在该状态下，除了存储器之外，可以关闭计算系统中的所有组件的电力。内存由包含电池的电池组供电，并处于自刷新状态。当电源恢复时，在计算系统中运行的应用程序和操作系统可以恢复当电源发生故障时遗漏的内容，至少部分基于保存在存储器中的数据。描述并要求保护其他实施例。

6. 发明申请

WO2005006159A1 TRUSTED PERIPHERAL MECHANISM 审中-公开
标题翻译：有害的外围机制
公开(公告)号：WO2005006159A1
公开(公告)日：2005-01-20
申请号：PCT/US2004/019254
申请日：2004-06-16
申请人： INTEL CORPORATION
发明人： POISNER, David
IPC分类号： G06F1/00
CPC分类号： G06F21/82
摘要： According to one embodiment, computer system is disclosed. The computer system includes a central processing unit (CPU), and a chipset coupled to the CPU including protected registers and a host controller. The computer system also includes a bus coupled to the host controller and a peripheral device coupled the bus. Trusted software accesses the protected registers to transmit encrypted data between the host controller and the peripheral device upon startup of the computer system to verify that the peripheral device is trustworthy.
摘要翻译：根据一个实施例，公开了一种计算机系统。计算机系统包括中央处理单元（CPU）和耦合到CPU的芯片组，包括受保护的寄存器和主机控制器。计算机系统还包括耦合到主控制器的总线和耦合总线的外围设备。受信任的软件访问受保护的寄存器，以在计算机系统启动时在主机控制器和外围设备之间传输加密数据，以验证外围设备是否可靠。

7. 发明申请

WO2004095298A2 METHOD AND APPARATUS FOR DETECTING MEMORY DEVICE INTERFACE 审中-公开
标题翻译：用于检测存储器件接口的方法和装置
公开(公告)号：WO2004095298A2
公开(公告)日：2004-11-04
申请号：PCT/US2004/004220
申请日：2004-02-11
申请人： INTEL CORPORATION
发明人： POISNER, David
IPC分类号： G06F13/00
CPC分类号： G06F13/4243 , G11C5/066
摘要： Apparatus and method for providing a multiplexed bus supporting the coupling of either one of a device having a first bus type interface and a device having a second bus type interface where the multiplexed bus is made up, at least in part, of a plurality of common signal lines that may be coupled to either type of device, and that may be used to carry out transfers with protocols and timings for either bus.

8. 发明申请

WO2004061630A1 TRUSTED REAL TIME CLOCK 审中-公开
标题翻译： TRUSTED实时时钟
公开(公告)号：WO2004061630A1
公开(公告)日：2004-07-22
申请号：PCT/US2003/039565
申请日：2003-12-11
申请人： INTEL CORPORATION
发明人： POISNER, David
IPC分类号： G06F1/00
CPC分类号： G06F1/14 , G06F21/55 , G06F21/725
摘要： Methods, apparatus and computer readable medium are described that attempt increase trust in a wall time provided by a real time clock. In some embodiments, a detector detects activities that may be associated with attacks against the real time clock. Based upon whether the detector detects a possible attack against the real time clock, the computing device may determine whether or not to trust the wall time provided by the real time clock.
摘要翻译：描述了尝试增加由实时时钟提供的墙壁时间的信任的方法，装置和计算机可读介质。在一些实施例中，检测器检测可能与针对实时时钟的攻击相关联的活动。基于检测器是否检测到针对实时时钟的可能的攻击，计算设备可以确定是否信任由实时时钟提供的墙壁时间。

9. 发明申请

WO2004003711A3 SLEEP ATTACK PROTECTION 审中-公开
公开(公告)号：WO2004003711A3
公开(公告)日：2004-01-08
申请号：PCT/US2003/019597
申请日：2003-06-20
申请人： INTEL CORPORATION
发明人： GRAWCOCK, David , POISNER, David
IPC分类号： G06F1/00
摘要： Methods, apparatus and machine-readable medium are described that attempt to protect secrets from sleep attacks. In some embodiments, the secrets are encrypted and a security enhanced environment dismantled prior to entering a sleep state. Some embodiments further re-establish a security enhanced environment and decrypt the secrets in response to a wake event.

10. 发明申请

WO2017105691A1 NETWORKED SENSOR SYSTEMS AND METHODS 审中-公开
标题翻译：联网传感器系统和方法
公开(公告)号：WO2017105691A1
公开(公告)日：2017-06-22
申请号：PCT/US2016/061472
申请日：2016-11-11
申请人： INTEL CORPORATION
发明人： POISNER, David , KRIMON, Yuri
IPC分类号： A63F13/814 , A63F13/424 , A63F13/211
CPC分类号： G08B21/182 , A63F13/211 , A63F13/212 , A63F13/245 , A63F13/285 , A63F13/42 , A63F13/46 , G06F17/30032 , G06F17/30368 , G06F17/30551
摘要： Embodiments of a system and methods for using a sensing attached to footwear are generally described herein. A device may include an accelerometer to measure a force, a transceiver to: send information about the force to an external device, and receive a response from the external device, the response indicating whether the force exceeded a threshold and occurred within a specified timing window around a sensory output. The device may include feedback hardware to generate feedback when the response indicates that the force fell below the threshold or occurred outside the specified timing window.
摘要翻译：这里总体上描述了用于使用附接到鞋类上的传感的系统和方法的实施例。装置可以包括加速度计以测量力，收发器用于：将关于力的信息发送到外部装置，并且从外部装置接收响应，所述响应指示力是否超过阈值并且发生在指定的时间窗内围绕感官输出。该设备可能包括反馈硬件，以在响应指示该力低于阈值或发生在指定的时间窗口外时生成反馈。

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