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1. 发明申请

WO2007089223A3 ULTRALOW DIELECTRIC CONSTANT LAYER WITH CONTROLLED BIAXIAL STRESS 审中-公开
标题翻译：具有可控双轴应力的ULTRALOW介电常数层
公开(公告)号：WO2007089223A3
公开(公告)日：2007-11-01
申请号：PCT/US2006001154
申请日：2006-01-12
申请人： IBM , DIMITRAKOPOULOS CHRISTOS D , GATES STEPHEN M , GRILL ALFRED , LANE MICHAEL W , LINIGER ERIC G , LIU XIAO HU , NGUYEN SON VAN , NEUMAYER DEBORAH A , SHAW THOMAS M
发明人： DIMITRAKOPOULOS CHRISTOS D , GATES STEPHEN M , GRILL ALFRED , LANE MICHAEL W , LINIGER ERIC G , LIU XIAO HU , NGUYEN SON VAN , NEUMAYER DEBORAH A , SHAW THOMAS M
IPC分类号： H01L21/20 , B05C11/00 , B32B3/26
CPC分类号： H01L21/76834 , C23C16/30 , C23C16/56 , H01L21/02126 , H01L21/02203 , H01L21/02274 , H01L21/02282 , H01L21/02348 , H01L21/3105 , H01L21/31058 , H01L21/31633 , H01L21/76801 , H01L21/76825 , H01L21/76828 , H01L21/76829 , H01L21/76832 , Y10T428/249953 , Y10T428/249969 , Y10T428/249979
摘要： A method for forming a ultralow dielectric constant layer with controlled biaxial stress is described incorporating the steps of forming a layer containing Si, C, O and H by one of PECVD and spin-on coating and curing the film in an environment containing very low concentrations of oxygen and water each less than 10 ppm. A material is also described by using the method with a dielectric constant of not more than 2.8. The invention overcomes the problem of forming films with low biaxial stress less than 46 MPa.
摘要翻译：描述了一种用于形成具有受控双轴应力的超低介电常数层的方法，其包括通过PECVD和旋涂涂覆之一形成含有Si，C，O和H的层并且在包含非常低浓度的氧气和水每个小于10ppm。还通过使用介电常数不超过2.8的方法来描述材料。本发明克服了形成低双轴应力小于46MPa的薄膜的问题。

2. 发明申请

WO2008091985A3 DIELECTRIC CAP HAVING MATERIAL WITH OPTICAL BAND GAP TO SUBSTANTIALLY BLOCK UV RADIATION DURING CURING TREATMENT, AND RELATED METHODS 审中-公开
标题翻译：具有光学带隙的材料以在固化治疗期间基本上阻断紫外线辐射的介电帽及相关方法
公开(公告)号：WO2008091985A3
公开(公告)日：2008-10-02
申请号：PCT/US2008051870
申请日：2008-01-24
申请人： IBM , BELYANSKY MICHAEL P , BONILLA GRISELDA , LIU XIAO HU , NGUYEN SON VAN , SHAW THOMAS M , SHOBHA HOSADURGA K , YANG DAEWON
发明人： BELYANSKY MICHAEL P , BONILLA GRISELDA , LIU XIAO HU , NGUYEN SON VAN , SHAW THOMAS M , SHOBHA HOSADURGA K , YANG DAEWON
IPC分类号： H01L23/12
CPC分类号： H01L21/02123 , H01L21/02126 , H01L21/02167 , H01L21/0217 , H01L21/02274 , H01L21/02348 , H01L21/318 , H01L21/3185 , H01L21/76826 , H01L21/76828 , H01L21/76834
摘要： A dielectric cap (100) and related methods are disclosed. In one embodiment, the dielectric cap (100) includes a dielectric material (108) having an optical band gap (e.g., greater than about 3.0 electron-Volts) to substantially block ultraviolet radiation during a curing treatment, and including nitrogen with electron donor, double bond electrons. The dielectric cap (100) exhibits a high modulus and is stable under post ULK UV curing treatments for, for example, copper low k back-end-of-line (BEOL) nanoelectronic devices, leading to less film and device cracking and improved reliability.
摘要翻译：公开了一种电介质帽（100）和相关方法。在一个实施例中，电介质帽（100）包括具有光学带隙（例如，大于约3.0电子伏特）的介电材料（108）以在固化处理期间基本上阻挡紫外辐射，并且包括具有电子供体的氮，双键电子。电介质帽（100）表现出高模量，并且在例如铜低k线后端（BEOL）纳米电子器件的ULK UV固化处理下稳定，导致更少的膜和器件开裂以及更高的可靠性。

3. 发明申请

WO2011084667A2 INTERCONNECT STRUCTURE WITH A MUSHROOM-SHAPED OXIDE CAPPING LAYER AND METHOD FOR FABRICATING SAME 审中-公开
标题翻译：具有蘑菇状氧化物覆盖层的互连结构及用于制造相同结构的方法
公开(公告)号：WO2011084667A2
公开(公告)日：2011-07-14
申请号：PCT/US2010060933
申请日：2010-12-17
申请人： IBM , NGUYEN SON VAN , GRILL ALFRED , HAIGH THOMAS J , SHOBHA HOSADURGA , VO TUAN A
发明人： NGUYEN SON VAN , GRILL ALFRED , HAIGH THOMAS J , SHOBHA HOSADURGA , VO TUAN A
IPC分类号： H01L21/768 , H01L21/28
CPC分类号： H01L21/76849 , H01L21/76846 , H01L21/76864 , H01L21/76867
摘要： An interconnect structure is provided that includes a dielectric material (52) having a dielectric constant of 4.0 or less and including a plurality of conductive features (56) embedded therein. The dielectric material (52) has an upper surface that is located beneath an upper surface of each of the plurality of conductive features (56). A first dielectric cap (58) is located on the upper surface of the dielectric material (52) and extends onto at least a portion of the upper surface of each of the plurality of conductive features (56). As shown, the first dielectric cap (58) forms an interface (59) with each of the plurality of conductive features (56) that is opposite to an electrical field that is generated by neighboring conductive features. The inventive structure also includes a second dielectric cap (60) located on an exposed portion of the upper surface of each of the plurality of conductive features (56) not covered with the first dielectric cap (58). The second dielectric cap (60) further covers on an exposed surface of the first dielectric cap (58).
摘要翻译：提供了一种互连结构，其包括介电常数为4.0或更小并且包括嵌入其中的多个导电部件（56）的介电材料（52）。介电材料（52）具有位于多个导电部件（56）中的每一个的上表面下方的上表面。第一电介质帽（58）位于电介质材料（52）的上表面上并且延伸到多个导电部件（56）中的每一个的上表面的至少一部分上。如所示，第一电介质帽（58）与多个导电特征（56）中的每一个形成与由相邻导电特征产生的电场相反的界面（59）。本发明的结构还包括位于未被第一电介质帽（58）覆盖的多个导电部件（56）中的每一个的上表面的暴露部分上的第二电介质帽（60）。第二电介质帽（60）还覆盖在第一电介质帽（58）的暴露表面上。

4. 发明申请

WO2004079814B1 MODULATED/COMPOSITED CVD LOW-K FILMS WITH IMPROVED MECHANICAL AND ELECTRICAL PROPERTIES FOR NANOELECTRONIC DEVICES 审中-公开
标题翻译：用于纳米电子器件的具有改进的机械和电性质的调制/复合CVD低K膜
公开(公告)号：WO2004079814B1
公开(公告)日：2005-03-17
申请号：PCT/US2004006265
申请日：2004-03-02
申请人： APPLIED MATERIALS INC , NGUYEN SON VAN , ZHENG YI
发明人： NGUYEN SON VAN , ZHENG YI
IPC分类号： C23C16/40 , C23C16/515 , H01L21/312 , H01L21/316
CPC分类号： H01L21/02126 , C23C16/401 , C23C16/515 , H01L21/02216 , H01L21/02274 , H01L21/0228 , H01L21/02351 , H01L21/3122 , H01L21/31633 , Y10T428/31663
摘要： A method for depositing a low dielectric constant film is provided. The low dielectric constant film includes alternating sublayers, which include at least one carbon-doped silicon oxide sublayer. The sublayers are deposited by a plasma process than includes pulses of RF power. The alternating sublayers are deposited from two or more compounds that include at least one organosilicon compound. The two or more compounds and processing conditions are selected such that adjacent sublayers have different and improved mechanical properties.
摘要翻译：提供了用于沉积低介电常数膜的方法。低介电常数膜包括交替的子层，其包括至少一个碳掺杂的氧化硅子层。通过等离子体工艺沉积子层，而不包括RF功率的脉冲。交替的亚层由两种或更多种包含至少一种有机硅化合物的化合物沉积。选择两种或更多种化合物和加工条件，使得相邻的亚层具有不同的和改进的机械性能。

5. 发明申请

WO2004104698A3 DIELECTRIC MATERIALS TO PREVENT PHOTORESIST POISONING 审中-公开
标题翻译：电介质材料，以防止光催化污染
公开(公告)号：WO2004104698A3
公开(公告)日：2005-04-14
申请号：PCT/US2004015531
申请日：2004-05-18
申请人： APPLIED MATERIALS INC , NGUYEN SON VAN , ARMACOST MICHAEL D , NAIK MEHUL , DIXIT GIRISH A , YIEH ELLIE Y
发明人： NGUYEN SON VAN , ARMACOST MICHAEL D , NAIK MEHUL , DIXIT GIRISH A , YIEH ELLIE Y
IPC分类号： G03F20060101 , G03F7/09 , G03F7/11 , H01L21/027 , H01L21/311 , H01L21/316 , H01L21/768
CPC分类号： G03F7/091 , G03F7/11 , H01L21/0276 , H01L21/31144 , H01L21/76808 , H01L21/7681 , H01L21/76826 , H01L21/76834 , H01L21/76835
摘要： Methods are provided for depositing a dielectric material for use as an anti-reflective coating and sacrificial dielectric material in damascene formation. In one aspect, a process is provided for processing a substrate including depositing an acidic dielectric layer on the substrate by reacting an oxygen-containing organosilicon compound and an acidic compound, depositing a photoresist material on the acidic dielectric layer, and patterning the photoresist layer. The acidic dielectric layer may be used as a sacrificial layer in forming a feature definition by etching a partial feature definition, depositing the acidic dielectric material, etching the remainder of the feature definition, and then removing the acidic dielectric material to form a feature definition.
摘要翻译：提供了用于沉积电介质材料的方法，用作抗镶嵌层中的抗反射涂层和牺牲电介质材料。在一个方面，提供了一种处理衬底的方法，包括通过使含氧有机硅化合物和酸性化合物反应，在酸性电介质层上沉积光致抗蚀剂材料，并使光致抗蚀剂层图形化，在衬底上沉积酸性介电层。通过蚀刻部分特征定义，沉积酸性电介质材料，蚀刻特征定义的其余部分，然后除去酸性介电材料以形成特征定义，酸性介电层可用作形成特征定义的牺牲层。

6. 发明申请

WO2004079814A3 MODULATED/COMPOSITED CVD LOW-K FILMS WITH IMPROVED MECHANICAL AND ELECTRICAL PROPERTIES FOR NANOELECTRONIC DEVICES 审中-公开
标题翻译：具有改进的纳米电子设备的机械和电气特性的调制/组合CVD低K膜
公开(公告)号：WO2004079814A3
公开(公告)日：2005-01-13
申请号：PCT/US2004006265
申请日：2004-03-02
申请人： APPLIED MATERIALS INC , NGUYEN SON VAN , ZHENG YI
发明人： NGUYEN SON VAN , ZHENG YI
IPC分类号： C23C16/40 , C23C16/515 , H01L21/312 , H01L21/316
CPC分类号： H01L21/02126 , C23C16/401 , C23C16/515 , H01L21/02216 , H01L21/02274 , H01L21/0228 , H01L21/02351 , H01L21/3122 , H01L21/31633 , Y10T428/31663
摘要： A method for depositing a low dielectric constant film is provided. The low dielectric constant film includes alternating sublayers, which include at least one carbon-doped silicon oxide sublayer. The sublayers are deposited by a plasma process than includes pulses of RF power. The alternating sublayers are deposited from two or more compounds that include at least one organosilicon compound. The two or more compounds and processing conditions are selected such that adjacent sublayers have different and improved mechanical properties.
摘要翻译：提供了一种沉积低介电常数膜的方法。低介电常数膜包括交替的亚层，其包括至少一个碳掺杂的氧化硅子层。子层通过等离子体处理而不是包括RF功率的脉冲进行沉积。交替的亚层由两种或更多种包含至少一种有机硅化合物的化合物沉积。选择两种或更多种化合物和加工条件使得相邻的亚层具有不同的和改进的机械性能。

7. 发明申请

WO2004082010A2 METHOD OF IMPROVING INTERLAYER ADHESION 审中-公开
标题翻译：改善层间粘合的方法
公开(公告)号：WO2004082010A2
公开(公告)日：2004-09-23
申请号：PCT/US2004006849
申请日：2004-03-05
申请人： APPLIED MATERIALS INC , SCHMITT FRANCIMAR C , XIA LI-QUN , NGUYEN SON VAN , VENKATARAMAN SHANKAR
发明人： SCHMITT FRANCIMAR C , XIA LI-QUN , NGUYEN SON VAN , VENKATARAMAN SHANKAR
IPC分类号： C23C16/02 , C23C16/30 , C23C16/32 , C23C16/505 , C23C16/56 , H01L21/3105 , H01L21/312 , H01L21/314 , H01L21/316 , H01L21/768 , H01L21/31
CPC分类号： H01L21/76835 , C23C16/0272 , C23C16/30 , C23C16/325 , C23C16/505 , C23C16/56 , H01L21/02126 , H01L21/02167 , H01L21/022 , H01L21/02203 , H01L21/02211 , H01L21/02274 , H01L21/0228 , H01L21/02304 , H01L21/0234 , H01L21/02351 , H01L21/3105 , H01L21/31058 , H01L21/3121 , H01L21/3148 , H01L21/31633 , H01L21/76801 , H01L21/7681 , H01L21/76825 , H01L21/76826 , H01L21/76829 , H01L21/76832
摘要： Methods are provided for processing a substrate for depositing an adhesion layer having a low dielectric constant between two low k dielectric layers. In one aspect, the invention provides a method for processing a substrate including depositing a barrier layer on the substrate, wherein the barrier layer comprises silicon and carbon and has a dielectric constant less than 4, depositing a dielectric initiation layer adjacent the barrier layer, and depositing a first dielectric layer adjacent the dielectric initiation layer, wherein the dielectric layer comprises silicon, oxygen, and carbon and has a dielectric constant of about 3 or less.
摘要翻译：提供了用于处理用于沉积在两个低k电介质层之间具有低介电常数的粘合层的衬底的方法。一方面，本发明提供了一种用于处理衬底的方法，包括在衬底上沉积阻挡层，其中阻挡层包括硅和碳并具有小于4的介电常数，沉积与阻挡层相邻的介电起始层，以及沉积与电介质起始层相邻的第一电介质层，其中介电层包括硅，氧和碳并且具有约3或更小的介电常数。

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