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1. 发明申请

WO2008067748A1 METHOD AND SYSTEM FOR REDUNDANT THERMOELECTRIC COOLERS FOR INTEGRATED DWDM TRANSMITTER/RECEIVER 审中-公开
标题翻译：用于集成DWDM发射机/接收机的冗余热电冷却器的方法和系统
公开(公告)号：WO2008067748A1
公开(公告)日：2008-06-12
申请号：PCT/CN2007/071128
申请日：2007-11-26
申请人： HUAWEI TECHNOLOGIES CO., LTD. , SHEN, Xiao Andy , BAI, Yusheng
发明人： SHEN, Xiao Andy , BAI, Yusheng
IPC分类号： H01L23/38 , F25B21/02
CPC分类号： F25B21/02 , G02B6/12019 , G02B6/12026 , H01S5/02415 , H01S5/0268 , H01S5/4031
摘要： A thermoelectric cooler apparatus for a fiber optic system includes a first plate(521 ) coupled to the fiber optic system and a second plate(522) for coupling to a heat sink. The apparatus includes a first plurality of thermoelectric units and a second plurality of thermoelectric units being sandwiched between the first plate(521) and the second plate(522) for enhancing or retarding a heat transfer between the first plate(521) and the second plate(522). The first plurality of thermoelectric units (502 4 , 501 4 , 502 3 ,501 3 , 502 2 , 501 2 , 502 1 , 501 1 ) is connected to each other electrically in series. The second plurality of thermoelectric units (511 1 ,512 1 ,511 2 ,511 3 ) is connected to each other electrically in series but insulated from the first plurality of thermoelectric units. The first plurality of thermoelectric units (502 4 , 501 4 , 502 3 ,501 3 , 502 2, 501 2 , 502 1 , 501 1 ) and the second plurality of thermoelectric units (511 1 ,512 1 ,511 2 ,511 3 ) are configured such that a cross-section of the apparatus includes one or more of the second plurality of thermoelectric units being sandwiched by the first plurality of thermoelectric units.
摘要翻译：用于光纤系统的热电冷却器装置包括耦合到光纤系统的第一板（521）和用于耦合到散热器的第二板（522）。该装置包括第一多个热电单元和夹在第一板（521）和第二板（522）之间的第二多个热电单元，用于增强或延迟第一板（521）和第二板（522）。第一组多个热电单元（502,401,501,502,502,501,502，...，502） > 2 <！ - SIPO - > 501，501 ，502 <1> 1，501 <1>）彼此串联连接。第二组多个热电单元（511 1，512 1，511 2，511 3）连接到彼此电串联但与第一多个热电单元绝缘。第一组多个热电单元（502,401,501,502,502,501,502，...，502）第二多个热电单元（511S1），第二多个热电单元（511），第二多个热电单元 512/1，512 2，511 3 3）被构造成使得装置的横截面包括一个或多个的第二多个热电单元被第一多个热电单元夹持。

2. 发明申请

WO2020133951A1 MULTI-CHANNEL MODE CONVERTERS WITH SILICON LENSES 审中-公开
公开(公告)号：WO2020133951A1
公开(公告)日：2020-07-02
申请号：PCT/CN2019/091406
申请日：2019-06-14
申请人： HUAWEI TECHNOLOGIES CO., LTD.
发明人： MIAO, Rongsheng , ZHENG, Xueyan , SHEN, Xiao Andy , BAI, Yu Sheng
IPC分类号： G02B6/32
摘要： A multi-channel mode converter (100) includes a lens array (110) having a first lens and a second lens, a glass block (120) coupled to the lens array (110), and a fiber assembly unit (FAU) array (130) coupled to the glass block (120), the FAU array (130) including a first fiber (140) corresponding to the first lens (165), and a second fiber (140) corresponding to the second lens (165). The FAU array(130) provides for a corresponding number of fibers (140) and lenses (165) such that a specific single fiber (140) corresponds to a specific single lens (165), there being a 1: 1 relationship between fibers (140) and lenses (165). A mode converter system (600) comprises: a lens array(110) comprising: a first silicon lens (165) configured to convert a first mode between a first waveguide (620) and a first fiber (140), and a second silicon lens (165) configured to convert a second mode between a second waveguide (620) and a second fiber (140), and a glass block(120) coupled to the lens array(110) and configured to provide an optical path for a first light beam corresponding to the first silicon lens (165) and a second light beam corresponding to the second silicon lens (165).

3. 发明申请

WO2016206406A1 OPTICAL EDGE COUPLING WITH A SEPARATE TRIMMED TAPER 审中-公开
标题翻译：光学边缘与单独的三角形接头联接
公开(公告)号：WO2016206406A1
公开(公告)日：2016-12-29
申请号：PCT/CN2016/075859
申请日：2016-03-08
申请人： HUAWEI TECHNOLOGIES CO., LTD.
发明人： YANG, Li , PAN, Huapu , BAI, Yusheng , SHEN, Xiao Andy
IPC分类号： G02B6/42 , G02B6/122
CPC分类号： G02B6/14 , G02B6/1228 , G02B6/136 , G02B6/305
摘要： A method includes forming a first optical structure with an inverse taper and a separate optical structure on a semiconductor chip. The illustrative method also includes applying a protective structure over the optical structures and patterning the protective structure to expose the separate optical structure. The method further includes removing a portion of the separate optical structure to form a separate trimmed taper separate from, but adjacent to, the first optical structure. The protective structure is then removed from the first optical structure. Apparatuses are also disclosed.
摘要翻译：一种方法包括在半导体芯片上形成具有倒锥度的第一光学结构和单独的光学结构。说明性方法还包括在光学结构上施加保护结构并且图案化保护结构以暴露单独的光学结构。该方法还包括去除分离的光学结构的一部分以形成与第一光学结构分开但与第一光学结构相邻的单独的修剪锥。然后从第一光学结构去除保护结构。还公开了装置。

4. 发明申请

WO2016188311A1 DISTRIBUTED MACH-ZEHNDER MODULATOR (MZM) DRIVER DELAY COMPENSATION 审中-公开
标题翻译：分布式MACH-ZEHNDER调制器（MZM）驱动器延迟补偿
公开(公告)号：WO2016188311A1
公开(公告)日：2016-12-01
申请号：PCT/CN2016/081150
申请日：2016-05-05
申请人： HUAWEI TECHNOLOGIES CO., LTD.
发明人： CHEN, Morgan , GU, Yifan , LEE, HungYi , GU, Liang , DANG, Yen , LEI, Gong , CAO, Yuming , SHEN, Xiao Andy , BAI, YuSheng
IPC分类号： H03K5/00
CPC分类号： G02F1/2255 , G02F2001/212 , H03K5/134
摘要： An electronic driver circuit for use with a modulator such as a segmented Mach-Zehnder Modulator (MZM) is provided. The electronic driver circuit includes a first delay buffer implemented as a first complementary metal-oxide-semiconductor (CMOS) inverter and a second delay buffer implemented as a second CMOS inverter. The second CMOS inverter follows the first CMOS inverter and has a second gate width smaller than a first gate width of the first CMOS inverter. The first CMOS inverter is configured to produce a first delayed electrical signal from a received electrical signal and the second CMOS inverter is configured to produce a second delayed electrical signal from the first delayed electrical signal produced by the first CMOS inverter.
摘要翻译：提供了一种与分段马赫 - 曾德调制器（MZM）等调制器一起使用的电子驱动电路。电子驱动电路包括实现为第一互补金属氧化物半导体（CMOS）反相器的第一延迟缓冲器和实现为第二CMOS反相器的第二延迟缓冲器。第二CMOS反相器遵循第一CMOS反相器并且具有小于第一CMOS反相器的第一栅极宽度的第二栅极宽度。第一CMOS反相器被配置为从接收到的电信号产生第一延迟电信号，并且第二CMOS反相器被配置为从由第一CMOS反相器产生的第一延迟电信号产生第二延迟电信号。

5. 发明申请

WO2019034016A1 ALL-OPTICAL NETWORKS BASED ON SWITCHABLE WAVELENGTH CONNECTS (SWCS) 审中-公开
公开(公告)号：WO2019034016A1
公开(公告)日：2019-02-21
申请号：PCT/CN2018/100267
申请日：2018-08-13
申请人： HUAWEI TECHNOLOGIES CO., LTD.
发明人： XU, Qianfan , ZHANG, Feng , SHEN, Xiao Andy
IPC分类号： H04Q11/00 , H04J14/02
摘要： An all-optical network comprises: a first network; a second network; and a PWXC coupling the first network to the second network and comprising passive optical components. A method comprises: receiving a first optical signal from a first tail node of a first network; directing the first optical signal from a first input port of a PWXC to a first output port of the PWXC using first passive optical components; and transmitting the first optical signal to a third head node of a third network. An all-optical network comprising: a light bank; a first network coupled to the light bank; a second network coupled to the light bank; and a first PWXC coupling the first network and the second network.

6. 发明申请

WO2016161882A1 VERTICAL PN SILICON MODULATOR 审中-公开
标题翻译：垂直PN硅调制器
公开(公告)号：WO2016161882A1
公开(公告)日：2016-10-13
申请号：PCT/CN2016/076630
申请日：2016-03-17
申请人： HUAWEI TECHNOLOGIES CO., LTD.
发明人： WEI, Hongzhen , YANG, Li , XU, Qianfan , SHEN, Xiao Andy
IPC分类号： G02F1/025
CPC分类号： G02F1/025 , G02F2001/0151 , G02F2001/0152 , H01L21/2253 , H01L21/30604 , H01L21/3215
摘要： A silicon waveguide (110) comprising a waveguide core (118) that comprises a first positively doped region (111), also refers to as P1 region, vertically adjacent to a second positively doped region (112), also refers to as P2 region, The P2 region (112) is more heavily positively doped than the P1 region (111). A first negatively doped region (114), also refers to as N1 region, is vertically adjacent to a second negatively doped region (113), and also refers to as N2 region. The N2 region (113) is more heavily negatively doped than the N1 region (114). The N2 region (113) and the P2 region (112) are positioned vertically adjacent to form a PN junction. The N1 region (114), the N2 region (113), the P1 region (111), and the P2 region (112) are positioned as a vertical PN junction and configured to completely deplete the P2 region (112) of positive ions and completely deplete the N2 region (113) of negative ions when a voltage drop is applied across the N1 region (114), the N2 region (113), the P1 region (111), and the P2 region (112).
摘要翻译：包括包括第一正掺杂区域（111）的波导芯（118）的硅波导（110）也指与第二正掺杂区域（112）垂直相邻的P1区域，也称为P2区域， P2区（112）比P1区（111）更重的正掺杂。第一负掺杂区域（114）也指N1区域与第二负掺杂区域（113）垂直相邻，并且也指N2区域。 N2区域（113）比N1区域（114）更负重地掺杂。 N2区域（113）和P2区域（112）垂直相邻地形成PN结。 N1区域（114），N2区域（113），P1区域（111）和P2区域（112）被定位为垂直PN结并且被配置为完全耗尽正离子的P2区域（112）当跨越N1区域（114），N2区域（113），P1区域（111）和P2区域（112）施加电压降时，完全耗尽负离子的N2区域（113）。

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