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1. 发明申请

WO2017125139A1 ERROR-COMPENSATED DIRECT DIGITAL MODULATION DEVICE 审中-公开
标题翻译：误差补偿直接数字调制设备
公开(公告)号：WO2017125139A1
公开(公告)日：2017-07-27
申请号：PCT/EP2016/051023
申请日：2016-01-19
申请人： HUAWEI TECHNOLOGIES CO., LTD. , PALMERS, Pieter , CHRISTOFFERS, Niels , VANDENAMEELE, Patrick , SAMSOM, Johannes , CORNELISSENS, Koen , VATTI, Sofia
发明人： PALMERS, Pieter , CHRISTOFFERS, Niels , VANDENAMEELE, Patrick , SAMSOM, Johannes , CORNELISSENS, Koen , VATTI, Sofia
IPC分类号： H04L27/36 , H03M1/08 , H04L25/03 , H04B1/30 , H03M1/66 , H03M1/06 , G06F1/06
CPC分类号： H04L27/2627 , G06F1/06 , H03M1/1047 , H03M1/66 , H04B1/0007 , H04B1/123 , H04L25/03 , H04L27/122 , H04L27/368
摘要： The disclosure relates to an error-compensated direct digital modulation device (800), including: a direct digital radio frequency modulator (DDRM) (801), configured to generate a radio frequency (RF) signal (804) based on a modulation of a digital baseband signal (802); an error estimator (803) configured to determine an error signal (806) resulting from a deviation based on the generated RF signal (804) and a representation of the digital baseband signal (802); and an error compensator (805) configured to subtract the error signal (806) from the RF signal (804) to provide an error compensated RF signal (808).
摘要翻译：（800），其包括：直接数字射频调制器（DDRM）（801），其被配置为生成射频（RF）信号（RF） 804）基于数字基带信号（802）的调制; 误差估计器（803），其被配置为基于所生成的RF信号（804）和所述数字基带信号（802）的表示来确定由偏差导致的误差信号（806）; 和误差补偿器（805），被配置为从RF信号（804）中减去误差信号（806）以提供误差补偿的RF信号（808）。

2. 发明申请

WO2018054492A1 CALIBRATION DEVICE FOR A DIRECT DIGITAL MODULATOR 审中-公开
标题翻译：用于直接数字调制器的校准设备
公开(公告)号：WO2018054492A1
公开(公告)日：2018-03-29
申请号：PCT/EP2016/072748
申请日：2016-09-23
申请人： HUAWEI TECHNOLOGIES CO., LTD. , PALMERS, Pieter , CHRISTOFFERS, Niels , VANDENAMEELE, Patrick , SAMSOM, Johannes Gerardus , CORNELISSENS, Koen
发明人： PALMERS, Pieter , CHRISTOFFERS, Niels , VANDENAMEELE, Patrick , SAMSOM, Johannes Gerardus , CORNELISSENS, Koen
IPC分类号： H04B17/14 , H04B17/17
CPC分类号： H04B17/14 , H04B17/17 , H04B17/26
摘要： The disclosure relates to a calibration device (1110) for a direct digital modulator (DDM) (1120), wherein the DDM (1120) comprises a plurality of elements (1121) to generate an output signal (1124) based on a modulation of an input signal (1122) according to a predetermined constellation, the calibration device (1110) comprising: a calibration controller (1111) configured to provide a stimulus (1113) to at least one (1121a) of the elements (1121); and a measurement device (1112) configured to measure an output signal (1124) of the DDM (1120) responsive to the stimulus (1113) provided to the at least one element (1121a), wherein the calibration controller (1111) is configured to provide the stimulus (1113) based on an oscillation signal applied to the input of the DDM (1120) and an anti-phase oscillation signal applied to an error compensation path of the DDM (1120).
摘要翻译：本公开涉及用于直接数字调制器（DDM）（1120）的校准装置（1110），其中DDM（1120）包括多个元件（1121）以生成输出信号所述校准装置（1110）包括：校准控制器（1111），其被配置为将激励（1113）提供给所述输入信号（1122）中的至少一个（1121a）元素（1121）; 和被配置为响应于提供给所述至少一个元件（1121a）的所述激励（1113）来测量所述DDM（1120）的输出信号（1124）的测量装置（1112），其中所述校准控制器（1111）被配置为基于施加到DDM（1120）的输入的振荡信号和施加到DDM（1120）的误差补偿路径的反相振荡信号来提供刺激（1113）。

3. 发明申请

WO2016134750A1 MIXER AND METHOD FOR GENERATING AN OUTPUT SIGNAL FROM AN INPUT SIGNAL 审中-公开
标题翻译：用于从输入信号产生输出信号的混合器和方法
公开(公告)号：WO2016134750A1
公开(公告)日：2016-09-01
申请号：PCT/EP2015/053815
申请日：2015-02-24
申请人： HUAWEI TECHNOLOGIES CO., LTD. , VANDENAMEELE, Patrick , CORNELISSENS, Koen , NUYTS, Pieter
发明人： VANDENAMEELE, Patrick , CORNELISSENS, Koen , NUYTS, Pieter
IPC分类号： H04B1/00
CPC分类号： H03D7/165 , H04B1/0007
摘要： The invention relates to a mixer (100) for generating an analog output signal Χουτ from an analog input signal X IN using a mixing signal having a mixing frequency f MIX , the mixer (100) comprising: a scaler (110) being configured to sample the analog input signal X IN at a plurality of discrete points in time k with a sampling frequency f S to obtain a sampled analog input signal X IN [k] having a continuous signal value, and to generate the analog output signal Χ OUT having a continuous signal value by scaling the sampled analog input signal X IN [k] on the basis of a plurality of scaling coefficients A[k], wherein the scaling coefficients A[k] are a time-discrete representation of the mixing signal.
摘要翻译：本发明涉及一种用于使用具有混频fMIX的混频信号从模拟输入信号XIN生成模拟输出信号的混频器（100），所述混频器（100）包括：缩放器（110），被配置为对模拟在具有采样频率fS的时间k中的多个离散点处的输入信号XIN，以获得具有连续信号值的采样模拟输入信号XIN [k]，并通过缩放连续信号值来生成具有连续信号值的模拟输出信号XOUT 基于多个缩放系数A [k]，取样模拟输入信号XIN [k]，其中缩放系数A [k]是混合信号的时间离散表示。

4. 发明申请

WO2017016579A1 A COMMUNICATION APPARATUS AND METHOD 审中-公开
标题翻译：通信装置和方法
公开(公告)号：WO2017016579A1
公开(公告)日：2017-02-02
申请号：PCT/EP2015/067074
申请日：2015-07-24
申请人： HUAWEI TECHNOLOGIES CO., LTD. , NUYTS, Pieter , VANDENAMEELE, Patrick , CORNELISSENS, Koen
发明人： NUYTS, Pieter , VANDENAMEELE, Patrick , CORNELISSENS, Koen
IPC分类号： H04B1/00 , H04B1/12
CPC分类号： H04B1/0039 , H03J5/0272 , H03L7/185 , H04B1/0028 , H04B1/005 , H04B1/126
摘要： The invention relates to a communication apparatus (100) comprising: a first mixer (101) configured to generate an analog output signal X OUT from an analog input signal X IN using a first mixing signal, the first mixer (101) comprising a scaler (110) being configured to sample the analog input signal X IN at a plurality of discrete points in time k with a first sampling frequency f S,1 to obtain a sampled analog input signal X IN [k] having a continuous signal value, and to generate the analog output signal X OUT having a continuous signal value by scaling the sampled analog input signal X IN [k] on the basis of a plurality of scaling coefficients A[k], wherein the scaling coefficients A[k] are a time-discrete representation of the first mixing signal; a second mixer (101') configured to generate an analog output signal Y OUT from an analog input signal Y IN using a second mixing signal, the second mixer (101') comprising a scaler (110') being configured to sample the analog input signal Y IN at a plurality of discrete points in time k with a second sampling frequency f S,2 to obtain a sampled analog input signal Y IN [k] having a continuous signal value, and to generate the analog output signal Y OUT having a continuous signal value by scaling the sampled analog input signal Y IN [k] on the basis of a plurality of scaling coefficients B[k], wherein the scaling coefficients B[k] are a time-discrete representation of the second mixing signal; and a local oscillator (150) configured to provide a reference frequency f REF , wherein the first mixer (101) is configured to derive the first sampling frequency f S,1 from the reference frequency f REF and wherein the second mixer is configured to derive the second sampling frequency f S,2 from the reference frequency f REF .
摘要翻译：本发明涉及通信设备（100），包括：第一混频器（101），被配置为使用第一混频信号从模拟输入信号XIN生成模拟输出信号XOUT，第一混频器（101）包括缩放器（110）被配置为在时间k中的多个离散点以第一采样频率fS，1采样模拟输入信号XIN，以获得具有连续信号值的采样模拟输入信号XIN [k]，并产生模拟输出信号 XOUT具有连续信号值，通过基于多个缩放系数A [k]缩放采样的模拟输入信号XIN [k]，其中缩放系数A [k]是第一混合信号的时间离散表示 ; 配置为使用第二混合信号从模拟输入信号YIN生成模拟输出信号YOUT的第二混频器（101'），所述第二混频器（101'）包括缩放器（110'），其被配置为对模拟输入信号YIN 在具有第二采样频率fS的时间k的多个离散点处获得具有连续信号值的采样模拟输入信号YIN [k]，并且通过缩放连续信号值来生成具有连续信号值的模拟输出信号YOUT 基于多个缩放系数B [k]，采样模拟输入信号YIN [k]，其中缩放系数B [k]是第二混合信号的时间离散表示; 以及被配置为提供参考频率fREF的本地振荡器（150），其中所述第一混频器（101）被配置为从所述参考频率fREF导出所述第一采样频率fS，1，并且其中所述第二混频器被配置为导出所述第二采样频率fS，2从参考频率fREF。

5. 发明申请

WO2022002358A1 FINITE IMPULSE RESPONSE (FIR) FILTER AND RECEIVER WITH SUCH A FILTER 审中-公开
公开(公告)号：WO2022002358A1
公开(公告)日：2022-01-06
申请号：PCT/EP2020/068319
申请日：2020-06-30
申请人： HUAWEI TECHNOLOGIES CO., LTD. , CORNELISSENS, Koen
发明人： HUISKAMP, Maikel , KLUMPERINK, Eric, Antonius, Maria , CORNELISSENS, Koen , BORREMANS, Marc
IPC分类号： H03H17/02 , H03H17/06 , H03H15/00 , H03H15/023 , H03H17/0275 , H03H17/0628 , H03H2017/0295 , H03H2210/012 , H03H2210/025
摘要： A FIR filter that is arranged to receive an analog input signal and sample the analog input signal at a plurality of discrete points in time k with a sampling frequency fS to obtain a sampled analog input signal having a continuous signal value. The FIR filter is further arranged to generate a scaled analog input signal having a continuous signal value by scaling the sampled 5 analog input signal on the basis of a plurality of scaling coefficients. The FIR filter further arranged to provide, by integration over a timed window, an integrated signal which is the sum of L scaled analog signal samples, L being an integer value, and to provide the integrated signal as an output signal from the integrator at an output rate.

6. 发明申请

WO2018103866A1 DIGITAL-TO-ANALOG CONVERTER WITH CONVERSION CELLS CONVERTING TERNARY SIGNAL PAIRS 审中-公开
公开(公告)号：WO2018103866A1
公开(公告)日：2018-06-14
申请号：PCT/EP2016/080515
申请日：2016-12-09
申请人： HUAWEI TECHNOLOGIES CO., LTD. , VANDENAMEELE, Patrick
发明人： VANDENAMEELE, Patrick , VATTI, Sofia , SAMSOM, Johannes , CORNELISSENS, Koen , STYNEN, Paul , ROVERATO, Enrico , KOSUNEN, Marko , RYYNÄNEN, Jussi
IPC分类号： H03M1/02 , H03M1/06 , H03M3/00
CPC分类号： H03M1/0665 , H03M1/02 , H03M3/502
摘要： The disclosure relates to a digital-to-analog converter, DAC (100) for converting a digital input signal (x[n], 110) to an analog output signal (y), the DAC (100) comprising: an encoder (102), configured to generate a pair of ternary signals (c1[n], c2[n], 103, 104) based on the digital input signal (110); and a pair of single bit DACs (105, 106) coupled to the encoder (102) and configured to convert the pair of ternary signals (103, 104) to a pair of analog output states (y1[n], y2[n], 107, 108), wherein each ternary signal (103, 104) of the pair of ternary signals (103, 104) comprises a high, a zero and a low state producing a corresponding output state (107, 108) at the single bit DAC (105, 106) coupled with the respective ternary signal (103, 104).

7. 发明申请

WO2018133927A1 DIGITAL-TO-ANALOG CONVERTER CIRCUIT WITH TWO ENCODING SCHEMES 审中-公开
公开(公告)号：WO2018133927A1
公开(公告)日：2018-07-26
申请号：PCT/EP2017/050944
申请日：2017-01-18
申请人： HUAWEI TECHNOLOGIES CO., LTD. , VANDENAMEELE, Patrick
发明人： VANDENAMEELE, Patrick , VATTI, Sofia , SAMSOM, Johannes , CORNELISSENS, Koen , STYNEN, Paul , ROVERATO, Enrico , KOSUNEN, Marko , RYYNÄNEN, Jussi
IPC分类号： H03M1/74
摘要： The disclosure relates to a digital-to-analog converter (DAC) circuit (100), comprising: a plurality of conversion cells (103), each conversion cell (103) comprising a pair of subcells (110, 120), each subcell (110) comprising a current source (111) and a switch (112) which is configured to switch the corresponding current source (111) to an output (113) of the subcell (110); and a digital encoder (105), configured to generate a digitally encoded output signal (106) for controlling the switches (112, 122) of the pair of subcells (110, 120) of the conversion cells (103), wherein the digital encoder (105) is configured to selectively generate the digitally encoded output signal (106) according to a first encoding scheme (101) or according to a second encoding scheme (102).

8. 发明申请

WO2019141364A1 DEVICE AND METHOD FOR PROCESSING DIGITAL SIGNALS 审中-公开
公开(公告)号：WO2019141364A1
公开(公告)日：2019-07-25
申请号：PCT/EP2018/051225
申请日：2018-01-18
申请人： HUAWEI TECHNOLOGIES CO., LTD. , HELSEN, Matthias
发明人： HELSEN, Matthias , CORNELISSENS, Koen , DAUBENFELD, Alexandre , VATTI, Sofia , BORREMANS, Marc , SAMSOM, Johannes
IPC分类号： H03M1/08 , H03M1/06 , H03M1/74
CPC分类号： H03M1/0845 , H03M1/0614 , H03M1/742
摘要： The present invention provides a device (100) for processing digital signals. The device (100) comprises a digital signal source (101) configured to output codewords (104) and (107), a converter circuit (102) configured to generate an output signal (103) based on a first codeword (104) received from the digital signal source (101), and a feed forward circuit (105) configured to generate an output current (106) based on a second codeword (107) received from the digital signal source (101). The output current (106) of the feed forward circuit (105) is connected to a current supply (108) of the converter circuit (102). Further, the digital signal source (101) is configured to generate the second codeword (107) based on the first codeword (104) to compensate variations of a supply current of the converter circuit (102).

9. 发明申请

WO2021213610A1 TECHNIQUES FOR REDUCING DIGITAL-TO-ANALOG CONVERTER NOISE DUE TO MISMATCH 审中-公开
公开(公告)号：WO2021213610A1
公开(公告)日：2021-10-28
申请号：PCT/EP2020/060974
申请日：2020-04-20
申请人： HUAWEI TECHNOLOGIES CO., LTD. , HELSEN, Mathias
发明人： CORNELISSENS, Koen , BORREMANS, Marc
IPC分类号： H03M1/08 , H03M1/10 , H03M1/74
摘要： The present disclosure relates to a digital-to-analog converter, DAC, (200b) for providing an analog output signal (320) based on a digital code word (C1, C2, C3, CN), the DAC (200b) comprising: a plurality of DAC cells (I1, I2, I3, IN) switchable based on a digital code word (C1, C2, C3, CN) to a DAC output (112), each DAC cell (I1, I2, I3, IN) configured to provide a respective output level (321, 322, 323, 324) of an analog output signal (320) at the DAC output (112), wherein the digital code word (C1, C2, C3, CN) comprises a plurality of codes that are mapped to corresponding DAC cells (I1, I2, I3, IN) according to a given mapping (210a); and a remapping circuitry (210b) configured to remap the mapping (210a) of the codes to the corresponding DAC cells (I1, I2, I3, IN) based on respective mismatch measures of the plurality of DAC cells (I1, I2, I3, IN).

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