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1. 发明申请

WO2005106889A1 TWO CONDUCTOR THERMALLY ASSISTED MAGNETIC MEMORY 审中-公开
标题翻译：两个导体热辅助磁记忆
公开(公告)号：WO2005106889A1
公开(公告)日：2005-11-10
申请号：PCT/US2005/014232
申请日：2005-04-26
申请人： HEWLETT-PACKARD DEVELOPMENT COMPANY L.P. , PERNER, Frederick A. , WALMSLEY, Robert C , TRAN, Lung T.
发明人： PERNER, Frederick A. , WALMSLEY, Robert C , TRAN, Lung T.
IPC分类号： G11C11/16
CPC分类号： G11C11/16 , G11C11/1675
摘要： A method of performing a thermally assisted write operation on a selected two conductor spin valve memory (SVM) cell 202 having a material wherein the coercivity is decreased upon an increase in temperature. In a particular embodiment, a first write magnetic field 500 is established by a first write current 360 flowing from a first voltage potential to a second voltage potential as applied to the first conductor 204. A second write magnetic field 502 is established by a second write current 362 flowing from a third voltage potential to a fourth voltage potential as applied to the second conductor 206. The voltage potential of the first conductor 204 is greater than the voltage potential of the second conductor 206. As a result, a third current 364, flows from the first conductor 204 through the SVM cell 202 to the second conductor 206. The SVM cell 202 has an internal resistance such that the flowing current 364 generates heat 366 within the SVM cell 202. As the SVM cell 202 is self heated, the coercivity of the SVM cell 202 falls below the combined write magnetic fields 500, 502.
摘要翻译：对具有材料的选定的两个导体自旋阀存储器（SVM）单元202执行热辅助写入操作的方法，其中矫顽力在温度升高时降低。在特定实施例中，通过施加到第一导体204上的从第一电压电位流向第二电压电位的第一写入电流360建立第一写入磁场500.第二写入磁场502通过第二写入电流362从施加到第二导体206的第三电压电位流向第四电压电位。第一导体204的电压电位大于第二导体206的电压电位。结果，第三电流364，从第一导体204通过SVM单元202流向第二导体206. SVM单元202具有内部电阻，使得流动电流364在SVM单元202内产生热量366.由于SVM单元202是自加热的， SVM单元202的矫顽力低于组合写入磁场500,502。

2. 发明申请

WO2014011149A1 LIST SORT STATIC RANDOM ACCESS MEMORY 审中-公开
标题翻译：列表静态随机存取存储器
公开(公告)号：WO2014011149A1
公开(公告)日：2014-01-16
申请号：PCT/US2012/046018
申请日：2012-07-10
申请人： HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P. , PERNER, Frederick A.
发明人： PERNER, Frederick A.
IPC分类号： G11C11/413
CPC分类号： G11C11/419 , G11C11/412 , G11C15/04 , G11C19/28
摘要： A list sort static random access memory (LSSRAM) unit cell includes a static random access memory (SRAM) cell having a pair of cross-coupled elements to store data and a dynamic/static (D/S) mode selector to selectably switch the LSSRAM unit cell between a dynamic storage mode and a static storage mode. The LSSRAM unit cell further includes a swap selector to swap the stored data with data stored in an adjacent memory cell during the dynamic storage mode when the swap selector is activated, and a data comparator to compare the stored data in the SRAM cell with the data stored in the adjacent memory cell and to activate the swap selector according to a result of the comparison.
摘要翻译：列表排序静态随机存取存储器（LSSRAM）单元包括具有一对交叉耦合元件以存储数据的静态随机存取存储器（SRAM）单元和用于可选地切换LSSRAM的动态/静态（D / S）模式选择器动态存储模式和静态存储模式之间的单元格。所述LSSRAM单元还包括交换选择器，用于在所述交换选择器被激活时在所述动态存储模式期间与存储在相邻存储器单元中的数据交换所存储的数据;以及数据比较器，用于将所述SRAM单元中存储的数据与所述数据进行比较存储在相邻存储单元中并且根据比较的结果激活交换选择器。

3. 发明申请

WO2006041430A1 DATA STORAGE DEVICE AND METHOD OF FORMING THE SAME 审中-公开
标题翻译：数据存储装置及其形成方法
公开(公告)号：WO2006041430A1
公开(公告)日：2006-04-20
申请号：PCT/US2004/030593
申请日：2004-09-17
申请人： HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P. , PERNER, Frederick A. , VAN BROCKLIN, Andrew L. , JACKSON, Warren B.
发明人： PERNER, Frederick A. , VAN BROCKLIN, Andrew L. , JACKSON, Warren B.
IPC分类号： G11C11/16
CPC分类号： G11C8/14 , G11C11/16 , G11C2213/72 , H01L27/224
摘要： A resistive cross point memory cell array comprising a plurality of word lines (14), a plurality of bit lines (16), a plurality of cross points formed by the word lines (14) and the bit lines (16), and a plurality of memory cells (18), each of the memory cells (18) being located at a different one of the cross points, wherein a first bit line (16) comprises a distributed series diode along an entire length of the bit line (16) such that each of the associated memory cells (18) located along the first bit line (16) is coupled between the distributed series diode and an associated word line (14).
摘要翻译：一种电阻交叉点存储单元阵列，包括多个字线（14），多个位线（16），由字线（14）和位线（16）形成的多个交叉点，以及多个的存储器单元（18）中，每个存储器单元（18）位于交叉点的不同的一个处，其中第一位线（16）包括沿着位线（16）的整个长度的分布式串联二极管，使得沿着第一位线（16）定位的每个相关联的存储器单元（18）耦合在分布式串联二极管和相关联的字线（14）之间。

4. 发明申请

WO2005119689A1 A MAGNETIC MEMORY DEVICE 审中-公开
标题翻译：磁记忆装置
公开(公告)号：WO2005119689A1
公开(公告)日：2005-12-15
申请号：PCT/US2005/018079
申请日：2005-05-24
申请人： HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P. , SHARMA, Manish , PERNER, Frederick A.
发明人： SHARMA, Manish , PERNER, Frederick A.
IPC分类号： G11C11/16
CPC分类号： G11C11/16 , H01L29/785
摘要： The present invention provides a magnetic memory device (100, 200, 230, 500). An embodiment of the present invention includes a magnetic memory cell (102, 202, 502) that is switchable between two states of differing electrical resistance which are detectible by a sense current though the magnetic memory cell (102, 202, 502). The device includes a field effect transistor (FET) arrangement which has a source (114, 214, 514) and a drain (112, 212, 512). The source (114, 214, 514) and the drain (112, 212, 512) are connected by a connecting element (108, 110, 208, 210, 508, 510) which projects from a portion of the device and which has an electrical conductivity that varies in response to a gate voltage applied to the connecting element (108, 110, 208, 210, 508, 510). The magnetic memory cell (102, 202, 502) is in electrical communication with the connecting element (108, 110, 208, 210, 508, 510) so that at least a portion of the sense current is in use associated with a corresponding gate voltage and the FET arrangement amplifies at least a portion of the sense current.
摘要翻译：本发明提供一种磁存储器件（100,200,230,500）。本发明的一个实施例包括磁存储单元（102,202,502），其可在两个电阻不同的状态之间切换，这些状态可以通过磁存储单元（102,202,502）通过感测电流检测。该器件包括具有源极（114,214,514）和漏极（112,212,512）的场效应晶体管（FET）装置。源（114,214,514）和排水口（112,212,512）通过从装置的一部分突出的连接元件（108,110,208,210,508,510）连接，该连接元件具有电导率随施加到连接元件（108,110,208,210,508,510）的栅极电压而变化。磁存储器单元（102,202,502）与连接元件（108,110,208,210,508,510）电连通，使得感测电流的至少一部分在使用中与相应的门相关联电压和FET布置放大至少一部分感测电流。

5. 发明申请

WO2005119688A1 SENSE AMPLIFYING MAGNETIC TUNNEL DEVICE 审中-公开
标题翻译：感应放大磁铁隧道装置
公开(公告)号：WO2005119688A1
公开(公告)日：2005-12-15
申请号：PCT/US2005/016905
申请日：2005-05-13
申请人： HEWLETT-PACKARD DEVELOPMENT COMPANY L.P. , PERNER, Frederick A. , SHARMA, Manish
发明人： PERNER, Frederick A. , SHARMA, Manish
IPC分类号： G11C11/16
CPC分类号： G11C11/16
摘要： A sense amplifying magnetic tunnel (SAMT) device (300) is disclosed. In a particular embodiment, a field effect transistor (FET) (306) having a drain (310), a source (312), a channel (314) therebetween, a gate electrode (318) and a tunneling gate oxide (316) proximate to the channel (312) is provided. In addition, a spin valve memory (SVM) cell 308 is provided electrically coupled to the gate electrode (318). The electrical coupling between the SVM cell 308 and the gate electrode (318) serves to provide a control potential to the gate (318). In addition, the coupling provides a gain to a current passed through the SAMT device (300).
摘要翻译：公开了一种感测放大磁隧道（SAMT）装置（300）。在特定实施例中，具有漏极（310），源极（312），它们之间的沟道（314），栅电极（318）和隧道栅极氧化物（316）的场效应晶体管（FET）（306）提供到通道（312）。此外，自旋阀存储器（SVM）单元308被设置为电耦合到栅电极（318）。 SVM单元308和栅电极（318）之间的电耦合用于向栅极（318）提供控制电位。此外，耦合为通过SAMT装置（300）的电流提供增益。

6. 发明申请

WO2005022544A1 METHOD AND SYSTEM FOR CONTROLLING WRITE CURRENT IN MAGNETIC MEMORY 审中-公开
标题翻译：用于控制磁记忆中写入电流的方法和系统
公开(公告)号：WO2005022544A1
公开(公告)日：2005-03-10
申请号：PCT/US2004/027951
申请日：2004-08-26
申请人： HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P. , PERNER, Frederick A. , SMITH, Kenneth, K.
发明人： PERNER, Frederick A. , SMITH, Kenneth, K.
IPC分类号： G11C8/08
CPC分类号： G11C11/16 , G11C8/08
摘要： Methods and apparatuses are disclosed for controlling the write current in magnetic memory. In some embodiments, the method includes: providing a current in a plurality of memory write lines (32) (where write lines (32) may be magnetically coupled to at least one memory element (34)), coupling a first and second plurality of transistors (36, 38) to either end of memory write line (32), and altering the conduction state of individual transistors within the first and second plurality of transistors (36, 38).
摘要翻译：公开了用于控制磁存储器中的写入电流的方法和装置。在一些实施例中，该方法包括：在多个存储器写入线（32）中提供电流（其中写入线（32）可以磁耦合到至少一个存储器元件（34）），耦合第一和第二多个晶体管（36,38）到存储器写入线（32）的任一端，以及改变第一和第二多个晶体管（36,38）内的各个晶体管的导通状态。

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