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1. 发明申请

WO2018204512A1 INPUT IMPEDANCE BIASING 审中-公开
公开(公告)号：WO2018204512A1
公开(公告)日：2018-11-08
申请号：PCT/US2018/030684
申请日：2018-05-02
申请人： CIRRUS LOGIC INTERNATIONAL SEMICONDUCTOR LTD. , SARAF, Vivek , THOMSEN, Axel , KUMMARAGUNTLA, Ravi , TUCKER, John, Christopher
发明人： SARAF, Vivek , THOMSEN, Axel , KUMMARAGUNTLA, Ravi , TUCKER, John, Christopher
IPC分类号： H03F3/185
CPC分类号： H04R3/04 , H03F3/185 , H03F2200/03 , H03F2200/18 , H03H7/40 , H04R3/00 , H04R2201/003
摘要： Input impedance biasing may be improved with an ultra-high-input-impedance biasing circuit having low temperature variation. The impedance biasing circuit may include a first transistor coupled to a first power supply and a second transistor coupled to a second power supply. A gate of the first transistor may be coupled to a gate of the second transistor at an intermediate bias node. The first transistor and the second transistor may provide a selected DC impedance at the intermediate bias node. The impedance may be used to provide low-pass and or high-pass filtering of audio signals and/or noise.

2. 发明申请

WO2018102293A1 MICROELECTROMECHANICAL SYSTEMS MICROPHONE WITH ELECTROSTATIC FORCE FEEDBACK TO MEASURE SOUND PRESSURE 审中-公开
公开(公告)号：WO2018102293A1
公开(公告)日：2018-06-07
申请号：PCT/US2017/063415
申请日：2017-11-28
申请人： CIRRUS LOGIC INTERNATIONAL SEMICONDUCTOR, LTD. , THOMSEN, Axel
发明人： THOMSEN, Axel
IPC分类号： H04R3/06 , H04R19/00 , H04R29/00 , H04R19/04
CPC分类号： H04R29/004 , H04R3/06 , H04R19/005 , H04R19/04 , H04R2201/003
摘要： A MEMS may include a backplate comprising first and second electrodes electrically isolated from one another and mechanically coupled to the backplate in a fixed relationship relative to the backplate, and a diaphragm configured to mechanically displace relative to the backplate as a function of sound pressure incident upon the diaphragm. The diaphragm may comprise third and fourth electrodes electrically isolated from one another and mechanically coupled to the diaphragm in a fixed relationship relative to the diaphragm such that the third and fourth electrodes mechanically displace relative to the backplate as the function of the sound pressure. The first and third electrodes may form a first capacitor, the second and fourth electrodes may form a second capacitor, and the first capacitor may be configured to sense a displacement of the diaphragm responsive to which the second capacitor may be configured to apply an electrostatic force to the diaphragm to return the diaphragm to an original position.

3. 发明申请

WO2018102370A1 NOISE REDUCTION IN VOLTAGE REFERENCE SIGNAL 审中-公开
公开(公告)号：WO2018102370A1
公开(公告)日：2018-06-07
申请号：PCT/US2017/063639
申请日：2017-11-29
申请人： CIRRUS LOGIC INTERNATIONAL SEMICONDUCTOR LTD. , ZANBAGHI, Ramin , DAS, Tejasvi , MELANSON, John, L. , THOMSEN, Axel
发明人： ZANBAGHI, Ramin , DAS, Tejasvi , MELANSON, John, L. , THOMSEN, Axel
IPC分类号： H03M1/08 , H03M1/12
摘要： A variable resistor may be coupled between a reference voltage source and components of an integrated circuit to reduce issues relating to thermal noise from a reference voltage signal generated by the reference voltage source. The variable resistor may be set to a low level during a first time period and a high level during a second time period, in which the time periods correspond to a sampling period of a switched-capacitor circuit. The low resistance time period may allow quick settling of an input reference voltage signal, whereas the high resistance time period may reduce a bandwidth of noise on a sampling capacitor coupled to the reference voltage signal. The variable resistor and switched-capacitor network may be used in an analog-to-digital converter (ADC), such as in audio circuits.

4. 发明申请

WO2018102291A1 BIASING OF ELECTROMECHANICAL SYSTEMS MICROPHONE WITH ALTERNATING-CURRENT VOLTAGE WAVEFORM 审中-公开
公开(公告)号：WO2018102291A1
公开(公告)日：2018-06-07
申请号：PCT/US2017/063410
申请日：2017-11-28
申请人： CIRRUS LOGIC INTERNATIONAL SEMICONDUCTOR, LTD. , THOMSEN, Axel
发明人： THOMSEN, Axel
IPC分类号： H04R3/06 , H04R19/00 , H04R19/04
摘要： A MEMS microphone may include a backplate comprising first and second electrodes electrically isolated from one another and mechanically coupled to the backplate in a fixed relationship relative to the backplate and a diaphragm configured to displace relative to the backplate as a function of sound pressure incident upon the diaphragm, the diaphragm comprising third and fourth electrodes electrically isolated from one another and mechanically coupled to the diaphragm in a fixed relationship relative to the diaphragm such that the third and fourth electrodes displace relative to the backplate as a function of sound pressure incident upon the diaphragm. The first and third electrodes may form a first capacitor and the second and fourth electrodes may form a second capacitor, the capacitance of each which may be a function of the displacement of the diaphragm, and each of which may be biased by an alternating-current voltage waveform.

5. 发明申请

WO2018213557A1 CAPACITANCE SENSOR 审中-公开
公开(公告)号：WO2018213557A1
公开(公告)日：2018-11-22
申请号：PCT/US2018/033157
申请日：2018-05-17
申请人： CIRRUS LOGIC INTERNATIONAL SEMICONDUCTOR LTD. , MELANSON, John, L. , BHATTACHARYA, Anindya , THOMSEN, Axel , SMITH, Eric , PARUPALLI, Vamsikrishna , MAY, Mark , GABORIAU, Johann, G. , LI, Junsong
发明人： MELANSON, John, L. , BHATTACHARYA, Anindya , THOMSEN, Axel , SMITH, Eric , PARUPALLI, Vamsikrishna , MAY, Mark , GABORIAU, Johann, G. , LI, Junsong
IPC分类号： G01D5/24 , G01R27/26
CPC分类号： G01R27/2605 , G01D5/24 , H03M3/402 , H03M3/458
摘要： Sensing electronics may be used to measure capacitance of components, such as speakers in mobile devices. A sensing circuit (200) may include a charge-sense front end (204) with sine wave excitation, an analog-to-digital conversion block (206), and a digital demodulator (208). The component (202) being measured by the sensing electronics may be excited by a high-frequency sine wave excitation (212 ). The digitization of the output from the component may be performed using a bandpass filter synchronized with the excitation signal by centering the bandpass filter near (e.g., within 5% of) the frequency of the excitation signal.

6. 发明申请

WO2022173835A1 SIGMA-DELTA MODULATOR WITH RESIDUE CONVERTER FOR LOW-OFFSET MEASUREMENT SYSTEM 审中-公开
公开(公告)号：WO2022173835A1
公开(公告)日：2022-08-18
申请号：PCT/US2022/015827
申请日：2022-02-09
申请人： CIRRUS LOGIC INTERNATIONAL SEMICONDUCTOR LTD. , MELANSON, John L.
发明人： THOMSEN, Axel , KOZAK, Mucahit , WILSON, Paul , KING, Eric J.
IPC分类号： H03M3/00
摘要： A signal processing system may include a sensor readout channel configured to convert an electronic signal into a digital quantity. The sensor readout channel may include a first-order sigma-delta modulator having a modulator input and a modulator output, first outside chopping switches located at the modulator input, second outside chopping switches located at the modulator output, an auxiliary path comprising an analog-to-digital converter (ADC) having an auxiliary path input and an auxiliary path output, the auxiliary path input configured to receive as its input signal a signal output by a memory element of the first-order sigma-delta modulator, and a signal combiner configured to combine a modulator output signal generated by the first-order sigma-delta modulator with an auxiliary path output signal generated by the auxiliary path to generate a combined output signal.

7. 发明申请

WO2022173562A1 CHOP TONE MANAGEMENT FOR A CURRENT SENSOR OR A VOLTAGE SENSOR 审中-公开
公开(公告)号：WO2022173562A1
公开(公告)日：2022-08-18
申请号：PCT/US2022/012882
申请日：2022-01-19
申请人： CIRRUS LOGIC INTERNATIONAL SEMICONDUCTOR LTD. , KUMMARAGUNTLA, Ravi K.
发明人： AMADI, Christophe J. , MELANSON, John L. , THOMSEN, Axel , TUCKER, John C. , KING, Eric J.
IPC分类号： H03F3/38 , H03M1/06 , G01R19/25 , H03M1/12
摘要： A signal processing system may include a signal path and a chop management circuit. The signal path may comprise a chopper configured to chop a differential input signal to the signal path at a chopping frequency and a low-pass filter downstream of the chopper and configured to filter out intermodulation products of a direct current offset of the signal path and intermodulation products of an aggressor on the differential input signal in order to generate an output signal. The chop management circuit may be communicatively coupled to the chopper and configured to, based on operational parameters associated with the signal path, dynamically manage energy of one or more clock signals used to define the chopping frequency.

8. 发明申请

WO2006004893A1 PHASE ERROR CANCELLATION 审中-公开
标题翻译：相位错误取消
公开(公告)号：WO2006004893A1
公开(公告)日：2006-01-12
申请号：PCT/US2005/023217
申请日：2005-06-28
申请人： SILICON LABORATORIES INC. , FREY, Doug , ZHANG, Ligang , THOMSEN, Axel
发明人： FREY, Doug , ZHANG, Ligang , THOMSEN, Axel
IPC分类号： H03L7/197
CPC分类号： H03L7/0891 , H03L7/1976
摘要： A noise cancellation signal is generated for a fractional-N phase-locked loop (200). A divide value is provided to a first delta sigma modulator circuit (203), which generates a divide control signal to control a divide value of a feedback divider (208) in the phase-locked loop. An error term (e) is generated that is indicative of a difference between the generated divide control signal and the divide value supplied to the first delta sigma modulator circuit. The error term is integrated in an integrator (320) to generate an integrated error term (x), where x k+1 =x k +e k ; and a phase error correction circuit (209) utilizes the error term e k and the integrated error term x k to generate the phase error cancellation signal.
摘要翻译：对于分数N锁相环（200）产生噪声消除信号。分频值被提供给第一ΔΣ调制器电路（203），其产生除法控制信号以控制锁相环中的反馈分频器（208）的除法值。生成指示所生成的除法控制信号和提供给第一ΔΣ调制器电路的除法值之间的差异的误差项（e）。误差项集成在积分器（320）中以产生积分误差项（x），其中x

9. 发明申请

WO2004100380A1 METHOD AND APPARATUS FOR A LOW JITTER DUAL-LOOP FRACTIONAL -N SYNTHESIZER 审中-公开
标题翻译：低氘双环分子-N合成剂的方法和装置
公开(公告)号：WO2004100380A1
公开(公告)日：2004-11-18
申请号：PCT/US2004/013780
申请日：2004-05-03
申请人： SILICON LABORATORIES, INC. , THOMSEN, Axel , HUANG, Yunteng , HEIN, Jerrell, P.
发明人： THOMSEN, Axel , HUANG, Yunteng , HEIN, Jerrell, P.
IPC分类号： H03L7/23
CPC分类号： G06F7/68 , H03L1/022 , H03L1/026 , H03L7/095 , H03L7/0992 , H03L7/1976 , H03L7/235 , H03L2207/50
摘要： A first phase-locked loop (PLL) circuit (301) includes an input for receiving a timing reference signal from an oscillator 303, a controllable oscillator circuit (805) supplying an oscillator output signal, and a multi-modulus feedback divider circuit (809). A second control loop circuit is selectably coupled through a select circuit 853 to supply a digital control value (M) to the multi-modulus feedback divider circuit of the first loop circuit to thereby control the oscillator output signal. While the second control loop is coupled to supply the control value to the feedback divider circuit, the control value is determined according to a detected difference between the oscillator output signal and a reference signal coupled to the second control loop circuit at a divider circuit (335). While the second control loop circuit is not coupled to control the first PLL circuit, the first PLL circuit receives a digital control value to control a divide ratio of the feedback divider, the digital control value is determined at least in part according to a stored control value stored in nonvolatile storage (317), the stored control value corresponding to a desired frequency of the oscillator output signal.
摘要翻译：第一锁相环（PLL）电路（301）包括用于从振荡器303接收定时参考信号的输入端，提供振荡器输出信号的可控振荡器电路（805）和多模反馈分频器电路）。第二控制回路电路通过选择电路853可选择地耦合，以将数字控制值（M）提供给第一回路电路的多模反馈分配器电路，从而控制振荡器输出信号。当第二控制回路被耦合以将控制值提供给反馈分配器电路时，控制值根据在分频器电路（335）处检测到的振荡器输出信号和耦合到第二控制回路电路的参考信号之间的差异来确定）。当第二控制环路电路不耦合以控制第一PLL电路时，第一PLL电路接收数字控制值以控制反馈分频器的分频比，数字控制值至少部分地根据存储的控制存储在非易失性存储器（317）中的存储的控制值对应于振荡器输出信号的期望频率。

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