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1. 发明申请

WO2007134147A3 METHOD OF VACCINATING SUBJECTS RECEIVING IMMUNE MODULATING THERAPY 审中-公开
公开(公告)号：WO2007134147A3
公开(公告)日：2007-11-22
申请号：PCT/US2007/068631
申请日：2007-05-10
申请人： BRISTOL-MYERS SQUIBB COMPANY , VRATSANOS, George , LEON, Francisco , TAY, Lee K. , BAHRT, Kenneth M.
发明人： VRATSANOS, George , LEON, Francisco , TAY, Lee K. , BAHRT, Kenneth M.
IPC分类号： A61K39/00 , A61K38/17
摘要： The present invention relates to methods of vaccinating subjects receiving immune modulating therapy, such as soluble CTLA4 molecules, for treatment of immune system diseases mediated by T-cell interactions with B7-positive cells including, but not limited to, autoimmune diseases, immunoproliferative diseases, and immune disorders associated with graft transplantation.

2. 发明申请

WO2007087521A2 CD86 AND CD80 RECEPTOR COMPETITION ASSAYS 审中-公开
标题翻译： CD86和CD80受体竞争试验
公开(公告)号：WO2007087521A2
公开(公告)日：2007-08-02
申请号：PCT/US2007/060893
申请日：2007-01-23
申请人： BRISTOL-MYERS SQUIBB COMPANY , TOWNSEND, Robert M. , LEON, Francisco , FLEENER, Catherine A.
发明人： TOWNSEND, Robert M. , LEON, Francisco , FLEENER, Catherine A.
IPC分类号： G01N33/50
CPC分类号： C07K16/2827 , G01N33/5047 , G01N33/505 , G01N2333/70532 , G01N2800/245 , Y10S530/809
摘要： The present invention discloses a method for assaying the binding of L104EA29YIg to a receptor. The receptor is preferably CD86 or CD80. The present invention also discloses antibodies to be used in the assay, as well as hybridomas expressing the antibodies.
摘要翻译：本发明公开了测定L104EA29YIg与受体结合的方法。受体优选为CD86或CD80。本发明还公开了用于测定的抗体以及表达抗体的杂交瘤。

3. 发明申请

WO2008079684A2 ELECTRON BLOCKING LAYERS FOR ELECTRONIC DEVICES 审中-公开
标题翻译：用于电子器件的电子阻挡层
公开(公告)号：WO2008079684A2
公开(公告)日：2008-07-03
申请号：PCT/US2007/087167
申请日：2007-12-12
申请人： NANOSYS, INC. , CHEN, Jian , DUAN, Xiangfeng , CRUDEN, Karen , LIU, Chao , NALLABOLU, Madhuri, L. , RANGANATHAN, Srikanth , LEON, Francisco , PARCE, J., Wallace
发明人： CHEN, Jian , DUAN, Xiangfeng , CRUDEN, Karen , LIU, Chao , NALLABOLU, Madhuri, L. , RANGANATHAN, Srikanth , LEON, Francisco , PARCE, J., Wallace
IPC分类号： H01L21/336 , H01L29/792
CPC分类号： H01L29/513 , B82Y10/00 , G11C16/10 , H01L21/28273 , H01L21/28282 , H01L29/517
摘要： Methods and apparatus for electronic devices such as non-volatile memory devices are described. The momory devices include a multi-layer control dielectric, such as a double or triple layer. The multi-layer control electric includes a combination of high-k dielectric meterials such as aluminium oxide (A1 2 O 3 ), Hafnium oxide (HfO 2 ), and/or hybrid films of Hafnium aluminium oxide. The multi-layer control dielectric provides enhanced characteristics, including increased charge retention, enhanced memory program/erase window, improved reliability and stability, with feasibility for single or multistate (e.g, two, three or four bit) operation.
摘要翻译：描述了用于诸如非易失性存储装置的电子装置的方法和设备。元件装置包括多层控制电介质，例如双层或三层。多层控制电器包括诸如氧化铝（Al 2 O 3 O 3），氧化铪（HfO 2），氧化铝（Al 2 O 3））和/或铪铝氧化物的混合膜。多层控制电介质提供了增强的特性，包括增加的电荷保持，增强的存储器编程/擦除窗口，改进的可靠性和稳定性，以及对于单状态或多状态（例如2,3或4位）操作的可行性。

4. 发明申请

WO2008060455A2 METHODS FOR NANOWIRE ALIGNMENT AND DEPOSITION 审中-公开
标题翻译：用于纳米对准和沉积的方法
公开(公告)号：WO2008060455A2
公开(公告)日：2008-05-22
申请号：PCT/US2007/023625
申请日：2007-11-09
申请人： MARTIN, Samuel , DUAN, Xiangfeng , FUJII, Katsumasa , HAMILTON, James, M. , KOTAKI, Hiroshi , LEON, Francisco , MILLER, Jeffrey , NEGISHI, Tetsu , OHKI, Hiroshi , PARCE, J., Wallace , PEREIRA, Cheri, X., Y. , SCHUELE, Paul, John , SHIBATA, Akihide , STUMBO, David, P. , WAKAZONO, Yasuaki
发明人： MARTIN, Samuel , DUAN, Xiangfeng , FUJII, Katsumasa , HAMILTON, James, M. , KOTAKI, Hiroshi , LEON, Francisco , MILLER, Jeffrey , NEGISHI, Tetsu , OHKI, Hiroshi , PARCE, J., Wallace , PEREIRA, Cheri, X., Y. , SCHUELE, Paul, John , SHIBATA, Akihide , STUMBO, David, P. , WAKAZONO, Yasuaki
IPC分类号： H01L51/00
CPC分类号： H01L29/0665 , B82B3/00 , B82Y10/00 , B82Y30/00 , B82Y40/00 , H01L29/0673 , Y10S977/883
摘要： The present invention provides methods and systems for nanowire alignment and deposition. Energizing (e.g., an alternating current electric field) is used to align and associate nanowires with electrodes. By modulating the energizing, the nanowires are coupled to the electrodes such that they remain in place during subsequent wash and drying steps. The invention also provides methods for transferring nanowires from one substrate to another in order to prepare various device substrates. The present invention also provides methods for monitoring and controlling the number of nanowires deposited at a particular electrode pair, as well as methods for manipulating nanowires in solution.
摘要翻译：本发明提供了用于纳米线对准和沉积的方法和系统。使用通电（例如，交流电场）来使纳米线与电极对准和关联。通过调节激励，纳米线耦合到电极，使得它们在随后的洗涤和干燥步骤期间保持在适当的位置。本发明还提供了将纳米线从一个衬底转移到另一个衬底以便制备各种器件衬底的方法。本发明还提供了用于监测和控制在特定电极对上沉积的纳米线的数量的方法，以及用于操纵溶液中的纳米线的方法。

5. 发明申请

WO2007038164A3 METHODS FOR NANOSTRUCTURE DOPING 审中-公开
公开(公告)号：WO2007038164A3
公开(公告)日：2007-04-05
申请号：PCT/US2006/036738
申请日：2006-09-21
申请人： NANOSYS, INC. , PAN, Yaoling , CHEN, Jian , LEON, Francisco , MOSTARSHED, Shahriar , ROMANO, Linda T. , SAHI, Vijendra , STUMBO, David P.
发明人： PAN, Yaoling , CHEN, Jian , LEON, Francisco , MOSTARSHED, Shahriar , ROMANO, Linda T. , SAHI, Vijendra , STUMBO, David P.
IPC分类号： H01L29/06 , H01L21/225
摘要： Methods of doping nanostructures, such as nanowires, are disclosed. The methods provide a variety of approaches for improving existing methods of doping nanostructures. The embodiments include the use of a sacrificial layer to promote uniform dopant distribution within a nanostructure during post-nanostructure synthesis doping. In another embodiment, a high temperature environment is used to anneal nanostructure damage when high energy ion implantation is used. In another embodiment rapid thermal annealing is used to drive dopants from a dopant layer on a nanostructure into the nanostructure. In another embodiment a method for doping nanowires on a plastic substrate is provided that includes depositing a dielectric stack on a plastic substrate to protect the plastic substrate from damage during the doping process. An embodiment is also provided that includes selectively using high concentrations of dopant materials at various times in synthesizing nanostructures to realize novel crystallographic structures within the resulting nanostructure.

6. 发明申请

WO2006110162A2 ARTIFICIAL DIELECTRICS USING NANOSTRUCTURES 审中-公开
标题翻译：人造电子使用纳米结构
公开(公告)号：WO2006110162A2
公开(公告)日：2006-10-19
申请号：PCT/US2005/029122
申请日：2005-08-16
申请人： NANOSYS, INC. , STUMBO, David , EMPEDOCLES, Steve , LEON, Francisco , PARCE, J. Wallace
发明人： STUMBO, David , EMPEDOCLES, Steve , LEON, Francisco , PARCE, J. Wallace
IPC分类号： H05B37/00
CPC分类号： H01L29/0665 , B82Y10/00 , B82Y30/00 , G11C2213/16 , G11C2213/81 , H01L29/0673 , H01L29/4908 , H01L51/0537 , Y10S977/743 , Y10S977/745 , Y10S977/762 , Y10S977/813 , Y10S977/936
摘要： Artificial dielectrics using nanostructures, such as nanowires, are disclosed. In embodiments, artificial dielectrics using other nanostructures, such as nanorods, nanotubes or nanoribbons and the like are disclosed. The artificial dielectric includes a dielectric material with a plurality of nanowires (or other nanostructures) embedded within the dielectric material. Very high dielectric constants can be achieved with an artificial dielectric using nanostructures. The dielectric constant can be adjusted by varying the length, diameter, carrier density, shape, aspect ration, orientation and density of the nanostructures. Additionally, a controllabe artificial dielectric using nanostructures, such as nanowires, is disclosed in which the dielectric constant can be dynamically adjusted by applying an electric field to the controllable artificial dielectric. A wide range of electronic devices can use artificial dielectrics with nanostructures to improve performance. Example devices include, capacitors thin film transistors, other types of thin film electronic devices, microstrip devices, surface acoustic wave (SAW) filters, other types of filters, and radar attenuating materials (RAM).
摘要翻译：公开了使用纳米结构的人造电介质，例如纳米线。在实施例中，公开了使用其他纳米结构的人造电介质，例如纳米棒，纳米管或纳米带等。人造电介质包括具有嵌入电介质材料内的多个纳米线（或其他纳米结构）的电介质材料。使用纳米结构的人造电介质可以实现非常高的介电常数。可以通过改变纳米结构的长度，直径，载流子密度，形状，方面比例，取向和密度来调节介电常数。此外，公开了一种使用纳米结构的可控制人造电介质，例如纳米线，其中可以通过向可控的人造电介质施加电场来动态地调整介电常数。各种电子器件可以使用具有纳米结构的人造电介质来提高性能。示例性器件包括电容器薄膜晶体管，其他类型的薄膜电子器件，微带器件，表面声波（SAW）滤波器，其它类型的滤波器和雷达衰减材料（RAM）。

7. 发明申请

WO2009039493A1 PERIPHERALLY PIVOTED OSCILLATING VANE MACHINE 审中-公开
标题翻译：外围摆动振动筛机
公开(公告)号：WO2009039493A1
公开(公告)日：2009-03-26
申请号：PCT/US2008/077216
申请日：2008-09-22
申请人： MECHANOLOGY, INC. , CHOMYSZAK, Stephen, M. , MARTIN, Jedd , FERENTINOS, James, T. , MA, Hai-Ping , LEON, Francisco
发明人： CHOMYSZAK, Stephen, M. , MARTIN, Jedd , FERENTINOS, James, T. , MA, Hai-Ping , LEON, Francisco
IPC分类号： F01C21/08
CPC分类号： F01C9/002 , F01C21/0836
摘要： The present invention is directed to a peripherally pivoted oscillating vane machine (OVM). The OVM has been optimized for performance and efficiency. This has been accomplished by reducing loads on the drive mechanism and by employing de-phased motion of the peripherally pivoted vanes in conjunction with improved porting configurations as well as valve actuation and manufacture.
摘要翻译：本发明涉及一种外围枢转的振荡叶片机（OVM）。 OVM已经针对性能和效率进行了优化。这已经通过减少驱动机构的负载并且通过采用周边枢转叶片的去相位运动以及改进的端口构造以及阀致动和制造来实现。

8. 发明申请

WO2007030126A2 METHOD, SYSTEM, AND APPARATUS FOR GATING CONFIGURATIONS AND IMPROVED CONTACTS IN NANOWIRE-BASED ELECTRONIC DEVICES 审中-公开
标题翻译：用于在纳米级电子设备中进行配置和改进联系的方法，系统和设备
公开(公告)号：WO2007030126A2
公开(公告)日：2007-03-15
申请号：PCT/US2005/037237
申请日：2005-10-14
申请人： NANOSYS, INC. , MOSTARSHED, Shahriar , CHEN, Jian , LEON, Francisco , PAN, Yaoling , ROMANO, Linda T.
发明人： MOSTARSHED, Shahriar , CHEN, Jian , LEON, Francisco , PAN, Yaoling , ROMANO, Linda T.
IPC分类号： H01L29/76
CPC分类号： H01L29/0665 , B82Y10/00 , H01L29/0673 , H01L29/42384 , H01L29/42392 , H01L29/775 , H01L29/785 , H01L29/78645 , H01L29/78681 , H01L29/7869 , Y10S977/762 , Y10S977/932 , Y10S977/938
摘要： Methods, systems, and apparatuses for electronic devices having improved gate structures are described. An electronic device includes at least one nanowire. A gate contact is positioned along at least a portion of a length of the at least one nanowire. A dielectric material layer is between the gate contact and the at least one nanowire. A source contact and a drain contact are in contact with the at least one nanowire. At least a portion of the source contact and/or the drain contact overlaps with the gate contact along the nanowire the length. In another aspect, an electronic device includes a nanowire having a semiconductor core surrounded by an insulating shell layer. A ring shaped first gate region surrounds the nanowire along a portion of the length of the nanowire. A second gate region is positioned along the length of the nanowire between the nanowire and the substrate. A source contact and a drain contact are coupled to the semiconductor core of the nanowire at respective exposed portions of the semiconductor core.
摘要翻译：描述了具有改进的门结构的电子设备的方法，系统和装置。电子装置包括至少一个纳米线。栅极接触沿至少一个纳米线的长度的至少一部分定位。介电材料层在栅极接触和至少一个纳米线之间。源极触点和漏极触点与至少一个纳米线接触。源极触点和/或漏极触点的至少一部分沿着该纳米线的长度与栅极触点重叠。另一方面，一种电子器件包括具有被绝缘壳层包围的半导体芯的纳米线。环形第一栅极区域沿着纳米线长度的一部分包围纳米线。第二栅极区沿着纳米线和衬底之间的纳米线的长度定位。源极触点和漏极触点在半导体芯的相应的暴露部分处耦合到纳米线的半导体芯。

9. 发明申请

WO2009108173A2 METHODS FOR FORMATION OF SUBSTRATE ELEMENTS 审中-公开
标题翻译：形成基体元件的方法
公开(公告)号：WO2009108173A2
公开(公告)日：2009-09-03
申请号：PCT/US2008/013499
申请日：2008-12-09
申请人： NANOSYS, INC. , LEON, Francisco , LEMMI, Francesco , MILLER, Jeffrey , DUTTON, David , STUMBO, David, P.
发明人： LEON, Francisco , LEMMI, Francesco , MILLER, Jeffrey , DUTTON, David , STUMBO, David, P.
IPC分类号： H01L29/66 , H01L21/306 , H01L21/28
CPC分类号： H01L29/0665 , B81C1/00142 , B82Y10/00 , B82Y40/00 , H01L29/0673 , H01L29/42392 , H01L29/66439 , H01L29/66772 , H01L29/775 , H01L29/78603 , H01L29/78696
摘要： The present invention relates to methods of forming substrate elements, including semiconductor elements such as nanowires, transistors and other structures, as well as the elements formed by such methods.
摘要翻译：本发明涉及形成衬底元件的方法，所述衬底元件包括诸如纳米线，晶体管和其他结构的半导体元件以及通过这种方法形成的元件。

10. 发明申请

WO2005123373A2 POST-DEPOSITION ENCAPSULATION OF NANOSTRUCTURES: COMPOSITIONS, DEVICES AND SYSTEMS INCORPORATING SAME 审中-公开
标题翻译：纳米结构的沉积后沉积：组成，装置和系统
公开(公告)号：WO2005123373A2
公开(公告)日：2005-12-29
申请号：PCT/US2005/020100
申请日：2005-06-07
申请人： NANOSYS, INC. , WHITEFORD, Jeffery, A. , BREWER, Rhett , BURETEA, Mihai , CHEN, Jian , CRUDEN, Chu, Karen , DUAN, Xiangfeng , FREEMAN, William, P. , HEALD, David , LEON, Francisco , LIU, Chao , MEISEL, Andreas , MIN, Kyu, S. , PARCE, J., Wallace , SCHER, Erik
发明人： WHITEFORD, Jeffery, A. , BREWER, Rhett , BURETEA, Mihai , CHEN, Jian , CRUDEN, Chu, Karen , DUAN, Xiangfeng , FREEMAN, William, P. , HEALD, David , LEON, Francisco , LIU, Chao , MEISEL, Andreas , MIN, Kyu, S. , PARCE, J., Wallace , SCHER, Erik
IPC分类号： B31B15/02
CPC分类号： C09C1/3081 , B82Y30/00 , C01P2004/16 , C01P2004/45 , C01P2004/54 , C01P2004/64 , C01P2006/10 , C01P2006/40 , C01P2006/60 , C09C3/006 , C09C3/063 , C09C3/12 , H01G4/14 , Y10S977/773 , Y10T428/2982 , Y10T428/2989 , Y10T428/2991 , Y10T428/2993 , Y10T428/2995 , Y10T428/2996 , Y10T428/2998
摘要： Ligand compositions for use in preparing discrete coated nanostructures are provided, as well as the coated nanostructures themselves and devices incorporating same. Methods for post-deposition shell formation on a nanostructure and for reversibly modifying nanostructures are also provided. The ligands and coated nanostructures of the present invention are particularly useful for close packed nanostructure compositions, which can have improved quantum confinement and/or reduced cross-talk between nanostructures.
摘要翻译：提供了用于制备离散涂层纳米结构的配体组合物，以及涂覆的纳米结构本身和结合其的装置。还提供了在纳米结构上沉积后壳形成和用于可逆修饰纳米结构的方法。本发明的配体和包被的纳米结构对于紧密堆积的纳米结构组合物是特别有用的，其可以改进纳米结构的量子限制和/或减少的串扰。

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