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1. 发明申请

WO2011109613A2 METHOD, SYSTEM, AND APPARATUS FOR PROCESSING VIDEO AND/OR GRAPHICS DATA USING MULTIPLE PROCESSORS WITHOUT LOSING STATE INFORMATION 审中-公开
标题翻译：使用多个处理器而不丢失状态信息处理视频和/或图形数据的方法，系统和设备
公开(公告)号：WO2011109613A2
公开(公告)日：2011-09-09
申请号：PCT/US2011/027019
申请日：2011-03-03
申请人： ATI TECHNOLOGIES ULC , BLINZER, Paul
发明人： BLINZER, Paul
IPC分类号： G06F9/48
CPC分类号： G06F9/5011 , G06F1/3203 , G06F2209/507 , G06T1/20 , G09G5/363 , G09G2330/021 , G09G2360/06
摘要： Method, system, and apparatus provides for the processing of video and/or graphics data using a combination of first graphics processing circuitry and second graphics processing circuitry without losing state information while transferring the processing between the first and second graphics processing circuitry. The video and/or graphics data to be processed may be, for example, supplied by an application running on a processor such as host processor. In one example, an apparatus includes at least one GPU that includes a plurality of single instruction multiple data (SEVID) execution units. The GPU is operative to execute a native function code module. The apparatus also includes at least a second GPU that includes a plurality of SEVID execution units having a same programming model as the plurality of SEVID execution units on the first GPU. Furthermore, the first and second GPUs are operative to execute the same native function code module. The native code function module causes the first GPU to provide state information for the at least second GPU in response to a notification from a first processor, such as a host processor, that a transition from a current operational mode to a desired operational mode is desired (e.g., one GPU is stopped and the other GPU is started). The second GPU is operative to obtain the state information provided by the first GPU and use the state information via the same native function code module to continue processing where the first GPU left off. The first processor is operatively coupled to the at least first and at least second GPUs.
摘要翻译：方法，系统和设备使用第一图形处理电路和第二图形处理电路的组合来提供对视频和/或图形数据的处理，而不丢失状态信息，同时在第一和第二图形处理电路之间传送处理第二图形处理电路。待处理的视频和/或图形数据可以例如由运行在诸如主机处理器之类的处理器上的应用来提供。在一个示例中，装置包括至少一个GPU，其包括多个单指令多数据（SEVID）执行单元。 GPU可操作来执行本地功能代码模块。该装置还包括至少第二GPU，其包括具有与第一GPU上的多个SEVID执行单元相同的编程模型的多个SEVID执行单元。此外，第一和第二GPU可操作来执行相同的本地功能代码模块。响应于来自诸如主机处理器的第一处理器的通知，本机代码功能模块使得第一GPU为至少第二GPU提供状态信息，即期望从当前操作模式到期望操作模式的转变（例如，一个GPU停止，另一个GPU启动）。第二GPU可操作以获得由第一GPU提供的状态信息并且经由相同的本地功能代码模块使用状态信息来继续处理第一GPU停止的地方。第一处理器可操作地耦合到至少第一和至少第二GPU。

2. 发明申请

WO2012082424A1 GRAPHICS PROCESSING DISPATCH FROM USER MODE 审中-公开
标题翻译：图形处理从用户模式进行分配
公开(公告)号：WO2012082424A1
公开(公告)日：2012-06-21
申请号：PCT/US2011/063240
申请日：2011-12-05
申请人： ADVANCED MICRO DEVICES, INC. , ATI TECHNOLOGIES ULC , MCCRARY, Rex , HOUSTON, Michael , ROGERS, Philip, J. , CHENG, Jeffrey, G. , HUMMEL, Mark , BLINZER, Paul
发明人： MCCRARY, Rex , HOUSTON, Michael , ROGERS, Philip, J. , CHENG, Jeffrey, G. , HUMMEL, Mark , BLINZER, Paul
IPC分类号： G06F9/48
CPC分类号： G06F9/545 , G06F9/544
摘要： A method, system, and computer program product are disclosed for providing improved access to accelerated processing device compute resources to user mode applications. The functionality disclosed allows user mode applications to provide commands to an accelerated processing device without the need for kernel mode transitions in order to access a unified ring buffer. Instead, applications are each provided with their own buffers, which the accelerated processing device hardware can access to process commands. With full operating system support, user mode applications are able to utilize the accelerated processing device in much the same way as a CPU.
摘要翻译：公开了一种方法，系统和计算机程序产品，用于提供对用户模式应用的加速处理设备计算资源的改进访问。所公开的功能允许用户模式应用程序向加速处理设备提供命令，而不需要内核模式转换以便访问统一的环形缓冲区。相反，应用程序各自提供有自己的缓冲区，加速处理设备硬件可以访问进程命令。通过完整的操作系统支持，用户模式应用程序能够以与CPU相同的方式利用加速处理设备。

3. 发明申请

WO2012082423A1 GRAPHICS COMPUTE PROCESS SCHEDULING 审中-公开
标题翻译：图形计算过程调度
公开(公告)号：WO2012082423A1
公开(公告)日：2012-06-21
申请号：PCT/US2011/063238
申请日：2011-12-05
申请人： ADVANCED MICRO DEVICES, INC. , ATI TECHNOLOGIES ULC , CHENG, Jeffrey, G. , HUMMEL, Mark , VANDOORN, Leendert , BLINZER, Paul
发明人： CHENG, Jeffrey, G. , HUMMEL, Mark , VANDOORN, Leendert , BLINZER, Paul
IPC分类号： G06F9/48
CPC分类号： G06F9/545 , G06F2209/509
摘要： A method, system, and computer program product are disclosed for providing improved access to accelerated processing device compute resources to user mode applications. The functionality disclosed allows user mode applications to provide commands to an accelerated processing device without the need for kernel mode transitions in order to access a unified ring buffer. Instead, applications are each provided with their own buffers, which the accelerated processing device hardware can access to process commands. With full operating system support, user mode applications are able to utilize the accelerated processing device in much the same way as a CPU.
摘要翻译：公开了一种方法，系统和计算机程序产品，用于提供对用户模式应用的加速处理设备计算资源的改进访问。所公开的功能允许用户模式应用程序向加速处理设备提供命令，而不需要内核模式转换以便访问统一的环形缓冲区。相反，应用程序各自提供有自己的缓冲区，加速处理设备硬件可以访问进程命令。通过完整的操作系统支持，用户模式应用程序能够以与CPU相同的方式利用加速处理设备。

4. 发明申请

WO2012082421A1 ACCESSIBILITY OF GRAPHICS PROCESSING COMPUTE RESOURCES 审中-公开
标题翻译：图形处理计算资源的可访问性
公开(公告)号：WO2012082421A1
公开(公告)日：2012-06-21
申请号：PCT/US2011/063235
申请日：2011-12-05
申请人： ADVANCED MICRO DEVICES, INC. , ATI TECHNOLOGIES ULC , MCCRARY, Rex , HOUSTON, Michael , ROGERS, Philip, J. , CHENG, Jeffrey, G. , HUMMEL, Mark , MOORE, Chuck , VANDOORN, Leendert , BLINZER, Paul
发明人： MCCRARY, Rex , HOUSTON, Michael , ROGERS, Philip, J. , CHENG, Jeffrey, G. , HUMMEL, Mark , MOORE, Chuck , VANDOORN, Leendert , BLINZER, Paul
IPC分类号： G06F9/48
CPC分类号： G06F9/5044 , G06F2209/509
摘要： A method, system, and computer program product are disclosed for providing improved access to accelerated processing device compute resources to user mode applications. The functionality disclosed allows user mode applications to provide commands to an accelerated processing device without the need for kernel mode transitions in order to access a unified ring buffer. Instead, applications are each provided with their own buffers, which the accelerated processing device hardware can access to process commands. With full operating system support, user mode applications are able to utilize the accelerated processing device in much the same way as a CPU.
摘要翻译：公开了一种方法，系统和计算机程序产品，用于提供对用户模式应用的加速处理设备计算资源的改进访问。所公开的功能允许用户模式应用程序向加速处理设备提供命令，而不需要内核模式转换以便访问统一的环形缓冲区。相反，应用程序各自提供有自己的缓冲区，加速处理设备硬件可以访问进程命令。通过完整的操作系统支持，用户模式应用程序能够以与CPU相同的方式利用加速处理设备。

5. 发明申请

WO2021035134A1 A NETWORKED INPUT/OUTPUT MEMORY MANAGEMENT UNIT 审中-公开
公开(公告)号：WO2021035134A1
公开(公告)日：2021-02-25
申请号：PCT/US2020/047376
申请日：2020-08-21
申请人： ADVANCED MICRO DEVICES, INC. , ATI TECHNOLOGIES ULC
发明人： ARORA, Sonu , BLINZER, Paul , NG, Philip , RAVAL, Nippon Harshadk
IPC分类号： G06F12/109 , G06F12/1027 , G06F12/1009 , G06T1/60
摘要： A networked input/output memory management unit (IOMMU) includes a plurality of IOMMUs. The networked IOMMU receives a memory access request that includes a domain physical address generated by a first address translation layer. The networked IOMMU selectively translates the domain physical address into a physical address in a system memory using one of the plurality of IOMMUs that is selected based on a type of a device that generated the memory access request. In some cases, the networked IOMMU is connected to a graphics processing unit (GPU), at least one peripheral device, and the memory. The networked IOMMU includes a command queue to receive the memory access requests, a primary IOMMU to selectively translate the domain physical address in memory access requests from the GPU, and a secondary IOMMU to translate the domain physical address in memory requests from the peripheral device.

6. 发明申请

WO2009076671A2 DRIVER ARCHITECTURE FOR COMPUTING DEVICE HAVING MULTIPLE GRAPHICS SUBSYSTEMS, REDUCED POWER CONSUMPTION MODES, SOFTWARE AND METHODS 审中-公开
标题翻译：具有多个图形子系统的计算设备的驱动器架构，降低功耗模式，软件和方法
公开(公告)号：WO2009076671A2
公开(公告)日：2009-06-18
申请号：PCT/US2008/086835
申请日：2008-12-15
申请人： ADVANCED MICRO DEVICES, INC. , MUMMAH, Phil , BLINZER, Paul
发明人： BLINZER, Paul
IPC分类号： G06F3/038 , G06F15/16
CPC分类号： G06F1/3203 , G06F1/3265 , G06F1/3293 , G09G5/12 , G09G5/363 , G09G2330/022 , G09G2340/0435 , G09G2360/06 , G09G2370/04 , Y02D10/122 , Y02D10/153
摘要： Many computing devices may now include two or more graphics subsystems. The multiple graphics subsystems may have different abilities and may, for example, consume differing amounts of electrical power, with one subsystem consuming more average power than the others. The higher power consuming graphics subsystem may be coupled to the device and used instead of, or in addition to, the lower power consuming graphics subsystem, resulting in higher performance or additional capabilities, but increased overall power consumption. By transitioning from the use of the higher power consuming graphics subsystem to the lower power consuming graphics subsystem, while placing the higher power consuming graphics subsystem in a lower power consumption mode, overall power consumption is reduced. A processor executes application software and driver software. The driver software includes first and second driver components for respectively controlling operation of the first and second graphics subsystems. A further proxy driver component routes calls (e.g. API/DDI calls) to one of said first and second driver components, in dependence on which of the first and second graphics system is in use.
摘要翻译：许多计算设备现在可以包括两个或更多个图形子系统。多个图形子系统可以具有不同的能力，并且可以例如消耗不同量的电功率，一个子系统比其他子系统消耗更多的平均功率。较高功率消耗的图形子系统可以耦合到该设备，并且被代替或者除了低功耗的图形子系统之外使用，导致更高的性能或附加能力，但增加了整体功耗。通过从使用较高功耗的图形子系统转换到较低功耗的图形子系统，在将较高功率消耗的图形子系统置于较低功耗模式的同时，总体功耗降低。处理器执行应用软件和驱动程序软件。驱动器软件包括用于分别控制第一和第二图形子系统的操作的第一和第二驱动器组件。根据第一和第二图形系统中的哪一个在使用中，另外的代理驱动器组件将呼叫（例如，API / DDI呼叫）路由到所述第一和第二驱动器组件之一。

7. 发明申请

WO2012083012A1 DEVICE DISCOVERY AND TOPOLOGY REPORTING IN A COMBINED CPU/GPU ARCHITECTURE SYSTEM 审中-公开
标题翻译：组合CPU / GPU架构系统中的设备发现和拓扑报告
公开(公告)号：WO2012083012A1
公开(公告)日：2012-06-21
申请号：PCT/US2011/065136
申请日：2011-12-15
申请人： ADVANCED MICRO DEVICES, INC. , ATI TECHNOGIES ULC , BLINZER, Paul , VAN DOORN, Leendert , CHENG, Jeffrey , TERRY, Elene , WOLLER, Thomas , RAHMAN, Arshad
发明人： BLINZER, Paul , VAN DOORN, Leendert , CHENG, Jeffrey , TERRY, Elene , WOLLER, Thomas , RAHMAN, Arshad
IPC分类号： G06F9/46
CPC分类号： E21B4/14
摘要： Methods and apparatus are provided, as an aspect of a combined CPU/ APD architecture system, for discovering and reporting properties of devices and system topology that are relevant to efficiently scheduling and distributing computational tasks to the various computational resources of a combined CPU/ APD architecture system. The combined CPU/ APD architecture unifies CPUs and APDs in a flexible computing environment. In some embodiments, the combined CPU/ APD architecture capabilities are implemented in a single integrated circuit, elements of which can include one or more CPU cores and one or more APD cores. The combined CPU/APD architecture creates a foundation upon which existing and new programming frameworks, languages, and tools can be constructed.
摘要翻译：提供了作为组合的CPU / APD架构系统的一个方面的方法和装置，用于发现和报告与有效地调度和分发计算任务到组合的CPU / APD架构的各种计算资源相关的设备和系统拓扑的属性系统。组合的CPU / APD架构将CPU和APD统一在灵活的计算环境中。在一些实施例中，组合的CPU / APD架构能力在单个集成电路中实现，其单元可以包括一个或多个CPU核心和一个或多个APD核心。组合的CPU / APD架构创建了可以构建现有和新的编程框架，语言和工具的基础。

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