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1. 发明申请

WO1994022248A1 DETERMINATION OF OPTIMAL CLOCK SIGNAL FOR SAMPLING A PACKET 审中-公开
标题翻译：确定用于采样包的最佳时钟信号
公开(公告)号：WO1994022248A1
公开(公告)日：1994-09-29
申请号：PCT/US1994002622
申请日：1994-03-11
申请人： APPLE COMPUTER, INC.
发明人： APPLE COMPUTER, INC. , VAN BRUNT, Roger , HILLMAN, Daniel, L. , NILSON, Christopher , OPRESCU, Florin , TEENER, Michael, D.
IPC分类号： H04L07/033
CPC分类号： H04L7/10 , H04L7/0066 , H04L7/0338 , H04L7/041
摘要： An adaptive data separator for detecting systematic differences between the arrivals of the rising and falling edges of a digital signal and for compensating for the difference. Data packets from a transmission source are prefixed with two data bits of known values. The data separator is also supplied with four clock signals per bit, one corresponding to an ideal rising edge and three following every 5 nanoseconds. The two prefix bits preceding a data packet are then sampled at each of the clock signals. Since all information in a given data packet undergoes the same systematic distortion, the logic of the adaptive data separator can determine the optimum clock signal to use in sampling each bit of data for the packet. Through several multiplexers the incoming data is then clocked to the optimal clock signal for sampling.
摘要翻译：一种用于检测数字信号的上升沿和下降沿的到达之间的系统差异并用于补偿差分的自适应数据分离器。来自发送源的数据分组以已知值的两个数据比特为前缀。数据分离器还提供每个位四个时钟信号，一个对应于理想上升沿，三个跟随每5纳秒。然后在每个时钟信号处对数据分组之前的两个前缀比特进行采样。由于给定数据分组中的所有信息经历相同的系统失真，所以自适应数据分离器的逻辑可以确定用于对数据包的每个数据位进行采样的最佳时钟信号。通过几个多路复用器，输入数据然后被计时到最佳时钟信号进行采样。

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