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1. 发明申请

WO2011149427A1 A CIRCUIT ARRANGEMENT AND A MODULATOR 审中-公开
标题翻译：电路布置和调制器
公开(公告)号：WO2011149427A1
公开(公告)日：2011-12-01
申请号：PCT/SG2011/000193
申请日：2011-05-25
申请人： AGENCY FOR SCIENCE, TECHNOLOGY AND RESEARCH (A*STAR) , XIONG, Yong Zhong , WANG, Lei , ZHANG, Bo , YUAN, Xiaojun
发明人： XIONG, Yong Zhong , WANG, Lei , ZHANG, Bo , YUAN, Xiaojun
IPC分类号： H03H7/09 , H03H7/12
CPC分类号： H03H7/0161 , H03C1/62 , H03H7/06 , H03H7/075 , H03H7/1766 , H03H7/1775 , H03H2007/013
摘要： Embodiment provide a circuit arrangement. The circuit arrangement includes a plurality of parallel switch elements. The switch elements are configured to switch between a first state and a second state in response to a control signal. The plurality of switch elements act as capacitive elements when they are in the first state, configuring the circuit arrangement as a band pass filter. The plurality of switch elements act as resistive elements when they are in the second state, configuring the circuit arrangement as a band stop filter.
摘要翻译：实施例提供一种电路装置。电路装置包括多个并联开关元件。开关元件被配置为响应于控制信号在第一状态和第二状态之间切换。当它们处于第一状态时，多个开关元件充当电容元件，将电路装置配置为带通滤波器。当它们处于第二状态时，多个开关元件用作电阻元件，将电路装置配置为带阻滤波器。

2. 发明申请

WO2011053246A1 IMPLANTABLE DEVICE FOR DETECTING VARIATION IN FLUID FLOW RATE 审中-公开
标题翻译：用于检测流体流量变化的可植入装置
公开(公告)号：WO2011053246A1
公开(公告)日：2011-05-05
申请号：PCT/SG2010/000363
申请日：2010-09-27
申请人： AGENCY FOR SCIENCE, TECHNOLOGY AND RESEARCH , NATIONAL UNIVERSITY OF SINGAPORE , KOTLANKA, Rama Krishna , KHANNUR, Pradeep Basappa , CHAN, Kok Lim , CHUA, Soo Yeng Benjamin , YUAN, Xiaojun , JE, Minkyu , KRIPESH, Vaidyanathan , YU, Daquan , NEUZIL, Pavel , SHAO, Lichun , PARK, Woo Tae
发明人： KOTLANKA, Rama Krishna , KHANNUR, Pradeep Basappa , CHAN, Kok Lim , CHUA, Soo Yeng Benjamin , YUAN, Xiaojun , JE, Minkyu , KRIPESH, Vaidyanathan , YU, Daquan , NEUZIL, Pavel , SHAO, Lichun , PARK, Woo Tae
IPC分类号： A61B5/026 , A61F2/02
CPC分类号： A61B5/026 , A61B5/02007 , A61B5/02028 , A61B5/686 , A61B2560/0219 , G01F1/28 , G01F1/34 , G01F15/063
摘要： According to embodiments of the present invention, an implantable device for detecting variation in fluid flow rate is provided. The implantable device includes: a substrate having an active element arrangement; a sensor arrangement having a first portion that is mechanically secured and a second portion that is freely deflectable, the sensor arrangement in electrical communication with the active element arrangement, wherein the active element arrangement is configured to detect changes in deformation of the sensor arrangement and produce an output in response to the detected changes; and at least one inductive element mechanically coupled to the substrate and in electrical communication with the active element arrangement, wherein the inductive element is adapted to power the active element arrangement through inductive coupling to an excitation source, and wherein the inductive element is adapted to transmit the output associated with the detected changes in the sensor.
摘要翻译：根据本发明的实施例，提供了一种用于检测流体流量变化的可植入装置。该可植入装置包括：具有有源元件装置的衬底; 传感器装置，其具有机械固定的第一部分和可自由偏转的第二部分，所述传感器装置与所述有源元件装置电连通，其中所述有源元件布置被配置为检测所述传感器装置的变形的变化并产生响应于检测到的变化的输出; 以及至少一个电感元件，其机械耦合到所述衬底并与所述有源元件布置电连通，其中所述电感元件适于通过与激励源的感应耦合为所述有源元件布置供电，并且其中所述电感元件适于传输输出与传感器中检测到的变化相关联。

3. 发明申请

WO2012141656A1 ANALOG-TO-DIGITAL CONVERTER 审中-公开
标题翻译：模拟数字转换器
公开(公告)号：WO2012141656A1
公开(公告)日：2012-10-18
申请号：PCT/SG2012/000128
申请日：2012-04-11
申请人： AGENCY FOR SCIENCE, TECHNOLOGY AND RESEARCH , TIEW, Kei Tee , CHAN, Kok Lim , JE, Minkyu , YUAN, Xiaojun
发明人： TIEW, Kei Tee , CHAN, Kok Lim , JE, Minkyu , YUAN, Xiaojun
IPC分类号： H03M3/00 , H04L27/00
CPC分类号： H03M1/002 , H03M3/30 , H03M3/422 , H03M3/444
摘要： According to embodiments of the present invention, an analog-to-digital converter is provided. The analog-to-digital converter includes an input configured to receive an input signal, a feed-forward path connected to the input configured to feed forward the input signal, a processing path including a loop filter, wherein the loop filter includes at least one local feedback path configured to feed back an output signal of the loop filter to an input of the loop filter, a first combiner configured to combine the input signal fed forward by the feed-forward path with an output of the processing path, a quantizer configured to generate an output signal of the converter, a feed-back path configured to feed back the output signal, and a second combiner wherein the processing path is connected to the second combiner and the second combiner is configured to combine the input signal with the fed back output signal of the converter and supply the result of the combination to the processing path.
摘要翻译：根据本发明的实施例，提供了一种模拟 - 数字转换器。模数转换器包括被配置为接收输入信号的输入端，连接到被配置为向前馈送输入信号的输入端的前馈路径，包括环路滤波器的处理路径，其中环路滤波器包括至少一个局部反馈路径，被配置为将环路滤波器的输出信号反馈到环路滤波器的输入;第一组合器，被配置为将由前馈路径馈送的输入信号与处理路径的输出组合;量化器配置以产生转换器的输出信号，被配置为反馈输出信号的反馈路径和第二组合器，其中处理路径连接到第二组合器，并且第二组合器被配置为将输入信号与馈送转换器的反向输出信号，并将组合的结果提供给处理路径。

4. 发明申请

WO2008100312A1 METHOD TO REDUCE COLLECTOR RESISTANCE OF A BIPOLAR TRANSISTOR AND INTEGRATION INTO A CMOS FLOW 审中-公开
标题翻译：降低双极晶体管的集电极电阻并集成到CMOS流中的方法
公开(公告)号：WO2008100312A1
公开(公告)日：2008-08-21
申请号：PCT/US2007/062100
申请日：2007-02-14
申请人： AGERE SYSTEMS, INC. , CHEN, Alan, S. , DYSON, Mark , ROSSI, Nace, M. , SINGH, Ranbir , YUAN, Xiaojun
发明人： CHEN, Alan, S. , DYSON, Mark , ROSSI, Nace, M. , SINGH, Ranbir , YUAN, Xiaojun
IPC分类号： H01L21/8249
CPC分类号： H01L21/8249
摘要： The invention, in one aspect, provides a method for fabricating a semiconductor device. In one aspect, the method provides for a dual implantation of a tub of a bipolar transistor. The tub in bipolar region is implanted by implanting the tub through separate implant masks that are also used to implant tubs associated with MOS fabricate different voltage devices in a non-bipolar region during the fabrication of MOS transistors.
摘要翻译：本发明在一个方面提供一种用于制造半导体器件的方法。在一个方面，该方法提供双注入双极晶体管的桶。通过将单独的注入掩模注入到双极区域中，通过在MOS晶体管的制造期间也用于植入与在非双极区域中制造不同电压器件的MOS相关联的管道的桶。

5. 发明申请

WO2011149426A1 AMPLIFIER AND TRANSCEIVER INCLUDING THE AMPLIFIER 审中-公开
标题翻译：放大器和收发器，包括放大器
公开(公告)号：WO2011149426A1
公开(公告)日：2011-12-01
申请号：PCT/SG2011/000192
申请日：2011-05-25
申请人： AGENCY FOR SCIENCE, TECHNOLOGY AND RESEARCH , CHA, Hyouk Kyu , GAO, Yuan , YUAN, Xiaojun
发明人： CHA, Hyouk Kyu , GAO, Yuan , YUAN, Xiaojun
IPC分类号： H03F1/26 , H03F3/45
CPC分类号： H03F3/16 , H03F1/223 , H03F3/193 , H03F3/3028 , H03F3/45071 , H03F3/45179 , H03F2200/294 , H03F2200/408 , H03F2200/451 , H03F2200/492 , H03F2203/30078 , H03F2203/30081 , H03F2203/30111 , H03F2203/30114 , H03F2203/45646
摘要： An amplifier and a transceiver including the amplifier are provided. The amplifier includes an input terminal; a first transistor of a first conductivity and a second transistor of a second conductivity, each transistor comprising a source terminal, a gate terminal and a drain terminal respectively, the source terminal of the first transistor being coupled to the source terminal of the second transistor, and the gate terminal of the first transistor and the gate terminal of the second transistor being coupled to the input terminal; and an output terminal coupled to the drain terminal of the first transistor and the drain terminal of the second transistor.
摘要翻译：提供了放大器和包括放大器的收发器。放大器包括输入端子; 第一导电性的第一晶体管和第二导电性的第二晶体管，每个晶体管分别包括源极端子，栅极端子和漏极端子，所述第一晶体管的源极端子耦合到所述第二晶体管的源极端子，并且第一晶体管的栅极端子和第二晶体管的栅极端子耦合到输入端子; 以及耦合到第一晶体管的漏极端子和第二晶体管的漏极端子的输出端子。

6. 发明申请

WO2009058142A1 METHOD TO REDUCE TRENCH CAPACITOR LEAKAGE FOR RANDOM ACCESS MEMORY DEVICE 审中-公开
标题翻译：降低用于随机访问存储器件的TRENCH电容器泄漏的方法
公开(公告)号：WO2009058142A1
公开(公告)日：2009-05-07
申请号：PCT/US2007/083176
申请日：2007-10-31
申请人： AGERE SYSTEMS, INC. , ROSSI, Nace, M. , SINGH, Ranbir , YUAN, Xiaojun
发明人： ROSSI, Nace, M. , SINGH, Ranbir , YUAN, Xiaojun
IPC分类号： H01L21/8242 , H01L27/108 , H01L21/762
CPC分类号： H01L27/1087 , H01L21/76224 , H01L27/10829 , H01L27/10861
摘要： The invention, in one aspect, provides a method of manufacturing a semiconductor device. This method includes forming a trench isolation structure (118) in a dynamic random memory region (DRAM) (110) of a semiconductor substrate (109) and patterning an etch mask over the trench isolation structure (118) to expose a portion of the trench isolation structure (118). A portion of the exposed trench isolation structure (118) is removed to form a gate trench (116) therein, wherein the gate trench (116) includes a first corner formed by the semiconductor substrate and a second corner formed by the trench isolation structure. The etch mask is removed from the DRAM region (110) and the at least the first corner of the gate trench is rounded to form a rounded corner (120). This is followed by the formation of an oxide layer (124) over a sidewall of the gate trench (116), the first rounded corner (120), and the semiconductor substrate (109) adjacent the gate trench (116). The trench (116) is filled with a gate material.
摘要翻译：本发明在一个方面提供一种制造半导体器件的方法。该方法包括在半导体衬底（109）的动态随机存储器区域（DRAM）（110）中形成沟槽隔离结构（118），并且在沟槽隔离结构（118）上图形化蚀刻掩模以暴露沟槽的一部分隔离结构（118）。去除暴露的沟槽隔离结构（118）的一部分以在其中形成栅极沟槽（116），其中栅极沟槽（116）包括由半导体衬底形成的第一角和由沟槽隔离结构形成的第二角。从DRAM区域（110）去除蚀刻掩模，并且栅极沟槽的至少第一角被倒圆以形成圆角（120）。随后在栅极沟槽（116），第一圆角（120）和与栅极沟槽（116）相邻的半导体衬底（109）的侧壁上形成氧化物层（124）。沟槽（116）填充有栅极材料。

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