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1. 发明申请

WO2019095126A1 METHOD FOR CLEANING SEMICONDUCTOR WAFERS 审中-公开
公开(公告)号：WO2019095126A1
公开(公告)日：2019-05-23
申请号：PCT/CN2017/111015
申请日：2017-11-15
申请人： ACM RESEARCH (SHANGHAI) INC.
发明人： WANG, Hui , CHEN, Fufa , CHEN, Fuping , WANG, Jian , WANG, Xi , ZHANG, Xiaoyan , JIN, Yinuo , JIA, Zhaowei , XIE, Liangzhi , WANG, Jun , LI, Xuejun
IPC分类号： B08B3/12 , H01L21/67
摘要： A method for controlling damages in cleaning a semiconductor wafer comprising features of patterned structures, the method comprising: delivering a cleaning liquid over a surface of a semiconductor wafer during a cleaning process; and imparting sonic energy to the cleaning liquid from a sonic transducer during the cleaning process, wherein power is alternately supplied to the sonic transducer at a first frequency and a first power level for a first predetermined period of time and at a second frequency and a second power level for a second predetermined period of time, the first predetermined period of time and the second predetermined period of time consecutively following one another, wherein at least one of the cleaning parameters is determined such that a percentage of damaged features as a result of the imparting sonic energy is lower than a predetermined threshold.

2. 发明申请

WO2018049671A1 METHODS AND APPARATUS FOR CLEANING SUBSTRATES 审中-公开
标题翻译：用于清洁基材的方法和设备
公开(公告)号：WO2018049671A1
公开(公告)日：2018-03-22
申请号：PCT/CN2016/099303
申请日：2016-09-19
申请人： ACM RESEARCH (SHANGHAI) INC.
发明人： WANG, Hui , WANG, Xi , CHEN, Fuping , CHEN, Fufa , WANG, Jian , ZHANG, Xiaoyan , JIN, Yinuo , JIA, Zhaowei , WANG, Jun , LI, Xuejun
IPC分类号： B08B3/12
摘要： A method for effectively cleaning vias (20034), trenches (20036) or recessed areas on a substrate (20010) using an ultra/mega sonic device (1003, 3003, 16062, 17072), comprising: applying liquid (1032) into a space between a substrate (20010) and an ultra/mega sonic device (1003, 3003, 16062, 17072); setting an ultra/mega sonic power supply at frequency f 1 and power P 1 to drive said ultra/mega sonic device (1003, 3003, 16062, 17072); after the ratio of total bubbles volume to volume inside vias (20034), trenches (20036) or recessed areas on the substrate (20010) increasing to a first set value, setting said ultra/mega sonic power supply at frequency f 2 and power P 2 to drive said ultra/mega sonic device (1003, 3003, 16062, 17072); after the ratio of total bubbles volume to volume inside the vias (20034), trenches (20036) or recessed areas reducing to a second set value, setting said ultra/mega sonic power supply at frequency f 1 and power P 1 again; repeating above steps till the substrate (20010) being cleaned.
摘要翻译：一种使用超大型声波装置（1003,3003,16062,17072）有效地清洁基板（20010）上的通孔（20034），沟槽（20036）或凹陷区域的方法，包括：将液体（1032）施加到衬底（20010）和超声波/超声波装置（1003,3003,16062,17072）之间的空间中; 在频率f 1和功率P 1下设置超/兆声波电源以驱动所述超声/兆声波设备（1003,3003,16062,17072）; 在通孔（20034）内的总气泡体积与体积之比，衬底（20010）上的沟槽（20036）或凹陷区域增加到第一设定值之后，将频率f 2设定为所述超大/超声波电源和功率P 2以驱动所述超大/超声波设备（1003,3003,16062,17072）;以及其中，在通孔（20034）内的总气泡体积与体积之比，沟槽（20036）或凹陷区域减小到第二设定值之后，以频率f1设置所述超/兆声波电源并且功率P <1>再次; 重复上述步骤直到清洗基板（20010）。

3. 发明申请

WO2016183707A1 METHODS AND APPARATUS FOR CLEANING SEMICONDUCTOR WAFERS 审中-公开
标题翻译：用于清洁半导体晶片的方法和设备
公开(公告)号：WO2016183707A1
公开(公告)日：2016-11-24
申请号：PCT/CN2015/079015
申请日：2015-05-15
申请人： ACM RESEARCH (SHANGHAI) INC.
发明人： WANG, Hui , CHEN, Fufa , CHEN, Fuping , WANG, Jian , WANG, Xi , ZHANG, Xiaoyan , JIN, Yinuo , JIA, Zhaowei , XIE, Liangzhi , WANG, Jun , LI, Xuejun
IPC分类号： B08B3/12 , H01L21/67
CPC分类号： B08B3/12 , B06B3/02 , H01L21/67051 , H01L21/67253
摘要： A method for cleaning semiconductor substrate without damaging patterned structure on the substrate using ultra/mega sonic device comprising applying liquid into a space between a substrate and an ultra/mega sonic device； setting an ultra/mega sonic power supply at frequency f 1 and power P 1 to drive said ultra/mega sonic device； before bubble cavitation in said liquid damaging patterned structure on the substrate, setting said ultra/mega sonic power supply at frequency f 2 and power P 2 to drive said ultra/mega sonic device； after temperature inside bubble cooling down to a set temperature, setting said ultra/mega sonic power supply at frequency f 1 and power P 1 again； repeating above steps till the substrate being cleaned. Normally, if f 1 ＝f 2 , then P 2 is equal to zero or much less than P 1 ； if P 1 ＝P 2 , then f 2 is higher than f 1 ； if the f 1 2 , then, P 2 can be either equal or less than P 1 .
摘要翻译：一种使用超/超声波装置在衬底上清洗半导体衬底而不损坏衬底上的图案化结构的方法，包括将液体施加到衬底和超/超声波装置之间的空间中;设置超/超音波装置在频率f 1和功率P 1下驱动所述超大型声波装置;在衬底上的所述液体损坏图案化结构中产生气泡空化之前，将所述超/ 在频率f 2和功率P 2的超大声波电源以驱动所述超大型声波装置;在气泡内的温度冷却到设定温度后，将所述超声/ 在频率f 1和功率P 1处再次进行超声波电源;重复上述步骤直到清洗基板。通常，如果f 1 = f 2，则P 2等于零或远小于P 1/2， ;如果P _{1 = P _{2 ，则f 2高于f 1;如果f _{1 2 ，那么P <2>可以等于或小于P _{1 。}}}}

4. 发明申请

WO2016127425A1 METHOD FOR REMOVING BARRIER LAYER FOR MINIMIZING SIDEWALL RECESS 审中-公开
标题翻译：用于移除障碍物层以最小化边界侵入的方法
公开(公告)号：WO2016127425A1
公开(公告)日：2016-08-18
申请号：PCT/CN2015/073088
申请日：2015-02-15
申请人： ACM RESEARCH (SHANGHAI) INC.
发明人： JIA, Zhaowei , WANG, Jian , WANG, Hui
IPC分类号： H01L21/768
CPC分类号： H01L21/76865 , H01L21/31055 , H01L21/31144 , H01L21/32135 , H01L21/7684 , H01L22/12 , H01L22/20 , H01L22/26
摘要： Provided is a method for removing barrier layer for minimizing sidewall recess. The method comprises the following steps: introduce noble-gas-halogen compound gas and carrier gas into an etching chamber within which a thermal gas phase etching process is being performed for etching a barrier layer (206) on non-recessed areas of an interconnection structure (501); detect an end point of the thermal gas phase etching process (502), if the thermal gas phase etching process reaches the end point, then execute the next step; if the thermal gas phase etching process doesn't reach the end point, then return to the previous step; stop introducing the noble-gas-halogen compound gas and the carrier gas to the etching chamber (503).
摘要翻译：提供了用于去除阻挡层以最小化侧壁凹陷的方法。该方法包括以下步骤：将惰性气体卤素化合物气体和载气引入蚀刻室，在其中进行热气相蚀刻工艺以在互连结构的非凹陷区域上蚀刻阻挡层（206）（501）; 检测热气相蚀刻工艺（502）的终点，如果热气相蚀刻工艺达到终点，则执行下一步骤; 如果热气相蚀刻工艺未达到终点，则返回上一步骤; 停止将惰性气体卤素化合物气体和载气引入蚀刻室（503）。

5. 发明申请

WO2016127424A1 METHOD FOR OPTIMIZING METAL PLANARIZATION PROCESS 审中-公开
标题翻译：优化金属平面化方法的方法
公开(公告)号：WO2016127424A1
公开(公告)日：2016-08-18
申请号：PCT/CN2015/073086
申请日：2015-02-15
申请人： ACM RESEARCH (SHANGHAI) INC.
发明人： JIN, Yinuo , WANG, Jian , WANG, Hui
IPC分类号： H01L21/302 , H01L21/304
CPC分类号： H01L21/3212 , H01L21/32115 , H01L21/7684
摘要： The present invention provides a method for optimizing metal planarization process, comprising: removing a bulk metal layer on a top surface of an interconnection structure by a stressed polishing process until the thickness of the remained metal layer reaches a predetermined value Y, the remained metal layer being a continuous layer covering the top surface of the interconnection structure, wherein the remained metal layer has a first surface mean roughness Ra1 induced by the stressed polishing process; removing the remained metal layer on the top surface of the interconnection structure by a stress free polishing process, the top surface of the metal layer in recessed areas in the interconnection structure being lower than the top surface of the interconnection structure by a dishing value H2 after the stress free polishing process, wherein the metal layer in the recessed areas has a second surface mean roughness Ra2 induced by the stress free polishing process, dividing the removing thickness of the stress free polishing process by Ra2 for obtaining a ratio a; wherein when setting a dishing value, for obtaining the minimum metal surface roughness after the stress free polishing process, the thickness of the remained metal layer after the stressed polishing process satisfies the following equation: Y= α/6 *H2-αRa1.
摘要翻译：本发明提供一种用于优化金属平坦化工艺的方法，包括：通过应力抛光工艺去除互连结构的顶表面上的体金属层，直到残留的金属层的厚度达到预定值Y，剩下的金属层是覆盖互连结构的顶表面的连续层，其中残留金属层具有由应力抛光工艺引起的第一表面平均粗糙度Ra1; 通过无应力抛光工艺去除互连结构的顶表面上的剩余金属层，互连结构中的凹陷区域中的金属层的顶表面比互连结构的顶表面之后的凹陷值H2低无应力抛光工艺，其中凹陷区域中的金属层具有由无应力抛光工艺引起的第二表面平均粗糙度Ra2，将无应力抛光工艺的去除厚度除以Ra2以获得比率a; 其中，当设定凹陷值时，为了得到无应力研磨处理后的最小金属表面粗糙度，应力研磨工序后残留金属层的厚度满足下式：Y =α/ 6 * H2-αRa1。

6. 发明申请

WO2013040751A1 METHOD FOR FORMING AIR GAP INTERCONNECT STRUCTURE 审中-公开
标题翻译：形成气隙互连结构的方法
公开(公告)号：WO2013040751A1
公开(公告)日：2013-03-28
申请号：PCT/CN2011/079859
申请日：2011-09-20
申请人： ACM RESEARCH (SHANGHAI) INC. , WANG, Hui , WANG, Jian , JIN, Yinuo , JIA, Zhaowei
发明人： WANG, Hui , WANG, Jian , JIN, Yinuo , JIA, Zhaowei
IPC分类号： H01L21/302 , H01L21/764
CPC分类号： H01L21/7682 , H01L21/02126 , H01L21/02131 , H01L21/02271 , H01L21/02274 , H01L21/32115 , H01L21/32135 , H01L21/7684
摘要： Embodiments of the present invention provide a method for forming air gap interconnect structure. A first step of the method is to form conductive structures on a substrate, the conductive structures are separated by sacrificial material. A scale of the conductive structures is lower than 65nm and the conductive structures are polished by both Chemical Mechanical Polishing (CMP) and Stress-Free ElectroPolishing (SFP). A second step of this method is to remove the sacrificial material to form recesses between the conductive structures. And a third step of this method is to non-conformally deposit dielectric material over the conductive structure and in the recesses, so as to form air gaps within the dielectric material in the recesses. No hard mask is deposited during the formation of the conductive structures.
摘要翻译：本发明的实施例提供一种形成气隙互连结构的方法。该方法的第一步是在衬底上形成导电结构，导电结构由牺牲材料分离。导电结构的尺度低于65nm，并通过化学机械抛光（CMP）和无压电抛光（SFP）进行抛光。该方法的第二步是去除牺牲材料以在导电结构之间形成凹陷。并且该方法的第三步是在导电结构和凹槽中不均匀地沉积电介质材料，以在凹陷中的电介质材料内形成气隙。在形成导电结构期间不会沉积硬掩模。

7. 发明申请

WO2010066081A1 METHODS AND APPARATUS FOR CLEANING SEMICONDUCTOR WAFERS 审中-公开
标题翻译：清洗半导体波形的方法和装置
公开(公告)号：WO2010066081A1
公开(公告)日：2010-06-17
申请号：PCT/CN2008/073471
申请日：2008-12-12
申请人： ACM RESEARCH (SHANGHAI) INC. , WANG, Jian , NUCH, Sunny Voha , XIE, Liangzhi , WU, Junping , JIA, Zhaowei , HUANG, Yunwen , GAO, Zhifeng , WANG, Hui
发明人： WANG, Jian , NUCH, Sunny Voha , XIE, Liangzhi , WU, Junping , JIA, Zhaowei , HUANG, Yunwen , GAO, Zhifeng , WANG, Hui
IPC分类号： H01L21/00 , H01L21/02 , B08B3/12 , B06B3/00
CPC分类号： H01L21/67051 , B08B3/08 , B08B3/12 , B08B3/123 , H01L21/02063 , H01L21/67023 , H01L21/6708
摘要： A method for cleaning semiconductor substrate using ultra/mega sonic device comprising holding a semi conductor substrate by using a chuck, positioning a ultra/mega sonic device adjacent to the semiconductor substrate, injecting chemical liquid on the semiconductor substrate and gap between the semiconductor substrate and the ultra/mega sonic device, changing gap between the semiconductor substrate and the ultra/mega sonic device for each rotation of the chuck during the clea ning process. The gap can be increased or reduced by 0.5λ /N for each rotation of the chuck, where λ is wavelength of ultra/mega sonic wave, N is an integer number between 2 and 1000. The gap is varied in the range of 0.5 λn during the cleaning process, where λ is wavelength of ultra/mega sonic wave, and n is an integer number starting from 1.
摘要翻译：一种使用超声波设备清洗半导体衬底的方法，包括：通过使用卡盘夹持半导体衬底，将超声波器件邻近半导体衬底定位，在半导体衬底上注入化学液体，将半导体衬底与半导体衬底之间的间隙超声波超声波装置，在清洁过程中，对于卡盘的每次旋转，改变半导体衬底和超/超声波装置之间的间隙。间隙可以增加或减少0.5？ / N为卡盘的每次旋转，其中？是超/兆声波的波长，N是2和1000之间的整数。在清洁过程中间隙在0.5？n的范围内变化，其中？是超/大声波的波长，n是从1开始的整数。

8. 发明申请

WO2019095127A1 SYSTEM FOR CLEANING SEMICONDUCTOR WAFERS 审中-公开
公开(公告)号：WO2019095127A1
公开(公告)日：2019-05-23
申请号：PCT/CN2017/111016
申请日：2017-11-15
申请人： ACM RESEARCH (SHANGHAI) INC.
发明人： WANG, Hui , CHEN, Fufa , CHEN, Fuping , WANG, Jian , WANG, Xi , ZHANG, Xiaoyan , JIN, Yinuo , JIA, Zhaowei , XIE, Liangzhi , WANG, Jun , LI, Xuejun
IPC分类号： H01L21/02
CPC分类号： H01L21/02057 , B08B3/12
摘要： A system for controlling damages in cleaning a semiconductor wafer (1010) comprising features of patterned structures, comprising: a wafer chuck (1014) for temporary restraining a semiconductor wafer (1010) during a cleaning process; a nozzle (1012) for delivering a cleaning liquid over a surface of the semiconductor wafer (1010); a sonic generator (25082) configured to alternately operate at a first frequency (f 1 ) and a first power level (P 1 ) for a first predetermined period of time (τ 1 ) and at a second frequency (f2) and a second power level (P2) for a second predetermined period of time (τ 2 ), to impart sonic energy to the cleaning liquid, wherein the first predetermined period of time (τ 1 ) and the second predetermined period of time (τ 2 ) consecutively follows one another; and a controller programmed to provide the cleaning parameters, wherein at least one of the cleaning parameters is determined such that a percentage of damaged features as a result of the imparting sonic energy is lower than a predetermined threshold.

9. 发明申请

WO2017173613A1 TSV STRUCTURE PLANARIZATION PROCESS AND APPARATUS 审中-公开
标题翻译： TSV结构平面化工艺及装置
公开(公告)号：WO2017173613A1
公开(公告)日：2017-10-12
申请号：PCT/CN2016/078656
申请日：2016-04-07
申请人： ACM RESEARCH (SHANGHAI) INC.
发明人： JIN, Yinuo , DAI, Yingwei , YANG, Guipu , WANG, Jian , WANG, Hui
IPC分类号： H01L21/768
摘要： A TSV structure planarization process and apparatus. The TSV structure includes a substrate (101), vias (102) formed in the substrate (101), an oxide layer (103) formed on the substrate (101), a barrier layer (104) formed on the oxide layer (103), bottom and sidewall of the vias (102), a metal layer (105) formed in the vias (102) and on the barrier layer (104).The TSV structure planarization process comprises: removing all metal layer formed on a non-recessed area of the substrate by a stress-free polishing process (301); and removing metal layer residual and the barrier layer on the non-recessed area by a chemical wet etch process (303) (305).
摘要翻译： TSV结构平面化工艺和装置。 TSV结构包括衬底（101），形成在衬底（101）中的通孔（102），形成在衬底（101）上的氧化物层（103），形成在氧化物层（103）上的阻挡层（104），所述通孔（102）的底部和侧壁，形成在所述通孔（102）中和所述阻挡层（104）上的金属层（105）。所述TSV结构平坦化工艺包括：去除形成在非凹陷通过无应力抛光工艺（301）在衬底的区域上形成; 并通过化学湿蚀刻工艺（303）去除非凹陷区域上的金属层残留物和阻挡层（305）。（305）

10. 发明申请

WO2017024540A1 METHOD FOR PROCESSING INTERCONNECTION STRUCTURE FOR MINIMIZING BARRIER SIDEWALL RECESS 审中-公开
标题翻译：用于最小化障碍物边界的互连结构的处理方法
公开(公告)号：WO2017024540A1
公开(公告)日：2017-02-16
申请号：PCT/CN2015/086725
申请日：2015-08-12
申请人： ACM RESEARCH (SHANGHAI) INC.
发明人： JIA, Zhaowei , WANG, Jian , WANG, Hui
IPC分类号： H01L21/768
CPC分类号： H01L21/76865 , H01L21/31144 , H01L21/32135 , H01L21/7684 , H01L21/76883
摘要： A method for processing an interconnection structure for minimizing barrier sidewall recess, comprises the following steps: step 1, remove a metal layer (408) to generate a uniform dishing value inside the recessed area (409), the uniform dishing value is generated to make sure that the top surface of the metal layer (408) in the recessed area (409) is aligned with the bottom surface of the hard mask layer (405), step 2, introduce noble-gas-halogen compound gas to remove a first barrier layer (406) on top surface and at least a portion of a second barrier layer (407) on sidewall by a gas phase chemical reaction process, the top surface of the second barrier layer (407) on sidewall is aligned with the bottom surface of the hard mask layer (405), step 3, introduce oxidizing gas to generate a barrier surface oxide (411) on the top surface of the second barrier layer (407) on sidewall, a metal surface oxide (412) is generated at the same time, step 4, introduce noble-gas-halogen compound gas to remove hard mask layer (405) by a gas phase chemical reaction process, step 5, reduce or remove the metal surface oxide (412).
摘要翻译：一种处理用于使阻挡侧壁凹陷最小化的互连结构的方法包括以下步骤：步骤1，去除金属层（408）以在凹陷区域（409）内产生均匀的凹陷值，产生均匀的凹陷值以使确保在凹陷区域（409）中的金属层（408）的顶表面与硬掩模层（405）的底表面对准，步骤2，引入惰性气体 - 卤素化合物气体以除去第一屏障通过气相化学反应过程在顶表面上的层（406）和侧壁上的第二阻挡层（407）的至少一部分，侧壁上的第二阻挡层（407）的顶表面与在步骤3中，硬掩模层（405）引入氧化气体以在侧壁上的第二阻挡层（407）的顶表面上产生阻挡表面氧化物（411），同时产生金属表面氧化物（412）时间，步骤4，引入贵金属卤素化合物g 为了通过气相化学反应过程去除硬掩模层（405），步骤5，减少或去除金属表面氧化物（412）。

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