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    • 4. 发明申请
    • OPERATING A PHASE LOCKED LOOP
    • 操作相位锁定环
    • WO2006100617A1
    • 2006-09-28
    • PCT/IB2006/050737
    • 2006-03-09
    • NOKIA CORPORATIONSALONEN, VesaVILHONEN, Sami
    • SALONEN, VesaVILHONEN, Sami
    • H03L7/113H03L7/187
    • H03L7/189H03L7/113
    • A PLL comprises a VCO and a loop filter, wherein the VCO generates an AC output signal having a frequency which depends on an applied control voltage, and wherein the loop filter provides a control voltage to the VCO. The control voltage reflects determined phase differences between a potentially frequency divided output signal of the VCO and a reference signal. When operating the PLL, frequency deviations between a potentially frequency divided output signal of the VCO and a reference signal are detected and in addition, a resolution employed for detecting the frequency deviations is lower than a resolution employed for determining the phase differences. In case a frequency deviation is detected, a direct-current voltage shift is added to the control voltage provided by the loop filter.
    • PLL包括VCO和环路滤波器,其中VCO产生具有取决于施加的控制电压的频率的AC输出信号,并且其中环路滤波器向VCO提供控制电压。 控制电压反映了VCO的潜在分频输出信号与参考信号之间确定的相位差。 当操作PLL时,检测VCO的潜在分频输出信号与参考信号之间的频率偏差,此外,用于检测频率偏差的分辨率低于用于确定相位差的分辨率。 在检测到频率偏差的情况下,将直流电压偏移加到由环路滤波器提供的控制电压。
    • 5. 发明申请
    • TUNING A LOOP-FILTER OF A PLL
    • 调谐PLL的环路滤波器
    • WO2005018092A1
    • 2005-02-24
    • PCT/IB2004/002595
    • 2004-08-11
    • NOKIA CORPORATIONVILHONEN, SamiMELAVA, Jari
    • VILHONEN, SamiMELAVA, Jari
    • H03L7/093
    • H03L7/0895H03L7/093
    • The invention relates to a method of automatically tuning a loop-filter of a phase locked loop. The loop-filter includes a capacitance at an output of a charge pump of the phase locked loop, and the charge pump provides current impulses to the loop-filter. In order to enable a simple tuning of the loop-filter, the method comprises adjusting the amplitude of the current impulses output by the charge pump essentially proportionally to the capacitance at the output of the charge pump. The invention relates equally to a phase locked loop comprising means for realizing this method and to a unit comprising such a phase locked loop.
    • 本发明涉及一种自动调谐锁相环的环路滤波器的方法。 环路滤波器包括在锁相环的电荷泵的输出处的电容,并且电荷泵向环路滤波器提供电流脉冲。 为了实现环路滤波器的简单调谐,该方法包括基本成比例地调整由电荷泵输出的电流脉冲的幅度与电荷泵输出端的电容成正比。 本发明同样涉及一种锁相环,包括用于实现该方法的装置和包括这种锁相环的单元。
    • 6. 发明申请
    • HIGH OUTPUT POWER DIGITAL TX
    • 高输出功率数字TX
    • WO2012168379A1
    • 2012-12-13
    • PCT/EP2012/060819
    • 2012-06-07
    • ST-Ericsson SAVILHONEN, Sami
    • VILHONEN, Sami
    • H03F1/00H04B1/04H03M1/66
    • H03F3/45179H03F3/2175H03F3/245H03F2200/336H03F2200/537H03F2200/541H03M1/804H04B2001/0491
    • The disclosed apparatus and corresponding method uses amplifiers and a differential combiner to control the output power of a digital-to-analog upconverter and to isolate In-phase and Quadrature branches of the upconverter. First and second upconverters convert In-phase and Quadrature portions of a baseband digital value to respective first/second In-phase (l p /l n ) and first/second Quadrature (Q p /Q n ) analog components at RF. First and second amplifiers respectively amplify l p , l n and Q p , Q n to respectively generate amplified l p , l n and Q p , Q n signals. The first and second amplifiers each operate at a 50% duty cycle and in an interleaved fashion such that only one amplifier is active to generate an output at any time, and such that the amplified signals are output in an interleaved fashion. A differential combiner combines the amplified signals to generate the RF analog signal representative of the baseband digital value.
    • 所公开的装置和相应的方法使用放大器和差分组合器来控制数模转换器的输出功率并隔离上变频器的同相和正交分支。 第一和第二上变频器将基带数字值的同相和正交部分转换为RF处的相应的第一/第二同相(lp / ln)和第一/第二正交(Qp / Qn)模拟分量。 第一和第二放大器分别放大lp,ln和Qp,Qn分别产生放大的lp,ln和Qp,Qn信号。 第一和第二放大器各自以50%占空比和交错方式工作,使得只有一个放大器有效以在任何时间产生输出,并且使得放大的信号以交错方式输出。 差分组合器组合放大的信号以产生表示基带数字值的RF模拟信号。
    • 7. 发明申请
    • DIGITAL TO ANALOGUE CONVERTER
    • 数字到模拟转换器
    • WO2010076272A2
    • 2010-07-08
    • PCT/EP2009/067812
    • 2009-12-22
    • ST ERICSSON SAVILHONEN, SamiESKOLA, Rami
    • VILHONEN, SamiESKOLA, Rami
    • H03M1/80
    • H03M1/802
    • A circuit (60) for converting a digital value into an analogue signal is described. The circuit comprises a logic block (64) arranged to receive one or more digital signals representing the value and each having a relative weighting. The logic block is further arranged to output one or more signals, each output signal comprising an oscillator signal modulated by a respective digital signal. The circuit (60) further comprises generating means (69) for generating an analogue signal representative of the digital value. The analogue signal comprises a weighted combination of the signals output from the logic block (64), the relative weightings being based on the relative weightings of the respective digital signals. The logic block (64) may comprise a series of multiplying elements (61 a-c), such as logic gates or series switches, each multiplying element arranged to receive an oscillator signal as a first input and a respective digital signal as a second input, and arranged to multiply the oscillator signal with the digital signal. The generating means (69) may comprise a series of amplitude modifiers (62a-c), such as a capacitor, a resistor and an inductor, arranged to modify the relative amplitudes of the signals output from the logic block (64). The generating means (69) may comprise means (66) to sum the amplitude-modified signals
    • 描述了用于将数字值转换成模拟信号的电路(60)。 该电路包括逻辑块(64),其被设置为接收表示该值的一个或多个数字信号并且每个数字信号具有相对加权。 逻辑块还布置成输出一个或多个信号,每个输出信号包括由相应的数字信号调制的振荡器信号。 电路(60)还包括用于生成表示数字值的模拟信号的生成装置(69)。 模拟信号包括从逻辑块(64)输出的信号的加权组合,相对权重基于各个数字信号的相对权重。 逻辑块(64)可以包括一系列乘法元件(61ac),诸如逻辑门或串联开关,每个乘法元件被布置为接收作为第一输入的振荡器信号和作为第二输入的相应的数字信号,以及 用于将振荡器信号与数字信号相乘。 生成装置(69)可以包括一系列幅度调节器(62a-c),例如电容器,电阻器和电感器,其被布置为修改从逻辑块(64)输出的信号的相对幅度。 生成装置(69)可以包括用于对经振幅修改的信号进行求和的装置(66)
    • 10. 发明申请
    • PROVISION OF LOCAL OSCILLATOR SIGNALS
    • 提供本地振荡器信号
    • WO2005018102A1
    • 2005-02-24
    • PCT/IB2004/002620
    • 2004-08-12
    • NOKIA CORPORATIONHEINONEN, JarmoPETTERSSON, MarkusVILHONEN, Sami
    • HEINONEN, JarmoPETTERSSON, MarkusVILHONEN, Sami
    • H04B1/40
    • H04B1/406H03L7/22
    • The invention relates to a phase-locked loop structure providing local oscillator signals. In order to enable an improved supply of local oscillator signals, the phase-locked loop structure comprises a first phase-locked loop including a first voltage controlled oscillator and a second phase-locked loop including a second voltage controlled oscillator. A first local oscillator output provides a first local oscillator signal, wherein a signal output by the first voltage controlled oscillator is forwarded to the first local oscillator output. A second local oscillator output provides a second local oscillator signal. A selection component forwards a signal output by the first voltage controlled oscillator or a signal output by the second voltage controlled oscillator to the second local oscillator output. The invention relates equally to a corresponding communication unit and to a corresponding method.
    • 本发明涉及提供本地振荡器信号的锁相环结构。 为了能够改善本地振荡器信号的供应,锁相环结构包括包括第一压控振荡器和包括第二压控振荡器的第二锁相环的第一锁相环。 第一本地振荡器输出提供第一本地振荡器信号,其中由第一压控振荡器输出的信号被转发到第一本地振荡器输出。 第二本地振荡器输出提供第二本机振荡器信号。 选择部件将由第一压控振荡器输出的信号或由第二压控振荡器输出的信号转发到第二本机振荡器输出。 本发明同样涉及对应的通信单元和相应的方法。